The content of the invention
Technical solution of the present invention solve be existing electronic equipment head circuit power consumption it is larger the problem of.
To solve the above problems, technical solution of the present invention provides a kind of electricity that interface voltage is provided to earphone interface circuit
Road, including:Sequence circuit, suitable for alternately exporting the first signal and the second signal in the headset detection stage, in the headset detection stage
The duration of first signal exports the time needed for detection signal, first signal at least equal to earphone detection circuit
It is equal to the headset detection cycle with the sum of duration of secondary signal;Power circuit, suitable for exporting first in the sequence circuit
Output interface voltage signal during signal, when the sequence circuit exports secondary signal, exports zero voltage signal;The interface electricity
Press the magnitude of voltage of signal related to the magnitude of voltage of power supply.
Optionally, the sequence circuit is further adapted in the stage conversed using earphone or applies what earphone was recorded
Stage persistently exports the first signal.
Optionally, the sequence circuit includes:Control signal generation unit, suitable for producing corresponding logic in different phase
Control signal;Clock signal generation unit, suitable for being alternately produced the first clock signal and the second clock signal, first sequential
The duration of signal is equal to the duration of first signal in the headset detection stage, and second clock signal continues
Time is equal to the duration of the secondary signal in the headset detection stage;Logic unit, suitable for the logic control signal
Logical operation is carried out with clock signal, the output terminal of the logic unit is the output terminal of the sequence circuit.
Optionally, the control signal generation unit is suitable for producing logic low in the headset detection stage, and described first
Clock signal and the first signal are logic high, and second clock signal and secondary signal are logic low, described to patrol
Collecting unit includes OR gate.
Optionally, the control signal generation unit is suitable for producing logic high in the headset detection stage, and described first
Clock signal and secondary signal are logic low, and second clock signal and the first signal are logic high, described to patrol
Collecting unit includes NAND gate.
Optionally, the power circuit includes:Second voltage regulation unit, including voltage signal inputs, Enable Pin and voltage
Signal output part, the voltage signal inputs are connected with power end, the Enable Pin and the output terminal of the sequence circuit
It is connected, the voltage signal output end is the output terminal of the power circuit.
Optionally, the power circuit includes:A reference source, including first voltage end and drive output, first electricity
Pressure side is connected with power end;First voltage regulation unit, including second voltage end, driving input terminal and voltage output end, described the
Two voltage ends are connected with the power end, and the driving input terminal is connected with the drive output of a reference source;Selection
Switch, including first input end, the second input terminal and output switching terminal, the first input end and first voltage regulation unit
Voltage output end is connected, and second input terminal is connected with the power end, in the second input described in the headset detection stage
End is connected with the output switching terminal;Second voltage regulation unit, including voltage signal inputs, Enable Pin and voltage signal output
End;The voltage signal inputs are connected with the output switching terminal, the Enable Pin and the output terminal of the sequence circuit
It is connected, the voltage signal output end is the output terminal of the power circuit.
Optionally, it is equal to second voltage regulation unit from startup in the duration of the first signal described in the headset detection stage
To stablizing the required time and earphone detection circuit is detected and judges to export the sum of time needed for detection signal.
Optionally, the circuit that interface voltage is provided to earphone interface circuit further includes:De-twitter circuit, suitable for described
The detection signal of earphone detection circuit output carries out debounce processing;Latch cicuit, suitable for being latched before the secondary signal exports
Detection signal after debounce processing.
Optionally, the headset detection detects for earphone insertion/extraction detection or earphone keystroke.
In order to solve the above technical problems, technical solution of the present invention also provides a kind of head circuit, including earphone interface circuit
With the circuit that interface voltage is provided to earphone interface circuit;The output terminal of the power circuit is suitable for connecing with the earphone
The interface voltage input terminal of mouth circuit is connected.
Optionally, the head circuit further includes:Earphone detection circuit, suitable for the test side to the earphone interface circuit
It is detected, to export detection signal.
Optionally, the earphone interface circuit includes:First test side, is adapted to the left channel interface of earphone, described
The voltage of first test side is related to operating voltage;Second test side, is adapted to the microphone interface of earphone, second inspection
The voltage for surveying end is related to interface voltage.The earphone detection circuit includes:First detection unit, is adapted to detect for first inspection
The signal at end is surveyed, to export first detection signal;Second detection unit, is adapted to detect for the signal of second test side, with defeated
Go out the second detection signal;First judging unit, suitable for by the first detection signal judge first test side whether with
The left channel interface connection of earphone;Second judging unit, suitable for being connected when the left channel interface of first test side and earphone
When, judge whether second test side is connected with the microphone interface of earphone by the described second detection signal;Confirmation unit,
Suitable for when the microphone interface of second test side and earphone connects, confirming earphone insertion.
Optionally, the head circuit further includes startup control unit, and the startup control unit is suitable for working as described first
The left channel interface of test side and earphone connect when, by described second detection signal judge second test side whether with
Before the microphone interface connection of earphone, start the circuit that interface voltage is provided to earphone interface circuit.
Optionally, the confirmation unit is further adapted in the state of earphone is inserted into, when the letter based on first test side
Number determine that first test side and left channel interface disconnect and the signal based on second test side determines described the
When two test sides are disconnected with microphone interface, confirm that earphone is extracted.
Optionally, the head circuit further includes closing control unit, and the closing control unit is suitable for confirming earphone
After extraction, the circuit that interface voltage is provided to earphone interface circuit is closed.
Compared with prior art, technical scheme has the following advantages:
In the headset detection stage, by the output of alternate the first signal and the second signal control interface voltage signal,
In first signal duration, interface voltage is provided to earphone interface circuit, stops providing within the duration of secondary signal
Interface voltage, so as to reduce the power consumption of head circuit.
In the headset detection stage, stable interface voltage is provided by level-one voltage stabilizing, and a reference source and the can be closed
One voltage regulation unit, so as to reach the power consumption that reduce further head circuit.
The signal of two test sides is detected respectively, determines whether earphone is inserted into or pulls out according to the signal of two test sides
Go out so that the insertion of earphone/extraction detection is more accurate.
When being connected in the first test side with left channel interface, start the electricity that interface voltage is provided to earphone interface circuit
Road, so only provides interface voltage when the first test side is connected with left channel interface, can also reduce to a certain extent
Circuit power consumption.
Embodiment
The circuit that interface voltage is provided to earphone interface circuit of technical solution of the present invention includes:
Sequence circuit, suitable for alternately exporting the first signal and the second signal in the headset detection stage, in the headset detection stage
The duration of first signal exports the time needed for detection signal, first signal at least equal to earphone detection circuit
It is equal to the headset detection cycle with the sum of duration of secondary signal;
Power circuit, suitable for the output interface voltage signal when the sequence circuit exports the first signal, in the sequential
During circuit output secondary signal, zero voltage signal is exported;The magnitude of voltage of the interface voltage signal is related to the magnitude of voltage of power supply.
The headset detection detects for earphone insertion/extraction detection or earphone keystroke, and the earphone detection circuit includes using
At least one of the detection circuit whether being inserted into test earphone and the detection circuit for test earphone button circuit.
In the headset detection stage, by the output of alternate the first signal and the second signal control interface voltage signal,
In first signal duration, interface voltage is provided to earphone interface circuit, stops providing within the duration of secondary signal
Interface voltage, has thus achieveed the purpose that to reduce power consumption.
With reference to the accompanying drawings and examples to the physical circuit of the circuit that interface voltage is provided to earphone interface circuit
Structure is described in detail.
The circuit that interface voltage is provided to earphone interface circuit of the embodiment of the present invention as shown in Figure 4 includes sequence circuit
1 and power circuit 2.
Sequence circuit 1 includes:Control signal generation unit 11, clock signal generation unit 12 and logic unit 13.
Control signal generation unit 11 is suitable for producing corresponding logic control signal Logic_Control in different phase.
When it is implemented, in the headset detection stage, logic control signal of the output of control signal generation unit 11 with the first logical value
Logic_Control;The stage for example conversed in other stages using earphone or the stage recorded using earphone, control
Logic control signal Logic_Control of the output of signal generation unit 11 processed with the second logical value.
Clock signal generation unit 12 is suitable for being alternately produced the first clock signal and the second clock signal, first sequential
The duration of signal is equal to the duration of first signal in the headset detection stage, and second clock signal continues
Time is equal to the duration of the secondary signal in the headset detection stage.Specifically, when clock signal generation unit 12 exports
Sequential signal Timing_Signal, including alternate first clock signal and the second clock signal, the logical value of the first clock signal
Different from the logical value of the second clock signal.
Logic unit 13, suitable for the logic control signal Logic_Control and clock signal Timing_Signal
Logical operation is carried out, the output terminal of logic unit 13 is the output terminal of sequence circuit 1, for exporting enable signal
HEADMICBIAS_EN.The control that enable signal HEADMICBIAS_EN works as the voltage regulation unit 24 of controlling power circuit 2
Signal, the circuit structure of control signal generation unit 11, clock signal generation unit 12 and logic unit 13 is according to enable signal
HEADMICBIAS_EN is that high level is effective or low level effectively designs.
Power circuit 2 includes:A reference source 21, the first voltage regulation unit 22,23 and second voltage regulation unit 24 of selecting switch.
A reference source 21 includes first voltage end and drive output(Do not indicated in figure), the first voltage end and power end
VBAT is connected.A reference source 21 is used to drive the first voltage regulation unit 22, and a reference source 21 can use band gap(Bandgap)Benchmark electricity
Stream source or bandgap voltage reference, can also use bleeder circuit.
First voltage regulation unit 22 includes second voltage end, driving input terminal and voltage output end(Do not indicated in figure), it is described
Second voltage end is connected with power end VBAT, and the driving input terminal is connected with the drive output of a reference source 21.First
Voltage regulation unit 22 can use low pressure difference linear voltage regulator(LDO).
Selecting switch 23 includes first input end, the second input terminal and output switching terminal(Do not indicated in figure), described first
Input terminal is connected with the voltage output end of the first voltage regulation unit 22, and second input terminal is connected with power end VBAT.
Second voltage regulation unit 24 includes voltage signal inputs Vin, Enable Pin EN and voltage signal output end Vout.Voltage
Signal input part Vin is connected with the output switching terminal of selecting switch 23, and Enable Pin EN is connected with the output terminal of sequence circuit 1
Connect, voltage signal output end Vout is the output terminal of power circuit 2, for providing interface voltage to earphone interface circuit.Second
The Enable Pin EN of voltage regulation unit 24 is the enable signal of the second voltage regulation unit 24(It could also say that control signal)Input terminal, when
Second voltage regulation unit 24 could work when enable signal is effective, otherwise export zero voltage signal.Enable signal can be high level
Effectively, or low level is effective, is designed and determined by the actual circuit of the second voltage regulation unit 24.Second voltage regulation unit 24 can be with
Using low pressure difference linear voltage regulator.
In general, the interface voltage provided to earphone interface circuit should be stable voltage, and as answered when using earphone
Conversed with earphone or recorded using earphone, compared in headset detection such as earphone insertion detection or earphone keystroke inspection
Survey, it is necessary to the interface voltage of higher performance.Therefore, can be selected by selecting switch 23 in different phase at different power supplys
Reason, the interface voltage of demand is met with output, specifically, the control terminal of selecting switch 23 can be with input logic control signal
Logic_Control, to be connected in headset detection stage, control second input terminal with the output switching terminal;Answering
The stage conversed with earphone or the stage recorded using earphone, control the first input end to be exported with the switch
End connection.In this way, in the stage conversed using earphone or the stage recorded using earphone, pass through two-stage voltage stabilizing(I.e.
First voltage regulation unit 22 and the second voltage regulation unit 24)High performance interface voltage is provided;It is steady by level-one in the headset detection stage
Pressure(That is the second voltage regulation unit 24)Stable interface voltage is provided, and 21 and first voltage regulation unit 22 of a reference source can be closed,
So as to achieve the purpose that further to reduce power consumption.
In embodiments of the present invention, with enable signal HEADMICBIAS_EN high level effectively, logic unit 13 include or
Exemplified by door, for the sequential of part signal as shown in figure 5, S1 represents the headset detection stage, S2 represents earphone call in circuit shown in Fig. 4
Stage or earphone recording stage.Logic control signal Logic_Control is logic low in the S1 periods, in the S2 periods
For logic high.Clock signal Timing_Signal includes alternate first clock signal and the second clock signal, and described
One clock signal is logic high, and second clock signal is logic low.By logic or computing, enable signal
HEADMICBIAS_EN is identical with the sequential of clock signal Timing_Signal in the sequential of S1 periods, is in the S2 periods
Logic high;Enable signal HEADMICBIAS_EN includes alternate the first signal and the second signal in the S1 periods, in S2
Period is the first signal, and first signal is logic high, and the secondary signal is logic low.Second voltage stabilizing list
Member 24 is alternately opened and closed in the S1 periods according to the first signal and the second signal, and opening state is remained in the S2 periods
State;The voltage signal output end Vout of second voltage regulation unit 24 is alternately defeated according to the first signal and the second signal in the S1 periods
Go out interface voltage signal relevant with supply voltage and zero voltage signal.
In the headset detection stage, the duration of first clock signal is greater than or equal to(T0+T1)And it is less than T, its
In, T0 is voltage regulation unit 24 from starting to stablizing the required time, T1 be needed for earphone detection circuit output detection signal when
Between, T is the headset detection cycle;The duration T 2 of second clock signal is equal to(T-(T0+T1)).Specifically, if
It is to carry out earphone insertion detection, T1 is judged to defeated to be detected for the detection circuit whether test earphone is inserted into test side
Go out the time t11 detected needed for signal, T is inserted into detection cycle for earphone(Between the time of the i.e. front and rear insertion of earphone twice detection
Every);If carrying out earphone keystroke detection, T1 is detected and sentences to test side for the detection circuit for test earphone button
For disconnected push-button type to the time t12 exported needed for detection signal, T is earphone keystroke detection cycle(I.e. front and rear earphone keystroke twice
The time interval of detection).In practical applications, earphone insertion detection cycle and earphone keystroke detection cycle be it is identical, therefore
Clock signal can be designed as periodic signal, and T1 could be provided as the higher value in t11 and t12, in general, t12 is more than t11, then
The detection circuit that T1 is provided for test earphone button is detected test side and judges push-button type to output detection letter
Time t12 needed for number.
It should be noted that due in the headset detection stage being alternate startup and closing the second voltage regulation unit 24,
The duration of first signal also needs to consider the second voltage regulation unit 24 from starting to required time T0 is stablized.In other realities
Apply in example, if not using the second voltage regulation unit 24, and provided by the first signal control power supply voltage directly as interface voltage
To earphone interface circuit, then time T0 can not also be considered, i.e., duration of described first signal is greater than or equal to T1 and small
In T.
In addition, in other embodiments, power consumption is reduced discounting for further, the power circuit can not also include
Selecting switch, the voltage signal inputs of the power output end of the first voltage regulation unit directly with the second voltage regulation unit are connected.Such as
For fruit without considering the interface voltage of higher performance is provided when using earphone, the power circuit can also only include the second voltage stabilizing list
Member, the voltage signal inputs of second voltage regulation unit are directly connected with power end.
Those skilled in the art are further appreciated that the circuit structure of the sequence circuit according to enable signal is that high level has
Effect or low level effectively design, and therefore, the sequential of part signal is not limited to shown in Fig. 5 in circuit shown in Fig. 4, at other
In embodiment, by enable signal be high level it is effective exemplified by, can also be:The logic control that the control signal generation unit produces
Signal processed is logic high in the headset detection stage, is logic low in earphone speech phase or earphone recording stage;When
In sequential signal, first clock signal is logic low, and second clock signal is logic high, the logic list
Member includes NAND gate;First signal is logic high, and the secondary signal is logic low.It is for enable signal
The effective situation of low level, those skilled in the art can accordingly be set each signal based on described above, to determine phase
The circuit structure answered.
Technical solution of the present invention also provides a kind of head circuit, including earphone interface circuit and above-mentioned to earphone interface electricity
Road provides the circuit of interface voltage;The output terminal of the power circuit is suitable for inputting with the interface voltage of the earphone interface circuit
End is connected.
The earphone interface circuit can use existing circuit, as shown in Figure 1 or 2, the earphone interface circuit bag
Include:First test side HEADSET_L_INT and the second test side HEADMIC_IN.
First test side HEADSET_L_INT is adapted to the left channel interface L, the first test side HEADSET_L_ of earphone
The voltage of INT is related to the operating voltage of input service voltage input end VDD_IO.
Second test side HEADMIC_IN is adapted to the microphone interface MIC, the second test side HEADMIC_IN of earphone
Voltage it is related to the interface voltage of input interface voltage input end HEADMICBIAS.
Further, the head circuit further includes earphone detection circuit, and the earphone detection circuit is suitable for the earphone
The test side of interface circuit is detected, to export detection signal.
The earphone detection circuit can include being used for the detection circuit whether test earphone is inserted into, described to be used to detect ear
The detection circuit whether machine is inserted into can use the signal of existing the first test side of electric circuit inspection HEADSET_L_INT.
Determine whether earphone is inserted into yet with only voltage detecting is carried out to the first test side HEADSET_L_INT, when
The inserting paragraph of earphone only has the earphone interface that partial insertion is not fully inserted into electronic equipment in other words, will there are earphone insertion
Error detection, can detect that earphone is inserted into by the first test side HEADSET_L_INT, but the second test side can not be passed through
HEADMIC_IN detects whether the button triggering of earphone and confirms the type of button.Therefore, the embodiment of the present invention be used for examine
The detection circuit whether be inserted into of earphone is surveyed by detecting the signals of two test sides respectively, is come according to the signal of two test sides true
Determine whether earphone is inserted into so that the insertion detection of earphone is more accurate.Specifically, as shown in fig. 6, the earphone detection circuit bag
Include:First detection unit 31, second detection unit 32, the first judging unit 33, the second judging unit 34 and confirmation unit 35.
First detection unit 31 is adapted to detect for the signal of the first test side HEADSET_L_INT, is believed with the detection of output first
Number AUDIO_HEAD_INSERT1.
In embodiments of the present invention, first detection unit 31 is suitable for comparing the first reference voltage Vref 1 and the first test side
The voltage of HEADSET_L_INT, to export first detection signal AUDIO_HEAD_INSERT1.First detection signal AUDIO_
HEAD_INSERT1 is to represent whether the first test side HEADSET_L_INT is connected with left channel interface L, such as the first detection
Signal AUDIO_HEAD_INSERT1 can represent the first test side HEADSET_L_INT and a left side respectively for high level or low level
Channel interface L connections or the first test side HEADSET_L_INT are not connected with left channel interface L.
First reference voltage Vref 1 is according to the first test side HEADSET_L_INT and operating voltage input terminal VDD_IO, a left side
The connection structure of channel interface L determines.By taking the circuit shown in Fig. 1 as an example, when earphone is extracted or is not inserted into, left channel interface L is not
It is connected with the first test side HEADSET_L_INT, the first test side HEADSET_L_INT output voltages are equal to operating voltage;
After earphone is inserted into, left channel interface L is connected with the first test side HEADSET_L_INT, the first test side HEADSET_L_
The voltage of INT obtains the voltage of operating voltage by resistance R2 and resistance R4, and the resistance value of usual resistance R2 is larger, generally
For hundreds of K Ω, the resistance value of resistance R4 is smaller, generally tens Ω, and the first test side HEADSET_L_INT is exported close to the low of 0V
Level.Therefore, the magnitude of voltage of the setting of the first reference voltage Vref 1 and operating voltage, the resistance value of resistance R2 and R4 are related.
Second detection unit 32 is adapted to detect for the signal of the second test side HEADMIC_IN, with the detection signal of output second
AUDIO_HEAD_INSERT。
In embodiments of the present invention, second detection unit 32 is suitable for comparing the second reference voltage Vref 2 and the second test side
The voltage of HEADMIC_IN, with the detection signal of output second AUDIO_HEAD_INSERT.Second detection signal AUDIO_HEAD_
INSERT is to represent whether the second test side HEADMIC_IN is connected with microphone interface MIC, such as the second detection signal
AUDIO_HEAD_INSERT can represent the second test side HEADMIC_IN and microphone interface respectively for high level or low level
MIC connections or the second test side HEADMIC_IN are not connected with microphone interface MIC.
Second reference voltage Vref 2 according to the second test side HEADMIC_IN and interface voltage input terminal HEADMICBIAS,
The connection structure of microphone interface MIC determines.Still by taking circuit shown in Fig. 1 as an example, when earphone is extracted or is not inserted into, microphone interface
MIC is not connected with the second test side HEADMIC_IN, and the second test side HEADMIC_IN output voltages are equal to interface voltage;When
After earphone insertion, microphone interface MIC is connected with the second test side HEADMIC_IN, when being triggered without button, the second detection
The voltage of HEADMIC_IN is held to be obtained by resistance R1 and microphone Mic to the voltage of interface voltage, when there is button triggering
When, the voltage of the second test side HEADMIC_IN passes through resistance R1 and parallel resistance(Microphone Mic is in parallel with button)To interface
Voltage obtains.Therefore, the magnitude of voltage of the setting of the second reference voltage Vref 2 and interface voltage, resistance R1 and microphone Mic
Resistance value it is related.
First judging unit 33 is suitable for the first detection signal AUDIO_HEAD_ exported by first detection unit 31
INSERT1 judges whether the first test side HEADSET_L_INT is connected with the left channel interface L of earphone.
Second judging unit 34 is suitable for when the judging result of the first judging unit 33 is yes, i.e. the first test side HEADSET_
During the left channel interface L connections of L_INT and earphone, the second detection signal AUDIO_ for being exported by second detection unit 32
HEAD_INSERT judges whether the second test side HEADMIC_IN is connected with the microphone interface MIC of earphone.
Confirmation unit 35 is suitable for when the judging result of the second judging unit 34 is yes, i.e. the second test side HEADSET_L_
During the microphone interface MIC connections of INT and earphone, earphone insertion is confirmed.
The confirmation unit is further adapted in the state of earphone is inserted into, when the signal based on first test side determines institute
State the first test side and left channel interface disconnects and the signal based on second test side determines second test side
When being disconnected with microphone interface, confirm that earphone is extracted.When it is implemented, institute can be judged by the first detection signal
State whether the first test side is connected with left channel interface, second test side and Mike are judged by the described second detection signal
Whether wind interface connects;It can also judge whether first test side connects with left channel interface by the voltage of the first test side
Connect, judge whether second test side is connected with microphone interface by the voltage of the second test side.
Further, the earphone detection circuit based on the embodiment of the present invention, the head circuit can also include starting control
Unit and closing control unit, the control unit that starts are suitable for when the judging result of first judging unit is yes, i.e. institute
When stating the left channel interface of the first test side and earphone and connecting, sentenced in second judging unit by the described second detection signal
Before whether disconnected second test side is connected with the microphone interface of earphone, start described to earphone interface circuit offer interface electricity
The circuit of pressure.The closing control unit is suitable for after confirming that earphone is extracted, and closes described to earphone interface circuit offer interface
The circuit of voltage.That is, when can be connected in first test side with the left channel interface of earphone, stop to described
Earphone interface circuit provides interface voltage, reduce further circuit power consumption to a certain extent.
The earphone detection circuit of the embodiment of the present invention can also include the detection circuit for test earphone button, the use
Available circuit, such as the circuit shown in Fig. 3, the detection signal of output can be used in the detection circuit of test earphone button
AUDIO_HEAD_BUTTON is referred to as button detection signal, for having indicated whether earphone keystroke triggering.Second test side
HEADMIC_IN can be additionally used in the push-button type that detection is triggered, as shown in figure 3, being examined when by the second test side HEADMIC_IN
When surveying earphone keystroke triggering, the setting of reference voltage VREF and the magnitude of voltage of interface voltage, resistance R1, microphone Mic and button
Resistance value it is related.The resistance value of different buttons is typically to differ, when different buttons is triggered, the second test side
The partial pressure value of HEADMIC_IN is also different, if being only by some button of the second test side HEADMIC_IN test earphones
It is not no when being triggered, the setting of reference voltage VREF and the magnitude of voltage of interface voltage, resistance R1, microphone Mic and detected press
The resistance value of key is related.
Further, since in the headset detection stage, it is identical with the sequential of interface voltage to detect the sequential of signal, is not continuous
Export high level, and detect signal can as the interrupt signal of subsequent conditioning circuit, if circuit design requirements interrupt signal for company
Continue signal, then the circuit that interface voltage is provided to earphone interface circuit of the embodiment of the present invention can also include:De-twitter circuit, is fitted
Debounce processing is carried out in the detection signal exported to the earphone detection circuit;Latch cicuit, suitable for defeated in the secondary signal
The detection signal after debounce processing is latched before going out.Specifically, the de-twitter circuit can be that the earphone detection circuit is exported
First detection signal, second detection signal or button detection signal carry out debounce processing;The latch cicuit is described second
The first detection signal after debounce processing, the second detection signal or button detection signal are latched before signal output, should with the output phase
Continuous signal to subsequent conditioning circuit.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this
In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the scope of restriction.