CN104698712A - Array base plate, liquid crystal display panel and display device - Google Patents

Array base plate, liquid crystal display panel and display device Download PDF

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Publication number
CN104698712A
CN104698712A CN201510160918.7A CN201510160918A CN104698712A CN 104698712 A CN104698712 A CN 104698712A CN 201510160918 A CN201510160918 A CN 201510160918A CN 104698712 A CN104698712 A CN 104698712A
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CN
China
Prior art keywords
array base
base palte
electrostatic protection
electrode layer
data line
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Granted
Application number
CN201510160918.7A
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Chinese (zh)
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CN104698712B (en
Inventor
刘莎
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to CN201510160918.7A priority Critical patent/CN104698712B/en
Publication of CN104698712A publication Critical patent/CN104698712A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals

Abstract

The invention discloses an array base plate, a liquid crystal display panel and a display device. The array base plate comprises a substrate base plate, a plurality of grid lines and data lines arranged on the substrate base plate, electrostatic protection return circuits arranged at one ends of one or more grid lines or data lines and connected with the grid lines or the data lines correspondingly and short-circuit rods correspondingly connected with the electrostatic protection return circuits, located on a perimeter zone and used for transmitting common voltage signals; the array base plate further comprises a transparency electrode layer located on the perimeter zone; the transparency electrode layer is electrically connected with each short-circuit rod through via holes; the projection of the transparency electrode layer and the grid lines or the data lines correspondingly connected with each electrostatic protection return circuit on the substrate base plate has an overlapping zone, and a filter capacitor is formed in the overlapping zone; when static electricity comes, the electrostatic protection return circuits are communicated, electrostatic charges are stored in the filter capacitor, and when the static electricity disappears, the electrostatic protection return circuits do not stop working immediately, the filter capacitor still maintains an open state, and the electrostatic charges are released slowly; accordingly, the role of electrostatic protection is played.

Description

A kind of array base palte, liquid crystal panel and display device
Technical field
The present invention relates to display technique field, espespecially a kind of array base palte, liquid crystal panel and display device.
Background technology
At present, common static discharge (Electro-Static Discharge, ESD) phenomenon in liquid crystal display product.ESD is a kind of electrostatic accumulation, by the phenomenon of electrostatic charge transfer release between different objects, the time of Electro-static Driven Comb is very short, generally only has nanosecond grade, electrostatic release within the time short like this can produce very large immediate current, electric current high like this, by device being burnt during integrated circuit, causes circuit cisco unity malfunction.Therefore, in liquid crystal display product, there is ESD phenomenon, usually can cause situation periphery design line occurring electrostatic breakdown short circuit or open circuit.
In the design of existing array base palte, as shown in Figure 1, general the end of signal wire 001 (grid line or data line) is provided with electrostatic protection loop 002 and the short bar 003 being connected electrostatic protection loop 002 and being positioned at neighboring area B, when electrostatic comes interim, electrostatic protection loop 002 conducting, the instantaneous pressure of the electrostatic existed in the A of viewing area can be derived by the short bar 003 connecting electrostatic protection loop 002, but it is too fast owing to producing the electrostatic time, when electrostatic one disappears, electrostatic protection loop 002 quits work at once, short bar 003 can have little time electrostatic charge to derive usually, still the phenomenon of electrostatic breakdown can be there is in the accumulation due to electrostatic charge, thus directly the yield of liquid crystal panel is produced in impact.
Therefore, how further the electrostatic on liquid crystal panel being played to the effect of protection, is the technical matters that those skilled in the art need solution badly.
Summary of the invention
In view of this; the embodiment of the present invention provides a kind of array base palte, liquid crystal panel and display device; add the transparent electrode layer be electrically connected with short bar in neighboring area, make to form filter capacitor between transparent electrode layer and signal wire, play the effect of electrostatic protection further.
Therefore, embodiments provide a kind of array base palte, comprise: underlay substrate, be arranged on many grid lines being positioned at the neighboring area of viewing area and encirclement viewing area on described underlay substrate and data line, be arranged on the electrostatic protection loop that connect corresponding to described grid line or data line, one end of grid line described at least one or data line, and corresponding with described electrostatic protection loop connect be positioned at described neighboring area and short bar for transmitting public voltage signal, also comprise: the transparent electrode layer being positioned at described neighboring area; Wherein,
Described transparent electrode layer is electrical connected by via hole and each described short bar;
The projection of described transparent electrode layer on described underlay substrate and the described grid line that connect corresponding to each described electrostatic protection loop or the projection of data line on described underlay substrate have overlapping region.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also comprise: the pixel electrode being positioned at described viewing area;
Described transparent electrode layer and described pixel electrode are with the same material of layer.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described transparent electrode layer is planar structure or list structure.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described electrostatic protection loop is made up of at least two transistor arrangements.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also comprise: on grid line described at least one or data line, there is extension, and the projection of described extension on described underlay substrate and the projection of described short bar on underlay substrate have overlapping region.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also comprise: described extension and described short bar are parallel to each other.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also comprise: the length of described extension is less than the bee-line between adjacent described grid line or data line.
The embodiment of the present invention additionally provides a kind of liquid crystal panel, comprises the subtend substrate and array base palte that are oppositely arranged, and the liquid crystal layer between described subtend substrate and array base palte;
Wherein, the above-mentioned array base palte that provides for the embodiment of the present invention of described array base palte.
The embodiment of the present invention additionally provides a kind of display device, comprises the above-mentioned liquid crystal panel that the embodiment of the present invention provides.
The beneficial effect of the embodiment of the present invention comprises:
A kind of array base palte, liquid crystal panel and display device that the embodiment of the present invention provides, comprise: underlay substrate, be arranged on many grid lines being positioned at the neighboring area of viewing area and encirclement viewing area on underlay substrate and data line, be arranged on the electrostatic protection loop that connect corresponding to grid line or data line, one end of at least one grid line or data line, and corresponding with electrostatic protection loop connect be positioned at neighboring area and short bar for transmitting public voltage signal, also comprise: the transparent electrode layer being positioned at neighboring area, transparent electrode layer is electrical connected by via hole and each short bar, the projection of transparent electrode layer on underlay substrate and the grid line that connect corresponding to each electrostatic protection loop or the projection of data line on underlay substrate have overlapping region, filter capacitor is formed between transparent electrode layer and the grid line that connects corresponding to each electrostatic protection loop or data line in overlapping region, when electrostatic comes interim, the conducting of electrostatic protection loop, electrostatic charge is stored on filter capacitor simultaneously, after electrostatic disappears, electrostatic protection loop does not quit work at once, filter capacitor has buffer action, can continue to maintain its opening, slowly electrostatic charge is discharged, and then play the effect of electrostatic protection, be beneficial to raising product yield.
Accompanying drawing explanation
Fig. 1 is the vertical view of array base palte in prior art;
One of vertical view of the array base palte that Fig. 2 a provides for the embodiment of the present invention;
The vertical view two of the array base palte that Fig. 2 b provides for the embodiment of the present invention;
The schematic diagram of electrostatic discharge protective circuit in the array base palte that Fig. 3 provides for the embodiment of the present invention;
The vertical view three of the array base palte that Fig. 4 a provides for the embodiment of the present invention;
The vertical view four of the array base palte that Fig. 4 b provides for the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of array base palte, liquid crystal panel and display device that the embodiment of the present invention provides is described in detail.
Wherein, in accompanying drawing, in array base palte, the shape of each parts and size do not reflect actual proportions, and object just signal illustrates content of the present invention.
Embodiments provide a kind of array base palte, as shown in figures 2 a and 2b, comprise: underlay substrate, be arranged on many grid lines being positioned at the neighboring area B of viewing area A and encirclement viewing area A on underlay substrate and data line, be arranged on the electrostatic protection loop 200 that connect corresponding to grid line or data line 100, one end of at least one grid line or data line 100, and corresponding with electrostatic protection loop 200 connect be positioned at neighboring area B and short bar 300 for transmitting public voltage signal, also comprise: the transparent electrode layer 400 being positioned at neighboring area B; Wherein,
This transparent electrode layer 400 is electrical connected by via hole and each short bar 300;
The projection of this transparent electrode layer 400 on underlay substrate and the grid line that connect corresponding to each electrostatic protection loop 200 or the projection of data line 100 on underlay substrate have overlapping region.
At the above-mentioned array base palte that the embodiment of the present invention provides, owing to adding transparent electrode layer in the neighboring area of array base palte, as shown in Figure 3, because this transparent electrode layer is electrical connected by via hole and each short bar, and the projection of transparent electrode layer on underlay substrate and the grid line that connect corresponding to each electrostatic protection loop or the projection of data line on underlay substrate have overlapping region, make to define first filter capacitor C between in overlapping region transparent electrode layer and the grid line that connects corresponding to each electrostatic protection loop or data line, when electrostatic comes interim, the conducting of electrostatic protection loop, electrostatic charge is stored on filter capacitor simultaneously, after electrostatic disappears, electrostatic protection loop does not quit work at once, filter capacitor has buffer action, can continue to maintain its opening, slowly electrostatic charge is discharged, and then play the effect of electrostatic protection.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also comprise: the pixel electrode being positioned at viewing area; In order on the basis of existing array base palte preparation technology, do not need to increase extra technique to make transparent electrode layer, transparent electrode layer can be set to pixel electrode with the same material of layer, so not only production cost can be saved, enhance productivity, the etching homogeneity of pixel electrode figure in viewing area can also be promoted, can not cause in the process owing to etching externally to inside and occur that in viewing area, uneven problem appears in pixel electrode figure.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, as shown in Figure 2 a, in order to save technique, transparent electrode layer 400 can be set to planar structure; Or as shown in Figure 2 b, in order to save material, transparent electrode layer 400 can be set to list structure.For the setting of transparency electrode Rotating fields, as long as transparent electrode layer meets projection on underlay substrate and the grid line that connect corresponding to each electrostatic protection loop or the projection of data line on underlay substrate have overlapping region, in this no limit.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, electrostatic protection loop is made up of at least two transistor arrangements, and particularly, as shown in Figure 2 a, electrostatic protection loop 200 can comprise: the first transistor T1 and transistor seconds T2; Wherein, the grid of the first transistor T1 is all connected with grid line or data line 100 with source electrode, and drain electrode is connected with short bar 300; The grid of transistor seconds T2 is all connected with short bar 300 with source electrode, and drain electrode is connected with grid line or data line 100.Certainly, the concrete structure for electrostatic protection loop has multiple, can also be other structures, can determine according to the actual requirements, in this no limit.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, as shown in Figs. 4a and 4b, also comprise: at least one grid line or data line 100, there is extension 500, and the projection of this extension 500 on underlay substrate and the projection of short bar 300 on underlay substrate have overlapping region.Owing to adding extension at least one grid line or data line, and the projection of this extension 500 on underlay substrate and the projection of short bar 300 on underlay substrate have overlapping region, make to define second filter capacitor between extension 500 and short bar 300 in overlapping region, like this, after forming pixel electrode figure, the effect of electrostatic protection only just can be played in prior art, in the technique of the array base palte provided in the actual fabrication embodiment of the present invention, just second filter capacitor can be formed between extension and short bar before formation pixel electrode figure, thus the electrostatic on liquid crystal panel is served to the effect of second class protection.
Further, in the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, as shown in Figs. 4a and 4b, in order to ensure that the projection of extension 500 on underlay substrate and the projection of short bar 300 on underlay substrate have overlapping region, extension 500 and short bar 300 can be parallel to each other.Certainly, in the specific implementation, the position relationship of extension and short bar can be determined according to the actual requirements, in this no limit.
Further, in the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, as shown in Figs. 4a and 4b, in order to prevent signal disturbing, the length of extension 500 is less than the bee-line between adjacent grid line or data line 100, avoids extension to extend to the problem another grid line or data line causing signal cross-talk.
The method for making of the array base palte provided with a concrete example detailed description embodiment of the present invention below, specifically comprises the following steps:
1, on underlay substrate, form the figure of common electrode layer;
In the specific implementation, underlay substrate deposits one deck ITO layer, formed the figure of common electrode layer by patterning processes;
2, on the underlay substrate being formed with public electrode layer pattern, form the figure of grid and grid line;
In the specific implementation, underlay substrate deposits one deck gate metal layer, formed the figure of grid and grid line by patterning processes;
3, on the underlay substrate being formed with grid and grid line figure, insulation course is formed;
4, active layer is formed with on the insulating layer;
5, on active layer, be formed with the figure of source-drain electrode layer and data line;
In the specific implementation, active layer deposits one deck source-drain electrode metal level, formed the figure of source-drain electrode layer and data line by patterning processes;
6, on source-drain electrode layer and data line, passivation layer is formed;
7, on the figure being formed with passivation layer, form the figure of pixel electrode and transparency electrode;
In the specific implementation, the figure of passivation layer deposits one deck ITO layer, by same patterning processes, form the figure of pixel electrode respectively in viewing area, and form the figure of transparency electrode in neighboring area; Wherein, transparency electrode be positioned at neighboring area and the data line transmitting common electrode signal is electrical connected by via hole.
So far, the above-mentioned steps 1 to 7 provided through concrete example has produced the above-mentioned array base palte that the embodiment of the present invention provides.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of liquid crystal panel, the array base palte comprising any one mode above-mentioned and the subtend substrate be oppositely arranged with this array base palte, and the liquid crystal layer between array base palte and subtend substrate.The enforcement of this liquid crystal panel see the embodiment of above-mentioned array base palte, can repeat part and repeats no more.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display device, comprise the above-mentioned liquid crystal panel that the embodiment of the present invention provides, this display device can be: any product or parts with Presentation Function such as mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.Other requisite ingredient for this display device is and will be understood by those skilled in the art that to have, and does not repeat at this, also should as limitation of the present invention.The enforcement of this display device see the embodiment of above-mentioned liquid crystal panel, can repeat part and repeats no more.
A kind of array base palte, liquid crystal panel and display device that the embodiment of the present invention provides, comprise: underlay substrate, be arranged on many grid lines being positioned at the neighboring area of viewing area and encirclement viewing area on underlay substrate and data line, be arranged on the electrostatic protection loop that connect corresponding to grid line or data line, one end of at least one grid line or data line, and corresponding with electrostatic protection loop connect be positioned at neighboring area and short bar for transmitting public voltage signal, also comprise: the transparent electrode layer being positioned at neighboring area, transparent electrode layer is electrical connected by via hole and each short bar, the projection of transparent electrode layer on underlay substrate and the grid line that connect corresponding to each electrostatic protection loop or the projection of data line on underlay substrate have overlapping region, filter capacitor is formed between transparent electrode layer and the grid line that connects corresponding to each electrostatic protection loop or data line in overlapping region, when electrostatic comes interim, the conducting of electrostatic protection loop, electrostatic charge is stored on filter capacitor simultaneously, after electrostatic disappears, electrostatic protection loop does not quit work at once, filter capacitor has buffer action, can continue to maintain its opening, slowly electrostatic charge is discharged, and then play the effect of electrostatic protection, be beneficial to raising product yield.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (9)

1. an array base palte, comprise: underlay substrate, be arranged on many grid lines being positioned at the neighboring area of viewing area and encirclement viewing area on described underlay substrate and data line, be arranged on the electrostatic protection loop that connect corresponding to described grid line or data line, one end of grid line described at least one or data line, and corresponding with described electrostatic protection loop connect be positioned at described neighboring area and short bar for transmitting public voltage signal, it is characterized in that, also comprise: the transparent electrode layer being positioned at described neighboring area; Wherein,
Described transparent electrode layer is electrical connected by via hole and each described short bar;
The projection of described transparent electrode layer on described underlay substrate and the described grid line that connect corresponding to each described electrostatic protection loop or the projection of data line on described underlay substrate have overlapping region.
2. array base palte as claimed in claim 1, is characterized in that, also comprise: the pixel electrode being positioned at described viewing area;
Described transparent electrode layer and described pixel electrode are with the same material of layer.
3. array base palte as claimed in claim 2, it is characterized in that, described transparent electrode layer is planar structure or list structure.
4. array base palte as claimed in claim 1, it is characterized in that, described electrostatic protection loop is made up of at least two transistor arrangements.
5. array base palte as claimed in claim 1, it is characterized in that, also comprise: on grid line described at least one or data line, there is extension, and the projection of described extension on described underlay substrate and the projection of described short bar on underlay substrate have overlapping region.
6. array base palte as claimed in claim 5, it is characterized in that, described extension and described short bar are parallel to each other.
7. array base palte as claimed in claim 6, it is characterized in that, the length of described extension is less than the bee-line between adjacent described grid line or data line.
8. a liquid crystal panel, is characterized in that, comprises the subtend substrate and array base palte that are oppositely arranged, and the liquid crystal layer between described subtend substrate and array base palte;
Wherein, described array base palte is the array base palte described in any one of claim 1-7.
9. a display device, is characterized in that, comprises liquid crystal panel as claimed in claim 8.
CN201510160918.7A 2015-04-07 2015-04-07 A kind of array base palte, liquid crystal panel and display device Active CN104698712B (en)

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Cited By (2)

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CN104991390A (en) * 2015-07-28 2015-10-21 上海中航光电子有限公司 Driving circuit of display panel, display panel comprising driving circuit and displayer
CN106200172A (en) * 2016-07-14 2016-12-07 京东方科技集团股份有限公司 A kind of array base palte and display device

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US20070279543A1 (en) * 2006-06-05 2007-12-06 Lg.Philips Lcd Co., Ltd. Liquid crystal display and fabricating method thereof
CN102629049A (en) * 2011-07-18 2012-08-08 京东方科技集团股份有限公司 Electrostatic protection structure, array substrate, liquid crystal panel and display device
CN103943611A (en) * 2013-02-22 2014-07-23 上海天马微电子有限公司 Array substrate and panel

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Publication number Priority date Publication date Assignee Title
JP2000338514A (en) * 1999-05-31 2000-12-08 Hitachi Ltd Liquid crystal display device
TW200405242A (en) * 2002-07-05 2004-04-01 Chi Mei Optoelectronics Corp Image display element and image display device
US20070279543A1 (en) * 2006-06-05 2007-12-06 Lg.Philips Lcd Co., Ltd. Liquid crystal display and fabricating method thereof
CN102629049A (en) * 2011-07-18 2012-08-08 京东方科技集团股份有限公司 Electrostatic protection structure, array substrate, liquid crystal panel and display device
CN103943611A (en) * 2013-02-22 2014-07-23 上海天马微电子有限公司 Array substrate and panel

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Publication number Priority date Publication date Assignee Title
CN104991390A (en) * 2015-07-28 2015-10-21 上海中航光电子有限公司 Driving circuit of display panel, display panel comprising driving circuit and displayer
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CN106200172A (en) * 2016-07-14 2016-12-07 京东方科技集团股份有限公司 A kind of array base palte and display device

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