CN104639141A - Switching circuit and terminal with circuit - Google Patents
Switching circuit and terminal with circuit Download PDFInfo
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- CN104639141A CN104639141A CN201510098023.5A CN201510098023A CN104639141A CN 104639141 A CN104639141 A CN 104639141A CN 201510098023 A CN201510098023 A CN 201510098023A CN 104639141 A CN104639141 A CN 104639141A
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- potential holding
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Abstract
The invention discloses a switching circuit and a terminal with the circuit. The switching circuit comprises a first potential holding circuit, a switch key K1, a delay circuit and a second potential holding circuit, wherein one end of the first potential holding circuit is connected with an end point 1 of the switch key K1, and the other end of the first potential holding circuit is connected with the second potential holding circuit; an end point 2 of the switch key K1 is connected with one end of the delay circuit; the other end of the delay circuit is connected with the other end of the second potential holding circuit. According to the technical scheme, a switching function is realized through a hardware switch circuit structure, and an MCU (Micro Control Unit) is not required for matching, so that extra input output pins for realizing the switching function of the MCU are saved, the MCU design cost is reduced, and the circuit board design space is saved.
Description
Technical field
The present invention relates to electric and electronic technical field, particularly a kind of switching circuit and there is the terminal of this circuit.
Background technology
Along with the development of science and technology, more and more wearable smart electronics product appears in the middle of daily life, changes everybody daily life.Such as: electronics bracelet in wearable smart electronics product, demand fulfillment is under space layout condition little as far as possible in the design process, realizes powerful function and supports.
Like this, design in wearable smart electronics product process inventor, find that in prior art, at least there are the following problems:
The power on/off function that existing wearable smart electronics product uses is substantially all universal input/output (the General Purpose Input Output by control chip MCU, be called for short GPIO) realize, implementation is by once starting shooting, long by shutdown.Like this, just need MCU to configure extra I/O pin and realize, thus add the design cost of MCU, and extra design space.
Summary of the invention
In view of the above problems, proposing the present invention to provide a kind of overcomes the problems referred to above or solves the problem at least in part, and technical scheme of the present invention is achieved in that
On the one hand, the invention provides a kind of switching circuit, comprising: the first current potential holding circuit, switch key K1, delay circuit and the second current potential holding circuit;
Described first current potential holding circuit one end is connected with described switch key K1 end points 1, and the other end is connected with described second current potential holding circuit;
Described switch key K1 end points 2 is connected with described delay circuit one end;
The described delay circuit other end is connected with the described second current potential holding circuit other end.
Preferably, described first current potential holding circuit comprises: the first switching tube Q1, second switch pipe Q2, the first resistance R1, the second resistance R2, the 6th resistance R6;
Described first switching tube Q1 emitter is connected with described first resistance R1 one end, described first switching tube Q1 collector electrode respectively with described 6th resistance R6 one end, described second switch pipe Q2 base stage be connected; Described first switching tube Q1 base stage is connected with described second current potential holding circuit;
Described first another termination power of resistance R1;
Described 6th resistance R6 other end ground connection;
Described second switch pipe Q2 collector electrode respectively with described second resistance R2 one end, described switch key K1 end points 1 is connected; Described second switch pipe Q2 grounded emitter;
Described second another termination power of resistance R2.
Preferably, described delay circuit comprises: the first electric capacity C1 and the 3rd resistance R3;
Described first electric capacity C1 one end respectively with described switch key K1 end points 2, described resistance R3 one end be connected; A described electric capacity C1 other end ground connection;
Second current potential holding circuit described in described 3rd another termination of resistance R3.
Preferably, described second current potential holding circuit comprises: the 4th resistance R4, the 5th resistance R5, the 7th resistance R7, the 8th resistance R8, inverter U1, the 3rd switching tube Q3, the 4th switching tube Q4, the 5th switching tube Q5;
Described 4th switching tube Q4 base stage respectively with described 3rd resistance R3 one end, described 7th resistance R7 one end, described 3rd switching tube Q3 collector electrode be connected; Described 4th switching tube Q4 collector electrode respectively with described 4th resistance R4 one end, described 5th switching tube Q5 base stage be connected; Described 4th switching tube Q4 grounded emitter;
Described 7th resistance R7 other end ground connection;
Described 4th another termination power of resistance R4;
Described 5th switching tube Q5 collector electrode respectively with described 5th resistance R5 one end, control export and described inverter U1 positive terminal be connected; Described 5th switching tube Q5 grounded emitter;
Described 5th another termination power of resistance R5;
Described inverter U1 negative pole end respectively with described first switching tube Q1 base stage, described 3rd switching tube Q3 base stage be connected;
Described 3rd switching tube Q3 emitter is connected with described 8th resistance R8 one end;
Described 8th another termination power of resistance R8.
Preferably, described 6th resistance R6 and described 7th resistance R7 is pull down resistor.
On the other hand, the invention provides a kind of terminal, comprising: any one switching circuit as above.
The switching circuit that technical scheme of the present invention is built by hardware, the switching function that can achieve wearable electronic product is coordinated without the need to MCU, thus save MCU and realize the extra input and output pin of switching function, the MCU design cost of reduction, saves board design space.
Accompanying drawing explanation
A kind of switching circuit structure schematic diagram that Fig. 1 provides for the embodiment of the present invention;
A kind of switching circuit figure that Fig. 2 provides for the embodiment of the present invention;
A kind of terminal structure schematic diagram that Fig. 3 provides for the embodiment of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
As a kind of switching circuit that Fig. 1 provides for being depicted as the embodiment of the present invention; This circuit comprises: the first current potential holding circuit, switch key K1, delay circuit and the second current potential holding circuit;
Described first current potential holding circuit one end is connected with described switch key K1 end points 1, and the other end is connected with described second current potential holding circuit;
Described switch key K1 end points 2 is connected with described delay circuit one end;
The described delay circuit other end is connected with the described second current potential holding circuit other end.
Based on above embodiment, as shown in Figure 2, be a kind of switching circuit that the embodiment of the present invention provides; This circuit comprises: the first current potential holding circuit, switch key K1, delay circuit and the second current potential holding circuit;
Described first current potential holding circuit comprises: the first switching tube Q1, second switch pipe Q2, the first resistance R1, the second resistance R2, the 6th resistance R6;
Described first switching tube Q1 emitter is connected with described first resistance R1 one end, described first switching tube Q1 collector electrode respectively with described 6th resistance R6 one end, described second switch pipe Q2 base stage be connected; Described first switching tube Q1 base stage is connected with described second current potential holding circuit;
Described first another termination power of resistance R1;
Described 6th resistance R6 other end ground connection;
Described second switch pipe Q2 collector electrode respectively with described second resistance R2 one end, described switch key K1 end points 1 is connected; Described second switch pipe Q2 grounded emitter;
Described second another termination power of resistance R2.
Described delay circuit comprises: the first electric capacity C1 and the 3rd resistance R3;
Described first electric capacity C1 one end respectively with described switch key K1 end points 2, described resistance R3 one end be connected; A described electric capacity C1 other end ground connection;
Second current potential holding circuit described in described 3rd another termination of resistance R3.
Described second current potential holding circuit comprises: the 4th resistance R4, the 5th resistance R5, the 7th resistance R7, the 8th resistance R8, inverter U1, the 3rd switching tube Q3, the 4th switching tube Q4, the 5th switching tube Q5;
Described 4th switching tube Q4 base stage respectively with described 3rd resistance R3 one end, described 7th resistance R7 one end, described 3rd switching tube Q3 collector electrode be connected; Described 4th switching tube Q4 collector electrode respectively with described 4th resistance R4 one end, described 5th switching tube Q5 base stage be connected; Described 4th switching tube Q4 grounded emitter;
Described 7th resistance R7 other end ground connection;
Described 4th another termination power of resistance R4;
Described 5th switching tube Q5 collector electrode respectively with described 5th resistance R5 one end, control export and described inverter U1 positive terminal be connected; Described 5th switching tube Q5 grounded emitter;
Described 5th another termination power of resistance R5;
Described inverter U1 negative pole end respectively with described first switching tube Q1 base stage, described 3rd switching tube Q3 base stage be connected;
Described 3rd switching tube Q3 emitter is connected with described 8th resistance R8 one end;
Described 8th another termination power of resistance R8.
Preferably, described 6th resistance R6 and described 7th resistance R7 is pull down resistor.
To divide into the switching tube Q1 in the present embodiment, Q3 is PNP triode; Q2, Q4, Q5 are NPN triode; First electric capacity C1 and the 3rd resistance R3 forms delay circuit; Described first electric capacity C1 mainly energy storage effect; Resistance R6, R7 are pull down resistors, provide initial condition; Below the principle that realizes of the present embodiment is described in detail:
Initial condition, switch key K1 is in off-state, and switching tube Q4 base stage is low level because described 7th resistance R7 is drop-down, described switching tube Q4 current collection very high level, described switching tube Q5 base stage is high level, described switching tube Q5 conducting, controls to export as low level.
Described inverter U1 oppositely rear described switching tube Q3 base stage is high level, and described switching tube Q3 ends.
Described switching tube Q1 base stage is ended for switching tube Q1 described in high level, and described switching tube Q2 base stage is low level because described 6th resistance R6 is drop-down.Because described second resistance R2 is pulled upward to high level.Described switching tube Q2 collector electrode exports as high level.
Such switch key K1 end points 1 is high level, and end points 2 is low level
First time unclamps after pressing switch key K1, end points 2 and end points 1 transient switching of switch key.End points 2 is high level, described first electric capacity C1 charges, then after described 3rd resistance R3 postpones, described switching tube Q4 base stage high level is provided, described switching tube Q4 conducting, described switching tube Q4 collector electrode output low level. described switching tube Q5 ends, collector electrode exports as high level, and controlling to export also is high level.
Meanwhile, inverter U1 is rear output low level oppositely, and described switching tube Q3 conducting, described switching tube Q3 launches very high level.Maintain the high level of described switching tube Q4 base stage like this.
Described switching tube Q1 base stage is low level simultaneously, described switching tube Q1 conducting, and described switching tube Q2 base stage is high level, described switching tube Q2 conducting, and described switching tube Q2 collector electrode exports as low level, and described switch key K1 end points 1 is low level.
Unclamp after again pressing switch key K1, end points 2 and end points 1 transient switching of switch key K1.Because first time button aft terminal 1 is low level, end points 2 becomes low level, and described first electric capacity C1 discharges, and then draws as low level by described switching tube Q4 base stage after described 3rd resistance R3 postpones, described switching tube Q4 ends, and described switching tube Q4 collector electrode exports high level.Described switching tube Q5 conducting, collector electrode exports as low level, and controlling to export also is low level.
Meanwhile, described inverter U1 oppositely exports high level afterwards, and described switching tube Q3 ends, and described switching tube Q3 launches very low level.Drop-down like this due to described 7th resistance R7, maintains the low level of described switching tube Q4 base stage.
Described switching tube Q1 base stage is high level simultaneously, and described switching tube Q1 ends, and described switching tube Q2 base stage is low level, and described switching tube Q2 ends, and described switching tube Q2 collector electrode exports as high level, and switch key K1 end points 2 is low level.
By above-mentioned principle analysis, the control output state that pushes button successively alternately can be low and high level thus realize the function of start and close.
It should be noted that, described switching tube is not only confined to triode, can also be metal-oxide-semiconductor etc. other can realize the device of switching function.
As shown in Figure 3, be a kind of terminal that the embodiment of the present invention provides; This terminal comprises: any one switching circuit as mentioned above.
It should be noted that, what the switching circuit that the embodiment of the present invention provides adopted is that a kind of pure hardware is built, without the need to the switching circuit that MCU coordinates, so not only can save the GPIO quantity of MCU, decrease the pin of MCU as much as possible, thus reduce the cost of MCU, also save the space of product simultaneously.
The foregoing is only preferred embodiment of the present invention, be not intended to limit protection scope of the present invention.All any amendments done within the spirit and principles in the present invention, equivalent replacement, improvement etc., be all included in protection scope of the present invention.
Claims (10)
1. a switching circuit, is characterized in that, comprising: the first current potential holding circuit, switch key K1, delay circuit and the second current potential holding circuit;
Described first current potential holding circuit one end is connected with described switch key K1 end points 1, and the other end is connected with described second current potential holding circuit;
Described switch key K1 end points 2 is connected with described delay circuit one end;
The described delay circuit other end is connected with the described second current potential holding circuit other end.
2. switching circuit according to claim 1, is characterized in that, described first current potential holding circuit comprises: the first switching tube Q1, second switch pipe Q2, the first resistance R1, the second resistance R2, the 6th resistance R6;
Described first switching tube Q1 emitter is connected with described first resistance R1 one end, described first switching tube Q1 collector electrode respectively with described 6th resistance R6 one end, described second switch pipe Q2 base stage be connected; Described first switching tube Q1 base stage is connected with described second current potential holding circuit;
Described first another termination power of resistance R1;
Described 6th resistance R6 other end ground connection;
Described second switch pipe Q2 collector electrode respectively with described second resistance R2 one end, described switch key K1 end points 1 is connected; Described second switch pipe Q2 grounded emitter;
Described second another termination power of resistance R2.
3. switching circuit according to claim 2, is characterized in that, described delay circuit comprises: the first electric capacity C1 and the 3rd resistance R3;
Described first electric capacity C1 one end respectively with described switch key K1 end points 2, described resistance R3 one end be connected; A described electric capacity C1 other end ground connection;
Second current potential holding circuit described in described 3rd another termination of resistance R3.
4. switching circuit according to claim 3, is characterized in that, described second current potential holding circuit comprises: the 4th resistance R4, the 5th resistance R5,7th resistance R7, the 8th resistance R8, inverter U1,3rd switching tube Q3, the 4th switching tube Q4, the 5th switching tube Q5;
Described 4th switching tube Q4 base stage respectively with described 3rd resistance R3 one end, described 7th resistance R7 one end, described 3rd switching tube Q3 collector electrode be connected; Described 4th switching tube Q4 collector electrode respectively with described 4th resistance R4 one end, described 5th switching tube Q5 base stage be connected; Described 4th switching tube Q4 grounded emitter;
Described 7th resistance R7 other end ground connection;
Described 4th another termination power of resistance R4;
Described 5th switching tube Q5 collector electrode respectively with described 5th resistance R5 one end, control export and described inverter U1 positive terminal be connected; Described 5th switching tube Q5 grounded emitter;
Described 5th another termination power of resistance R5;
Described inverter U1 negative pole end respectively with described first switching tube Q1 base stage, described 3rd switching tube Q3 base stage be connected;
Described 3rd switching tube Q3 emitter is connected with described 8th resistance R8 one end;
Described 8th another termination power of resistance R8.
5. switching circuit according to claim 4, is characterized in that, described 6th resistance R6 and described 7th resistance R7 is pull down resistor.
6. a terminal, is characterized in that, comprising: switching circuit; Described switching circuit comprises: the first current potential holding circuit, switch key K1, delay circuit and the second current potential holding circuit;
Described first current potential holding circuit one end is connected with described switch key K1 end points 1, and the other end is connected with described second current potential holding circuit;
Described switch key K1 end points 2 is connected with described delay circuit one end;
The described delay circuit other end is connected with the described second current potential holding circuit other end.
7. terminal according to claim 6, is characterized in that, described first current potential holding circuit comprises: the first switching tube Q1, second switch pipe Q2, the first resistance R1, the second resistance R2, the 6th resistance R6;
Described first switching tube Q1 emitter is connected with described first resistance R1 one end, described first switching tube Q1 collector electrode respectively with described 6th resistance R6 one end, described second switch pipe Q2 base stage be connected; Described first switching tube Q1 base stage is connected with described second current potential holding circuit;
Described first another termination power of resistance R1;
Described 6th resistance R6 other end ground connection;
Described second switch pipe Q2 collector electrode respectively with described second resistance R2 one end, described switch key K1 end points 1 is connected; Described second switch pipe Q2 grounded emitter;
Described second another termination power of resistance R2.
8. terminal according to claim 7, is characterized in that, described delay circuit comprises: the first electric capacity C1 and the 3rd resistance R3;
Described first electric capacity C1 one end respectively with described switch key K1 end points 2, described resistance R3 one end be connected; A described electric capacity C1 other end ground connection;
Second current potential holding circuit described in described 3rd another termination of resistance R3.
9. terminal according to claim 8, is characterized in that, described second current potential holding circuit comprises: the 4th resistance R4, the 5th resistance R5, the 7th resistance R7, the 8th resistance R8, inverter U1, the 3rd switching tube Q3, the 4th switching tube Q4, the 5th switching tube Q5;
Described 4th switching tube Q4 base stage respectively with described 3rd resistance R3 one end, described 7th resistance R7 one end, described 3rd switching tube Q3 collector electrode be connected; Described 4th switching tube Q4 collector electrode respectively with described 4th resistance R4 one end, described 5th switching tube Q5 base stage be connected; Described 4th switching tube Q4 grounded emitter;
Described 7th resistance R7 other end ground connection;
Described 4th another termination power of resistance R4;
Described 5th switching tube Q5 collector electrode respectively with described 5th resistance R5 one end, control export and described inverter U1 positive terminal be connected; Described 5th switching tube Q5 grounded emitter;
Described 5th another termination power of resistance R5;
Described inverter U1 negative pole end respectively with described first switching tube Q1 base stage, described 3rd switching tube Q3 base stage be connected;
Described 3rd switching tube Q3 emitter is connected with described 8th resistance R8 one end;
Described 8th another termination power of resistance R8.
10. terminal according to claim 9, is characterized in that, described 6th resistance R6 and described 7th resistance R7 is pull down resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510098023.5A CN104639141B (en) | 2015-03-05 | 2015-03-05 | A kind of switching circuit and terminal with the circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510098023.5A CN104639141B (en) | 2015-03-05 | 2015-03-05 | A kind of switching circuit and terminal with the circuit |
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| Publication Number | Publication Date |
|---|---|
| CN104639141A true CN104639141A (en) | 2015-05-20 |
| CN104639141B CN104639141B (en) | 2018-07-31 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201510098023.5A Active CN104639141B (en) | 2015-03-05 | 2015-03-05 | A kind of switching circuit and terminal with the circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08223017A (en) * | 1995-02-15 | 1996-08-30 | Nippondenso Co Ltd | Power-on and power-off reset device |
| CN102332898A (en) * | 2011-08-17 | 2012-01-25 | 深圳市英唐数码电器有限公司 | Switching circuit with zero standby power consumption |
| CN102508536A (en) * | 2011-10-28 | 2012-06-20 | 惠而邦电子衡器（昆山）有限公司 | One-button startup and shutdown circuit in embedded system and control method thereof |
| CN202551001U (en) * | 2012-04-26 | 2012-11-21 | 深圳市禹欣鑫电子有限公司 | Electronic switching circuit |
| CN102929161A (en) * | 2012-10-18 | 2013-02-13 | 台衡精密测控(昆山)股份有限公司 | Full hardware startup and shutdown circuit |
| CN204517782U (en) * | 2015-03-05 | 2015-07-29 | 青岛歌尔声学科技有限公司 | A kind of switching circuit and there is the terminal of this circuit |
-
2015
- 2015-03-05 CN CN201510098023.5A patent/CN104639141B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08223017A (en) * | 1995-02-15 | 1996-08-30 | Nippondenso Co Ltd | Power-on and power-off reset device |
| CN102332898A (en) * | 2011-08-17 | 2012-01-25 | 深圳市英唐数码电器有限公司 | Switching circuit with zero standby power consumption |
| CN102508536A (en) * | 2011-10-28 | 2012-06-20 | 惠而邦电子衡器（昆山）有限公司 | One-button startup and shutdown circuit in embedded system and control method thereof |
| CN202551001U (en) * | 2012-04-26 | 2012-11-21 | 深圳市禹欣鑫电子有限公司 | Electronic switching circuit |
| CN102929161A (en) * | 2012-10-18 | 2013-02-13 | 台衡精密测控(昆山)股份有限公司 | Full hardware startup and shutdown circuit |
| CN204517782U (en) * | 2015-03-05 | 2015-07-29 | 青岛歌尔声学科技有限公司 | A kind of switching circuit and there is the terminal of this circuit |
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| Publication number | Publication date |
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| CN104639141B (en) | 2018-07-31 |
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Effective date of registration: 20180222 Address after: Two road 523000 Guangdong city of Dongguan province Dongguan Songshan Lake high tech Industrial Development Zone, No. 9 building EB206 eastriver headquarters Applicant after: GoerTek Intelligent Technology Co., Ltd. Address before: International Exhibition Center of wealth 18 No. 266061 Shandong province Qingdao city Laoshan District No. 3 Qinling Mountains Road, building 5 floor Applicant before: Qingdao GoerTek Co., Ltd. |
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