CN104617830A - Counter electromotive force zero-cross detection method and method of brushless DC motor, and phase-changing signal output method and circuit - Google Patents
Counter electromotive force zero-cross detection method and method of brushless DC motor, and phase-changing signal output method and circuit Download PDFInfo
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- CN104617830A CN104617830A CN201510082037.8A CN201510082037A CN104617830A CN 104617830 A CN104617830 A CN 104617830A CN 201510082037 A CN201510082037 A CN 201510082037A CN 104617830 A CN104617830 A CN 104617830A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/14—Electronic commutators
- H02P6/16—Circuit arrangements for detecting position
- H02P6/18—Circuit arrangements for detecting position without separate position detecting elements
- H02P6/182—Circuit arrangements for detecting position without separate position detecting elements using back-emf in windings
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Abstract
The invention provides counter electromotive force zero-cross detection method and method of a brushless DC motor, and phase-changing signal output method and circuit. The phase-changing signal output method comprises the steps of sampling a lower envelope of voltage of an analog neutral point to obtain a lower envelope signal; respectively inputting the lower envelope signal and the second reference voltage into the first input end and the second input end of a comparison circuit to enable the comparison circuit to enter an output maintaining state at the motor phase changing time; maintaining a level signal of previous time; comparing the voltage of the lower envelope signal with the preset second reference voltage by the comparison circuit at time out of the motor phase-changing time; outputting the compared level signal according to the comparing result; generating and outputting a phase-changing signal according to the compared level signal, wherein the phase-changing signal is used for triggering motor phase changing. According to the technical scheme, the method has the advantages that that accuracy of switching control of a power tube in a power level circuit of the motor can be improved; in addition, a filter and a bus voltage sampling circuit are saved, which is beneficial for the miniaturization and integration of the circuit.
Description
Technical field
The present invention relates to electronic applications, particularly relate to a kind of back electromotive force zero passage detection method of brshless DC motor, circuit and commutation signal output intent, circuit.
Background technology
Brshless DC motor is the circuit that utilizes electronic switching tube to form and replaces a kind of direct current machine of brush and commutator.
Shown in Figure 1, electric system mainly comprises power stage circuit 101 and triple-frequency harmonics testing circuit, power stage circuit 101 is made up of three groups of cascaded switch circuit 103 and three-phase brushless dc motor 10, often organize the switching tube that cascaded switch circuit 103 comprises two series connection, the first end often organizing cascaded switch circuit 103 receives busbar voltage Vm, second end ground connection, common node between two switching tubes often organizing cascaded switch circuit 103 is connected with three-phase brushless dc motor 10, the each phase controlling motor 10 by controlling often to organize cascaded switch circuit 103, thus control the rotor of motor 10.Triple-frequency harmonics testing circuit comprises neutral point analog circuit 104, back electromotive force zero cross detection circuit 105 and ON-OFF control circuit 106.
Neutral point analog circuit 104 is for the neutral point of simulated machine 10 inside, the voltage VN of simulated machine 10 internal neutral point with the voltage VNE of simulation neutral point NE in neutral point analog circuit 104, wherein, the voltage VN of neutral point and the voltage signal of simulation neutral point NE are third harmonic voltage signal.Back electromotive force zero cross detection circuit 105 generates the back electromotive force zero cross signal V_zero_crossing of motor 10 according to the third harmonic voltage signal of neutral point, the ON-OFF control circuit 106 of motor is according to back electromotive force zero cross signal V_zero_crossing, generate commutation signal V_change_phase to control the switching tube of each cascade switching circuit 103, and control the work of each phase of motor 10.
Shown in Figure 2, the harmonic signal VNE that property point NE place in simulations obtains by prior art, the dividing potential drop of motor busbar voltage Vm input to the comparator 1051 as back electromotive force zero cross detection circuit 105 respectively, comparator 1051 compares the dividing potential drop of third harmonic voltage signal VNE, motor busbar voltage Vm, obtains the back electromotive force zero cross signal V_zero_crossing of motor.
But the present inventor is carrying out finding in R&D process of the present invention that prior art shown in Fig. 2 at least exists following shortcoming:
Technical scheme shown in Fig. 2 requires high to the output antijamming capability of comparator 1051, once make a mistake signal at the input of comparator 1051, then the logic that comparator 1051 is follow-up will be upset, and causes the poor robustness of back electromotive force zero passage detection.And technical scheme shown in employing Fig. 2, need the peripheral circuit of the dividing potential drop circuit shown in the back electromotive force zero cross signal V_zero_crossing of output motor, Fig. 2 for comparator 1051 compares accessing busbar voltage Vm complicated, be unfavorable for system compact.
Shown in Figure 3, in order to reduce the interference of circuit shown in Fig. 2, improve the robustness of circuit, Fig. 3 connects a low pass filter 201 before comparator 1051, to carry out filtering, filtering interfering to the third harmonic voltage signal inputing to comparator 1051.
But the present inventor is carrying out finding in R&D process of the present invention that prior art shown in Fig. 3 at least exists following shortcoming:
Although the introducing of filter improves the accuracy of detection, but the introducing of filter can cause back electromotive force zero cross signal V_zero_crossing to there is phase delay, and (added filter is low pass filter, phase delay is about 90 °), motor can bring after reaction due to delayed phase when variable motion and load variations, back electromotive force zero passage detection error can be caused, in addition, low pass filter 201 needs to be made up of larger energy-storage travelling wave tube, is unfavorable for the system integration.
Summary of the invention
One of embodiment of the present invention object is to provide a kind of back electromotive force zero passage detection method of brshless DC motor, circuit and commutation signal output intent, circuit.Apply this technical scheme and can improve switch control rule accuracy to the power tube in the power stage circuit of motor, and the present embodiment technical scheme is without the need to filter, busbar voltage sample circuit, is conducive to miniaturization and the circuit integration of realizing circuit.
First aspect, the back electromotive force zero passage detection method of a kind of brshless DC motor that the embodiment of the present invention provides, comprising:
The lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
The first reference voltage preset according to the power stage circuit of described motor is equaled at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, export back electromotive force zero cross signal, described back electromotive force zero cross signal is for characterizing the back electromotive force zero passage of described motor.
In conjunction with first aspect, under the first implementation, described first reference voltage sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit of phase each in described power stage circuit, lower switching tube.
In conjunction with first aspect, under the first implementation, equal the first reference voltage preset according to the power stage circuit of described motor at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, exports back electromotive force zero cross signal, comprise,
Described lower envelope signal, described first reference voltage are inputed to respectively first input end, second input of comparison circuit, make in the described motor commutation moment, described comparison circuit is in output hold mode, kept the level signal in a upper moment, in the non-motor commutation moment, voltage, first reference voltage of the more described lower envelope signal of described comparison circuit, the first comparative level signal is exported according to comparative result, in the hopping edge moment of described first comparative level signal, export described back electromotive force zero cross signal;
In conjunction with first aspect, under the first implementation, equal the first reference voltage preset according to the power stage circuit of described motor at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, exports back electromotive force zero cross signal, comprise,
According to voltage and the described first reference voltage comparative result of described lower envelope signal, export the second comparative level signal, if the hopping edge moment of current described second comparative level signal is not the described motor commutation moment, then in the hopping edge moment of current described second comparative level signal, export described back electromotive force zero cross signal, if the hopping edge moment of current described second comparative level signal is the described motor commutation moment, then do not export described back electromotive force zero cross signal.
Second aspect, the output intent of the commutation signal of a kind of brshless DC motor that the embodiment of the present invention provides, comprising:
The lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
Described lower envelope signal, the second reference voltage are inputed to respectively first input end, second input of comparison circuit, make in the motor commutation moment, described comparison circuit is in output hold mode, kept the level signal in a upper moment, in the non-motor commutation moment, the voltage of described comparison circuit more described lower envelope signal and the second predetermined reference voltage, export comparative level signal according to comparative result;
According to described comparative level signal, generate and export commutation signal, described commutation signal is for triggering described motor commutation.
In conjunction with second aspect, under the first implementation, according to described comparative level signal, export commutation signal, comprising:
When described first input end is normal phase input end, in the mid point moment of the positive half cycle of described comparative level signal, export described commutation signal,
When described first input end is inverting input, in the mid point moment of the negative half period of described comparative level signal, export described commutation signal.
The third aspect, the back electromotive force zero cross detection circuit of a kind of brshless DC motor that the embodiment of the present invention provides, comprising:
Sample circuit, for the lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
Back electromotive force zero cross signal generative circuit, for equaling the first reference voltage preset according to the power stage circuit of described motor at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, export back electromotive force zero cross signal, described back electromotive force zero cross signal is for characterizing the back electromotive force zero passage of current described motor.
In conjunction with the third aspect, under the first implementation, described sample circuit, when the switching tube specifically for working in PWM mode in described power stage circuit is in off state, sample the voltage of described simulation neutral point, the voltage signal obtained is described lower envelope signal.
In conjunction with the third aspect, under the first implementation, described first reference voltage sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit of phase each in described power stage circuit, lower switching tube.
In conjunction with the third aspect, under the first implementation, described back electromotive force zero cross signal generative circuit comprises:
First interference screening circuit, for making the first comparator in the described motor commutation moment, be in output hold mode, the level signal in a upper moment was kept to export, described first comparison circuit is made to export described comparative level signal in the non-motor commutation moment according to described lower envelope signal, the first reference voltage
Described first comparison circuit, first input end inputs described lower envelope signal, described first reference voltage of second input input, for in the non-motor commutation moment, more described lower envelope signal, the first reference voltage, export described first comparative level signal, for the ON-OFF control circuit of described motor in the hopping edge moment of described first comparative level signal, export described back electromotive force zero cross signal;
In conjunction with the third aspect, under the first implementation, described back electromotive force zero cross signal generative circuit comprises:
Second comparison circuit, for voltage and described first reference voltage of more described lower envelope signal, exports the second comparative level signal according to comparative result,
Second interference screening circuit, for according to described second comparative level signal, export described back electromotive force zero cross signal, if the hopping edge moment of current described second comparative level signal is not the described motor commutation moment, then export described back electromotive force zero cross signal in the described hopping edge moment, if the hopping edge moment of current described second comparative level signal is the described motor commutation moment, then do not export described back electromotive force zero cross signal.
Fourth aspect, the generative circuit of the commutation signal of a kind of brshless DC motor that the embodiment of the present invention provides, is characterized in that, comprising:
Sample circuit, for the lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
Interference screens out circuit, for controlling described comparison circuit, making described comparison circuit be in output hold mode in the motor commutation moment, keeping the level signal in a upper moment;
The first input end of described comparison circuit, the second input input described lower envelope signal, the second predetermined reference voltage respectively, described comparison circuit works under described interference screens out the control of circuit, comparative level signal is exported according to the comparative result of the voltage of described lower envelope signal and the second predetermined reference voltage for the non-motor commutation moment, in the described motor commutation moment, described comparison circuit is in output hold mode, keeps the level signal in a upper moment;
Commutation signal generative circuit, for according to described comparative level signal, export commutation signal, described commutation signal is for triggering described motor commutation.
In conjunction with fourth aspect, under the first implementation, described sample circuit, when the switching tube specifically for working in PWM mode in the power stage circuit of described motor is in off state, sample the voltage of described simulation neutral point, the voltage signal obtained is described lower envelope signal.
In conjunction with fourth aspect, under the first implementation, when described second reference voltage sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit of phase each in described power stage circuit, lower switching tube,
Described commutation signal generative circuit, specifically for the hopping edge of described comparative level signal is postponed 30 degree, as described commutation signal, exports described commutation signal.
In conjunction with fourth aspect, under the first implementation, described commutation signal generative circuit, specifically for:
When described first input end is normal phase input end, in the mid point moment of the positive half cycle of described comparative level signal, export described commutation signal,
When described first input end is inverting input, in the mid point moment of the negative half period of described comparative level signal, export described commutation signal.
Therefore application embodiment of the present invention technical scheme, by comparing the lower envelope of the voltage of simulation neutral point and the first predetermined reference voltage, can realize the back electromotive force zero passage detection of motor, the back electromotive force zero cross signal of accurate output motor.Relative to prior art, adopt the present embodiment technical scheme, without the need to filtering process, without the need to introducing the busbar voltage of motor, avoid the problem that filter time delay causes zero-crossing examination delayed, be conducive to improving the stability detected, improve zero passage detection levels of precision, and the present embodiment technical scheme is without the need to filter, busbar voltage sample circuit, is conducive to miniaturization and the circuit integration of realizing circuit.
In addition, in the embodiment of the present invention by comparing the lower envelope of the voltage of simulation neutral point and the second predetermined reference voltage, and obtain comparative level signal, accurately commutation signal can be exported again according to comparative level signal, control the cascaded switch circuit of each phase in power stage circuit, control the commutation of motor.Therefore adopt the present embodiment technical scheme, be conducive to improving the accurate control to the cascaded switch circuit of motor, and adopt the present embodiment technical scheme, without the need to filtering process, without the need to introducing the busbar voltage of motor, avoid the problem that filter time delay causes zero-crossing examination delayed, be conducive to improving the stability detected, improve zero passage detection levels of precision, and the present embodiment technical scheme is without the need to filter, busbar voltage sample circuit, be conducive to miniaturization and the circuit integration of realizing circuit.
Accompanying drawing explanation
The electric system structural representation of a kind of brshless DC motor that Fig. 1 provides for prior art;
A kind of back electromotive force zero cross detection circuit schematic diagram of the brshless DC motor that Fig. 2 provides for prior art;
Another back electromotive force zero cross detection circuit schematic diagram of a kind of brshless DC motor that Fig. 3 provides for prior art;
The back electromotive force zero passage detection method flow schematic diagram of the brshless DC motor that Fig. 4 provides for the present embodiment 1;
The voltage VNE of phase voltage Vphase, back electromotive force EMF_phase_back in the brshless DC motor course of work that Fig. 5 provides for the present embodiment 1, phase current Iphase, simulation neutral point NE;
The contrast schematic diagram of the lower envelope signal V_NE_dowm that Fig. 6 is the voltage VNE of the simulation neutral point NE of waveform shown in Fig. 5 in the embodiment of the present invention 1, back electromotive force zero-acrross ing moment t_zero_crossing (i), commutation moment t_change_phase (i);
The commutation signal V_change_phase output intent schematic flow sheet of the brshless DC motor that Fig. 7 provides for the present embodiment 2;
The comparative level signal that Fig. 8 provides for the present embodiment 2 contrasts figure with the waveform of commutation signal V_change_phase;
The comparative level signal that Fig. 9 provides for the present embodiment 2 contrasts figure with the waveform of commutation signal V_change_phase;
The back electromotive force zero cross detection circuit structural representation of a kind of brshless DC motor that Figure 10 provides for the present embodiment 3;
The back electromotive force zero cross detection circuit structural representation of the another kind of brshless DC motor that Figure 11 provides for the present embodiment 3;
The back electromotive force zero cross detection circuit structural representation of another brshless DC motor that Figure 12 provides for the present embodiment 3;
The generative circuit structural representation of the commutation signal V_change_phase of a kind of brshless DC motor that Figure 13 provides for the present embodiment 4.
Embodiment
Describe the present invention in detail below in conjunction with accompanying drawing and specific embodiment, be used for explaining the present invention in this illustrative examples of the present invention and explanation, but not as a limitation of the invention.
Embodiment 1:
Shown in Figure 4, present embodiments provide a kind of back electromotive force zero passage detection method of brshless DC motor, the method mainly comprises the following steps:
Step 401: the lower envelope of the voltage VNE of sampled analog neutral point NE, obtains lower envelope signal V_NE_dowm.
As the signal of the present embodiment, the present embodiment can be, but not limited to as illustrated in fig. 1, the power stage circuit 101 of motor connects a neutral point analog circuit 104, the voltage VN of the neutral point of simulated machine inside with the voltage VNE of simulation neutral point NE in neutral point analog circuit 104.
Sampling obtains the lower envelope of the voltage VNE of this simulation neutral point NE, obtains lower envelope signal V_NE_dowm.
As the signal of the present embodiment, the present embodiment obtains the lower envelope of the voltage VNE of simulation neutral point NE by the following technical solutions, obtains lower envelope signal V_NE_dowm:
When in the power stage circuit 101 of motor, work at present is in off state in the switching tube of PWM mode, the voltage VNE of sampled analog neutral point NE, the voltage signal that sampling obtains is the lower envelope signal V_NE_dowm needed for the present embodiment.
For example, if the conducting when pwm signal is high level of the power stage circuit of motor 101 breaker in middle pipe, then the present embodiment is when PWM is low level, the voltage VNE of sampled analog neutral point NE, and the voltage signal obtained is lower envelope signal V_NE_dowm.
Step 402: equal the first default reference voltage V ref1 at the voltage of lower envelope signal V_NE_dowm, and when current time is not the motor commutation moment, export back electromotive force zero cross signal V_zero_crossing.
In each PWM cycle, the voltage of lower envelope signal V_NE_dowm and the first predetermined reference voltage V ref1 are compared, if the voltage of current lower envelope signal V_NE_dowm equals the first reference voltage V ref1, and current time is not when being the motor commutation moment, then current time is the back electromotive force zero-acrross ing moment of motor, exports back electromotive force zero cross signal V_zero_crossing.
As the signal of the present embodiment, lower envelope signal V_NE_dowm, the first reference voltage V ref1 can be inputed to comparison circuit by the present embodiment respectively, and control comparison circuit, the comparison circuit when the motor commutation moment is made to be in output hold mode, namely current output signal keeps a upper moment state, and does not affect by current input signal; In other moment, comparison circuit is according to the voltage of lower envelope signal V_NE_dowm and the first reference voltage V ref1, export comparative level signal (being designated as the first comparative level signal), the duty ratio of the first comparative level signal now exported is 50%, in hopping edge (containing rising edge, the trailing edge) moment of the first comparative level signal, export the back electromotive force zero cross signal V_zero_crossing of the present embodiment.As the signal of the present embodiment, a pulse signal can be produced in the hopping edge of the first comparative level signal, the back electromotive force zero cross signal V_zero_crossing using this pulse signal as the present embodiment.
The first reference voltage V ref1 of the present embodiment presets according to the device parameters in the power stage circuit 101 of current motor, specifically sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit 103 of phase each in power stage circuit 101, lower switching tube.
As the signal of the present embodiment, the present embodiment, from the situation of the back electromotive force zero passage of arbitrary phase of motor, is analyzed the setting of the first reference voltage V ref1:
Shown in figure 10-13, if the cascaded switch circuit 103 of the C phase of the power stage circuit of current motor 101 works in PWM mode, (namely the switching tube S5 of the cascaded switch circuit 103 of C phase works in PWM mode, switching tube S5 conducting and shutoff by pwm signal controls, switching tube S6 is in off state).Now, the lower switching tube S4 conducting of the cascaded switch circuit 103 of B phase, A phase is in vacant state (switching tube S1, S2 all turn off).
When switching tube S5 is in off state, the voltage that the voltage Vc of the connected node C between the cascaded switch circuit 103 of C phase and motor equals the anti-paralleled diode D6 on switching tube S6 (is designated as V1, it is the known device parameter of diode D6), now B phase is in freewheeling state, lower switching tube in B phase cascaded switch circuit leads directly to, the conduction voltage drop that the voltage Vb of the connected node B between B phase cascaded switch circuit 103 and motor equals switching tube S4 (is designated as V2, it is the known device parameter of switching tube S4), again because the B phase of motor is contrary with the back electromotive force of C phase, now the neutral point N of motor is (at motor internal, not shown in FIG.) voltage be VN=(Vc+Vb)/2=(V1+V2)/2, because now A phase is unsettled, the then voltage Va=Ea+VN of now node A, wherein Ea is the back electromotive force of the A phase of motor.
Shown in Figure 10-13, the one neutral point analog circuit 104 be connected respectively with the A point of power stage circuit 101, B point, C node is respectively set, using neutral point analog circuit 104 interior joint NE as simulation neutral point NE, carry out the voltage of the neutral point of simulated machine inside with the voltage VNE simulating neutral point NE.
If the resistance of resistance R1, R2, R3 in neutral point analog circuit 104 is all equal, then when switching tube S5 is in off state, voltage VNE=(Va+Vb+Vc)/3=(the Ea+VN+Vb+Vc)/3=Ea/3+ (V1+V2)/2 of simulation neutral point NE, from above formula, simulation neutral point NE voltage now includes the back electromotive force information of A phase, and the voltage of namely simulating the lower envelope signal V_NE_dowm of the voltage VNE of neutral point NE includes the back electromotive force information of A phase.
When the back electromotive force zero passage of A phase, when namely Ea is 0, the voltage V_NE_dowm=(V1+V2)/2 of lower envelope signal V_NE_dowm.Now, when the first reference voltage V ref1 is predetermined to be Vref1=(V1+V2)/2, then when A phase back-emf zero passage, the voltage of the lower envelope signal V_NE_dowm of the voltage VNE of present day analog neutral point NE equals the first reference voltage V ref1.
And the parameter of three-phase cascaded switch circuit 103 in the power stage circuit 101 of motor is consistent, then in like manner determine according to above-mentioned principle, when the first reference voltage V ref1 is predetermined to be Vref=(V1+V2)/2:
When B phase back-emf zero passage, the voltage of the lower envelope signal V_NE_dowm of the voltage VNE of present day analog neutral point NE also equals the first reference voltage V ref1;
When C phase back-emf zero passage, the voltage of the lower envelope signal V_NE_dowm of the voltage VNE of present day analog neutral point NE also equals the first reference voltage V ref1.
To sum up, in the circuit shown in Figure 10-13, if the resistance of resistance R1, R2, R3 of the neutral point analog circuit 104 of circuit is all equal, when first reference voltage V ref1 is predetermined to be Vref=(V1+V2)/2, if the back electromotive force zero passage of arbitrary phase of current motor, then the voltage of the lower envelope signal V_NE_dowm of the voltage VNE of present day analog neutral point NE equals the first reference voltage V ref1.
The present inventor is carrying out finding in research process of the present invention, in machine operation process, when motor commutation, the pwm signal of circuit is interfered, the power stage circuit 101 of motor is interfered, as shown in Figure 5, in the motor commutation moment, the phase voltage Vphase instant reverse of motor, correspondingly, the lower envelope signal V_NE_dowm of the voltage of the neutral point analog circuit 104 of motor is subject to this interference and declines instantaneously and pass through the first reference voltage V ref1, forms the waveform of the lower envelope signal V_NE_dowm of the voltage VNE of the simulation neutral point NE shown in Fig. 6.For this reason, the present embodiment is when detecting the back electromotive force zero passage detection of motor, also remove further above-mentioned motor commutation interference: if the lower envelope (i.e. the voltage of lower envelope signal V_NE_dowm) of present day analog neutral point NE voltage equal the first reference voltage V ref1 but current be the motor commutation moment, then do not think and current motor back electromotive force zero passage do not export back electromotive force zero cross signal V_zero_crossing; And only equal the first reference voltage V ref1 at the voltage of current lower envelope signal V_NE_dowm, and when current time is not the motor commutation moment, just think that current time is back electromotive force zero-acrross ing moment, export back electromotive force zero cross signal V_zero_crossing.
It should be noted that, the present embodiment is in order to easy analysis, schematically illustrate with all equal situation of the resistance of resistance R1, R2, R3 of neutral point analog circuit 104, but be actually not limited in this, when resistance between resistance R1, R2, R3 is unequal, then in like manner can set the first reference voltage V ref1 according to the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit 103 of each phase in the power stage circuit 101 of motor, the conduction voltage drop of lower switching tube.
Therefore, adopt the present embodiment technical scheme, by comparing the lower envelope of the voltage VNE of simulation neutral point NE and the first predetermined reference voltage V ref1, the back electromotive force zero passage detection of motor can be realized, exactly the back electromotive force zero cross signal V_zero_crossing of output motor.Relative to prior art, adopt the present embodiment technical scheme, without the need to filtering process, without the need to introducing the busbar voltage Vm of motor, avoid the problem that filter time delay causes zero-crossing examination delayed, be conducive to improving the stability detected, improve and detect levels of precision, and the present embodiment technical scheme is without the need to filter, busbar voltage Vm sample circuit, is conducive to miniaturization and the circuit integration of realizing circuit.
Embodiment 2:
Present embodiments provide a kind of commutation signal output intent of brshless DC motor, shown in Figure 7, the present embodiment method comprises the following steps:
Step 701: the lower envelope of the voltage VNE of sampled analog neutral point NE, obtains lower envelope signal V_NE_dowm.
The enforcement of the present embodiment specifically see in embodiment 1 shown in step 401, can not repeat at this.
Step 702: in the non-motor commutation moment, compares the voltage of lower envelope signal V_NE_dowm and the second predetermined reference voltage V ref2, exports comparative level signal Vcomp according to comparative result.
As the signal of the present embodiment, can at the first input end input lower envelope signal V_NE_dowm of comparison circuit, the second input inputs the second predetermined reference voltage, and circuit exports comparative level signal Vcomp.
When comparison circuit is realized by a comparator, first input end is the normal phase input end "+" of comparator, the arbitrary of inverting input "-", the second input be the normal phase input end "+" of comparator, inverting input "-" another.
In this step, when current time is motor commutation moment t_change_phase, comparison circuit is not changed according to current input change, only when the non-motor commutation moment, the just voltage of the lower envelope signal V_NE_dowm of more current input and the second predetermined reference voltage V ref2, exports comparative level signal Vcomp according to comparative result.
Step 703: according to comparative level signal Vcomp, exports the commutation signal V_change_phase for triggering motor commutation.
In the present embodiment, commutation signal V_change_phase is exported, to control motor commutation according to comparative level signal Vcomp.
As the signal of the present embodiment, this step can be, but not limited to adopt following scheme to realize,
When the first input end accessing lower envelope signal V_NE_dowm is normal phase input end "+", the commutation signal V_change_phase of the present embodiment is exported at the mid point moment t0 of the positive half cycle of comparative level signal Vcomp, trigger motor commutation, comparative level signal Vcomp now and the waveform of commutation signal V_change_phase shown in Figure 8.
As the signal of the present embodiment, shown in Figure 8, within arbitrary comparative level signal Vcomp cycle (being set to for the i-th cycle), after the rising hopping edge t_up_i in the i-th cycle arrives, delay control one duration T1, exports commutation signal V_change_phase.This first duration T1 is the half of the positive half cycle duration of comparative level signal Vcomp, can be, but not limited to the half of the positive half cycle duration in (i-1) cycle of getting as this first duration T1.
When the first input end inputting lower envelope signal V_NE_dowm is inverting input "-", export this commutation signal V_change_phase at the mid point moment t0 of the negative half period of comparative level signal Vcomp.Comparative level signal Vcomp now and the waveform of commutation signal V_change_phase shown in Figure 9.
As the signal of the present embodiment, shown in Figure 9, within arbitrary comparative level signal Vcomp cycle, after the decline hopping edge t_down_i in the i-th cycle arrives, delay control one duration T1, exports commutation signal V_change_phase.This first duration T1 is the half of comparative level signal Vcomp negative half period duration, can be, but not limited to the half of the negative half period duration getting (i-1) cycle as this first duration T1.
As the signal of the present embodiment, when the second current reference signal Vref2 equals the pressure drop according to the anti-paralleled diode of the lower switching tube of the cascaded switch circuit 103 of each phase in the power stage circuit 101 of motor described in embodiment 1, the conduction voltage drop of lower switching tube and the first reference signal Vref1 set time, now, preferably but be not limited to back electromotive force zero cross signal V_zero_crossing to postpone 30 degree as commutation signal V_change_phase, adopt this technical scheme, be conducive to the real-time process of signal, improve the accuracy of commutation signal V_change_phase, but to be actually not limited to time, now, can also but be not limited to adopt the above-mentioned rising edge at the present embodiment first comparative level signal or export commutation signal V_change_phase after delay control one duration T1 after the trailing edge moment.
Therefore, application the present embodiment technical scheme, the present embodiment compares the voltage of the lower envelope signal V_NE_dowm of the voltage VNE of simulation neutral point NE and the second predetermined reference voltage V ref2, and obtain comparative level signal Vcomp, export commutation signal V_change_phase according to comparative level signal Vcomp, control the commutation of motor.Relative to prior art, the present embodiment technical scheme is adopted to be conducive to the miniaturization, integrated of realizing circuit.
And relative to prior art, adopt the present embodiment technical scheme, without the need to first obtain motor back electromotive force zero cross signal after just generate commutation signal, avoid the error brought due to back electromotive force zero passage detection error, and application the present embodiment technical scheme is without the need to filtering process, without the need to introducing the busbar voltage Vm of motor, avoid the problem that filter time delay causes zero-crossing examination delayed, be conducive to improving the stability detected, improve and detect levels of precision, and the present embodiment technical scheme is without the need to filter, busbar voltage Vm sample circuit, be conducive to miniaturization and the circuit integration of realizing circuit.
Embodiment 3:
Present embodiments provide a kind of back electromotive force zero cross detection circuit 100 of brshless DC motor, shown in Figure 10, the present embodiment circuit comprises: sample circuit 1001, back electromotive force zero cross signal generative circuit 1002.
Wherein, sample circuit 1001 is connected with the simulation neutral point NE of the neutral point analog circuit 104 of the power stage circuit 101 of motor 10, for the lower envelope of the voltage VNE of sampled analog neutral point NE, obtains lower envelope signal V_NE_dowm.
The operation principle of sample circuit 1001 can be, but not limited to, see in embodiment 1 described in step 401, not repeat at this.
Back electromotive force zero cross signal generative circuit 1002 is for equaling the first predetermined reference voltage V ref1 at the voltage of lower envelope signal V_NE_dowm, and when current time is not the motor commutation moment, export back electromotive force zero cross signal V_zero_crossing, this back electromotive force zero cross signal V_zero_crossing is for characterizing the back electromotive force zero passage of current motor.Control the commutation of motor further according to this back electromotive force zero cross signal V_zero_crossing with the control circuit of power supply machine.
The first reference voltage V ref1 of the present embodiment sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of phase cascaded switch circuit 103 each in the power stage circuit 101 of motor, lower switching tube.It further sets principle see the corresponding description in embodiment 1.
The operation principle of back electromotive force zero cross signal generative circuit 1002 can be, but not limited to, see in embodiment 1 described in step 402, not repeat at this.
The beneficial effect of the present embodiment back electromotive force zero cross detection circuit 100 is with embodiment 1.
As the signal of the present embodiment, shown in Figure 11, the back electromotive force zero cross signal generative circuit 1002 of the present embodiment comprises: the first interference screening circuit 1101, first comparison circuit 1102.
Wherein, the first interference screening circuit 1101, for controlling the first comparison circuit 1102 in the commutation moment of motor 10, makes the first comparison circuit 1102 be in the output keeping a upper moment, is in output hold mode, and not by the impact of current input signal, in other moment, first comparison circuit 1102 exports comparative level signal (being designated as the first comparative level signal) according to the voltage of lower envelope signal V_NE_dowm of input and the comparative result of the first reference voltage V ref1, in the hopping edge moment of the first comparative level signal, first interference screening circuit 1101 exports the back electromotive force zero cross signal V_zero_crossing as the present embodiment, now, for the ON-OFF control circuit 106 of this motor in hopping edge moment of the first comparative level, export the back electromotive force zero cross signal V_zero_crossing of a pulse signal as the present embodiment.Further work principle and beneficial effect are see the corresponding description in embodiment 1.
As the signal of the present embodiment, shown in Figure 12, the back electromotive force zero cross signal generative circuit 1002 of the present embodiment comprises: the second interference screening circuit 1201, second comparison circuit 1202.
Wherein, second comparison circuit 1202 is for comparing voltage and the first reference voltage V ref1 of lower envelope signal V_NE_dowm, comparative level signal (being designated as the second comparative level signal) is exported according to comparative result, the second interference screening circuit 1201 is connected at the output of the second comparison circuit 1202, second interference screening circuit 1201 exports back electromotive force zero cross signal V_zero_crossing according to the second comparative level signal, its operation principle is, if the hopping edge moment of current second comparative level signal is the commutation moment, the back electromotive force zero cross signal V_zero_crossing of the present embodiment is then exported in the hopping edge moment, if the hopping edge moment of current second comparative level signal is the motor commutation moment, then thinks that current transition is because the commutation interference of motor causes, do not export back electromotive force zero cross signal V_zero_crossing in this hopping edge moment.
The back electromotive force zero cross detection circuit 100 of the motor of this enforcement is applicable to brshless DC motor, shown in Figure 10-12, the switching tube of back electromotive force zero cross signal V_zero_crossing to the power stage circuit 101 of motor that the ON-OFF control circuit 106 of brshless DC motor can export according to back electromotive force zero cross detection circuit 100 controls.
Embodiment 4:
Present embodiments provide a kind of generative circuit of commutation signal of brshless DC motor.Shown in Figure 13, the generative circuit 130 of this commutation signal mainly comprises: sample circuit 1001, interference screen out circuit 1302, comparison circuit 1303, commutation signal generative circuit 1304.
Wherein, sample circuit 1001 is connected with the simulation neutral point NE of the neutral point analog circuit 104 of the power stage circuit 101 of motor 10, for the lower envelope of the voltage VNE of sampled analog neutral point NE, the voltage signal obtained is as the lower envelope signal V_NE_dowm of the present embodiment.
As the signal of the present embodiment, when sample circuit 1001 can be in off state at the switching tube working in PWM mode, the voltage VNE of sampled analog neutral point NE, obtains the lower envelope signal V_NE_dowm of the present embodiment.
The further work principle of this sample circuit 1001 can be, but not limited to, see in embodiment 1 described in step 401, not repeat at this.
Interference screens out circuit 1302, for controlling comparison circuit 1303, making comparison circuit 1303 keep a moment state in the output in motor commutation moment, being in output hold mode, and not by the impact of current input.
The first input end of comparison circuit 1303 is connected with the output of sample circuit 1001, input lower envelope signal V_NE_dowm, second input inputs the second predetermined reference voltage V ref2, comparison circuit 1303 screens out under circuit 1302 controls in interference and works, in the motor commutation moment, export and keep a upper moment state, comparator is in output hold mode; In other moment, the voltage of comparison circuit 1303 according to lower envelope signal V_NE_dowm and the comparative result of the second reference voltage V ref2, export comparative level signal to phase commutation signal generative circuit 1304.
Commutation signal generative circuit 1304 generates according to comparative level signal and exports the commutation signal V_change_phase for triggering motor commutation.Its specific works principle is see as follows:
When the first input end that comparison circuit 1303 inputs lower envelope signal V_NE_dowm is normal phase input end "+", export commutation signal V_change_phase at the mid point moment t0 of the positive half cycle of the comparative level signal of comparison circuit 1303 output, concrete waveform is shown in Figure 8;
When the first input end that comparison circuit 1303 inputs lower envelope signal V_NE_dowm is normal phase input end, export commutation signal V_change_phase at the mid point moment t0 of the negative half period of the comparative level signal of comparison circuit 1303 output, concrete waveform is shown in Figure 9.
As the signal of the present embodiment, when the second reference voltage V ref2 of the present embodiment is set to the first reference voltage V ref1 described in embodiment 1,3, then the duty ratio of the comparative level signal of comparison circuit 1303 output is 50%, now, the hopping edge of the comparative level signal of the present embodiment can be postponed 30 degree by the commutation signal generative circuit 1304 of the present embodiment, as the commutation signal V_change_phase of the present embodiment, export this commutation signal V_change_phase.
The further work principle of the present embodiment phase commutation signal generative circuit 1304 is in detail see in embodiment described in step 703.
As the signal of the present embodiment, shown in Figure 10,11, the present embodiment in simulations property point NE can also connect a resistance R4 further further, to carry out dividing potential drop to the voltage VNE of simulation neutral point NE, make voltage VNE be reduced to the requirement meeting current control chip, improve the job stability of chip.
The commutation signal generative circuit 130 of the present embodiment is applicable to brshless DC motor.Shown in Figure 13, the switching tube of anti-commutation signal V_change_phase to the power stage circuit 101 of motor that the ON-OFF control circuit 106 of brshless DC motor can export according to commutation signal generative circuit 130 controls, and realizes commutation.
Above-described execution mode, does not form the limit to this technical scheme protection range.The amendment done within any spirit at above-mentioned execution mode and principle, equivalently to replace and improvement etc., within the protection range that all should be included in this technical scheme.
Claims (13)
1. a back electromotive force zero passage detection method for brshless DC motor, is characterized in that, comprising:
The lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
The first reference voltage preset according to the power stage circuit of described motor is equaled at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, export back electromotive force zero cross signal, described back electromotive force zero cross signal is for characterizing the back electromotive force zero passage of described motor.
2. the back electromotive force zero passage detection method of brshless DC motor according to claim 1, is characterized in that,
Described first reference voltage sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit of phase each in described power stage circuit, lower switching tube.
3. the back electromotive force zero passage detection method of brshless DC motor according to claim 1 and 2, is characterized in that,
Equal the first reference voltage preset according to the power stage circuit of described motor at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, exports back electromotive force zero cross signal, comprise,
Described lower envelope signal, described first reference voltage are inputed to respectively first input end, second input of comparison circuit, make in the described motor commutation moment, described comparison circuit is in output hold mode, kept the level signal in a upper moment, make in the non-motor commutation moment, voltage, first reference voltage of the more described lower envelope signal of described comparison circuit, the first comparative level signal is exported according to comparative result, in the hopping edge moment of described first comparative level signal, export described back electromotive force zero cross signal;
Or,
According to voltage and the described first reference voltage comparative result of described lower envelope signal, export the second comparative level signal, if the hopping edge moment of current described second comparative level signal is not the described motor commutation moment, then in the hopping edge moment of current described second comparative level signal, export described back electromotive force zero cross signal, if the hopping edge moment of current described second comparative level signal is the described motor commutation moment, then do not export described back electromotive force zero cross signal.
4. an output intent for the commutation signal of brshless DC motor, is characterized in that, comprising:
The lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
Described lower envelope signal, the second reference voltage are inputed to respectively first input end, second input of comparison circuit, make in the motor commutation moment, described comparison circuit is in output hold mode, kept the level signal in a upper moment, make in the non-motor commutation moment, the voltage of described comparison circuit more described lower envelope signal and the second predetermined reference voltage, export comparative level signal according to comparative result;
According to described comparative level signal, generate and export commutation signal, described commutation signal is for triggering described motor commutation.
5. the commutation signal output intent of brshless DC motor according to claim 4, is characterized in that,
According to described comparative level signal, export commutation signal, comprising:
When described first input end is normal phase input end, in the mid point moment of the positive half cycle of described comparative level signal, export described commutation signal,
When described first input end is inverting input, in the mid point moment of the negative half period of described comparative level signal, export described commutation signal.
6. a back electromotive force zero cross detection circuit for brshless DC motor, is characterized in that, comprising:
Sample circuit, for the lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
Back electromotive force zero cross signal generative circuit, for equaling the first reference voltage preset according to the power stage circuit of described motor at the voltage of described lower envelope signal, and when current time is not the motor commutation moment, export back electromotive force zero cross signal, described back electromotive force zero cross signal is for characterizing the back electromotive force zero passage of current described motor.
7. the back electromotive force zero cross detection circuit of brshless DC motor according to claim 6, is characterized in that,
Described sample circuit, when the switching tube specifically for working in PWM mode in described power stage circuit is in off state, the voltage of described simulation neutral point of sampling, the voltage signal obtained is described lower envelope signal.
8. the back electromotive force zero cross detection circuit of brshless DC motor according to claim 6, is characterized in that,
Described first reference voltage sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit of phase each in described power stage circuit, lower switching tube.
9. the back electromotive force zero cross detection circuit of the brshless DC motor according to claim 6 or 7 or 8, is characterized in that,
Described back electromotive force zero cross signal generative circuit comprises:
First interference screening circuit, for making the first comparator in the described motor commutation moment, be in output hold mode, the level signal in a upper moment was kept to export, described first comparison circuit is made to export described comparative level signal in the non-motor commutation moment according to described lower envelope signal, the first reference voltage
Described first comparison circuit, first input end inputs described lower envelope signal, described first reference voltage of second input input, for in the non-motor commutation moment, more described lower envelope signal, the first reference voltage, export described first comparative level signal, for the ON-OFF control circuit of described motor in the hopping edge moment of described first comparative level signal, export described back electromotive force zero cross signal;
Or,
Described back electromotive force zero cross signal generative circuit comprises:
Second comparison circuit, for voltage and described first reference voltage of more described lower envelope signal, exports the second comparative level signal according to comparative result,
Second interference screening circuit, for according to described second comparative level signal, export described back electromotive force zero cross signal, if the hopping edge moment of current described second comparative level signal is not the described motor commutation moment, then export described back electromotive force zero cross signal in the described hopping edge moment, if the hopping edge moment of current described second comparative level signal is the described motor commutation moment, then do not export described back electromotive force zero cross signal.
10. a generative circuit for the commutation signal of brshless DC motor, is characterized in that, comprising:
Sample circuit, for the lower envelope of the voltage of sampled analog neutral point, obtains lower envelope signal;
Interference screens out circuit, for controlling described comparison circuit, making described comparison circuit be in output hold mode in the motor commutation moment, keeping the level signal in a upper moment;
The first input end of described comparison circuit, the second input input described lower envelope signal, the second predetermined reference voltage respectively, described comparison circuit works under described interference screens out the control of circuit, comparative level signal is exported according to the comparative result of the voltage of described lower envelope signal and the second predetermined reference voltage for the non-motor commutation moment, in the described motor commutation moment, described comparison circuit is in output hold mode, keeps the level signal in a upper moment;
Commutation signal generative circuit, for according to described comparative level signal, export commutation signal, described commutation signal is for triggering described motor commutation.
The generative circuit of the commutation signal of 11. brshless DC motors according to claim 10, is characterized in that,
Described sample circuit, when the switching tube specifically for working in PWM mode in the power stage circuit of described motor is in off state, the voltage of described simulation neutral point of sampling, the voltage signal obtained is described lower envelope signal.
The generative circuit of the commutation signal of 12. brshless DC motors according to claim 10 or 11, is characterized in that,
When described second reference voltage sets according to the conduction voltage drop of the pressure drop of the anti-paralleled diode of the lower switching tube of the cascaded switch circuit of phase each in described power stage circuit, lower switching tube,
Described commutation signal generative circuit, specifically for the hopping edge of described comparative level signal is postponed 30 degree, as described commutation signal, exports described commutation signal.
The generative circuit of the commutation signal of 13. brshless DC motors according to claim 10 or 11, is characterized in that,
Described commutation signal generative circuit, specifically for:
When described first input end is normal phase input end, in the mid point moment of the positive half cycle of described comparative level signal, export described commutation signal,
When described first input end is inverting input, in the mid point moment of the negative half period of described comparative level signal, export described commutation signal.
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