CN104617005B - The measuring method of channel region strain - Google Patents

The measuring method of channel region strain Download PDF

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CN104617005B
CN104617005B CN201310543023.2A CN201310543023A CN104617005B CN 104617005 B CN104617005 B CN 104617005B CN 201310543023 A CN201310543023 A CN 201310543023A CN 104617005 B CN104617005 B CN 104617005B
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channel region
ion
raman spectrum
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CN104617005A (en
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蔡博修
黄怡
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Semiconductor Manufacturing International Shanghai Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process

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  • Manufacturing & Machinery (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)

Abstract

A kind of measuring method of channel region strain, including：Multiple device areas are provided；The test transistor of same conduction type is formed in each device area, the ion implanting plot structure that the test transistor includes test transistor in the ion implanted region and the channel region between adjacent two ion implanted region being located in Semiconductor substrate, different components region has difference；Each device area is irradiated successively using ultraviolet light hot spot, and obtains total Raman spectrum that the ion implanted region of test transistor and channel region are returned in each device area；The total Raman spectrum of difference returned according to test transistor in different components region, isolates the Raman spectrum of channel region, and obtain the dependent variable of the channel region.The channel region strain true and accurate that methods described measurement is obtained, and whole method is simple and feasible, saves cost, does not have damage effect to transistor, and spectral region is big, and frequency displacement is not limited by light source frequency, applied widely.

Description

The measuring method of channel region strain
Technical field
The present invention relates to field of semiconductor technology, more particularly, to a kind of measuring method of channel region strain.
Background technology
With developing rapidly for nanofabrication technique, the characteristic size of transistor has been enter into nanoscale.Contracted by equal proportion The performance that small method improves current main-stream silicon CMOS device is limited by more and more physics and technique.In order that integrated electricity Road technique can continue the development speed disclosed in Moore's Law, it is necessary to the exploitation new material compatible with silicon technology, new construction and newly Property.In recent years, strained silicon (Strained Si) technology is enjoyed due to the excellent performance in raising cmos device aspect of performance Concern.For example, by introduce appropriate compression in channels and tensile stress can be respectively increased PMOS hole mobility and NMOS electron mobility.Typical PMOS strained silicons can introduce raceway groove compression by epitaxy Si Ge source and drain, utilize source Leakage and the lattice constant mismatch controlled strain size of raceway groove, and then improve hole mobility；And for NMOS strained silicons then Raceway groove tensile stress can be introduced by depositing SiN films, using the high intrinsic controlled strain size of SiN films, and then improved Electron mobility.Therefore, by the optimization design of technique, material and structural parameters, research semiconductor nano device in stress and The control of strain has important scientific meaning and practical value.
To prevent the generation of gate leakage currents, proposed already with high-K dielectric layer and metal gate structure（HKMG）'s Transistor, in this transistorlike, channel region is located at below metal gate, how to measure such transistor channel region strain, is this The technical barrier that field runs into.
（It is super）The accurate measurement of local microstress and strain in deep sub-micron semiconductor structure is generally had to by complexity Microstructure analysis and measurement means.Channel region strain as Nanosemiconductor Device Strain Distribution a part, either from Technically or from the aspect of cost, all it is extremely difficult by testing measurement.On the one hand, the technique for making such device It is required that very high, input is high, and device finished product also unlikely goes to carry out destructive measurement one by one；On the other hand, nanoscale On local microstress and strain measurement often must be by complicated superb microstructure analysis, measurement means.
A kind of technology that can operate with channel region strain measurement is pack electronic diffraction (Convergent Beam Electron Difraction, CBED).Pack electronic diffraction has high spatial resolution（Spatial resolution be up to 5nm~ 10nm）With strain measurement precision, the strain measurement of nano-scale cmos device is applied more broadly at present, but this method pair Sample is destructive（Measured zone must be carefully thinned to sample in electron lucent, to be adapted to transmission electron microscope point Analysis）, and it is equipped with the transmission electron microscope of pack electronic diffraction function（TEM）Fairly expensive, operation and analysis are also relatively more multiple It is miscellaneous, more disadvantageously, it is necessary to be thinned in the preparation process of tem specimen, want to keep original ditch It is extremely difficult that road strain regime is unaffected, and therefore, the reliability of its final measurement has dispute.
Another technology that can operate with channel region strain measurement is micro- Raman scattering (Micro-Raman Scattering) technology.Raman diffused light reflects the information of material lattice vibration energy level, it is thus possible to reflect material element group Point, the information in terms of lattice quality, molecular structure.The micro-foundation of Raman spectroscopy measuring strain is that Raman frequency shift is reflected The change of atomic distance, that is, reflect the information of strain.However, although existing Raman scattering is nondestructive, still Its spatial resolution only has 0.2 μm~1 μm, and it can not be applied to the strain measurement of sub-micron, particularly sub-micro device.
For this reason, it may be necessary to a kind of measuring method of new channel region strain, can not be to channel region strain to solve existing method The problem of accurately being measured.
The content of the invention
The problem of present invention is solved is to provide a kind of measuring method of channel region strain, accurate to be carried out to channel region strain Really measurement.
To solve the above problems, the present invention provides a kind of measuring method of channel region strain, including：
Semiconductor substrate is provided, the Semiconductor substrate includes multiple device areas；
The test transistor of same conduction type is formed in each device area, the test transistor includes being located at semiconductor Test transistor in ion implanted region in substrate and the channel region between adjacent two ion implanted region, different components region Ion implanting plot structure there is difference；
Each device area is irradiated successively using ultraviolet light hot spot, and obtains test transistor in each device area Total Si prediction Raman spectrum that ion implanted region and channel region are returned；
The total Si prediction Raman spectrum of difference returned according to test transistor in different components region, isolates channel region Si prediction Raman spectrum, and obtain the dependent variable of the channel region.
Optionally, the channel region is located in silicon substrate, and the ion implanted region, which makes, SiGe, total Raman light Compose as total Si prediction Raman spectrum.
Optionally, the device area includes first area, second area, the 3rd region and the 4th region, described to be measured Transistor is PMOS transistor, and the ion implanted region, which makes, Sigma's shape SiGe, wherein：
The PMOS transistor positioned at the first area returns to first total Si prediction Raman spectrum, the ion implanting Area surface is formed with metal silicide, and inside has carried out ion implanting；
The PMOS transistor positioned at the second area returns to second total Si prediction Raman spectrum, the ion implanting Area surface does not form metal silicide, and inside has carried out ion implanting；
The PMOS transistor positioned at the 3rd region returns to the 3rd total Si prediction Raman spectrum, the ion implanting Area surface is formed with metal silicide, and inside does not carry out ion implanting；
The 4th total Si prediction Raman spectrum, the ion implanting are returned positioned at PMOS transistor described in the four-range Area surface does not form metal silicide, and inside does not carry out ion implanting.
Optionally, the first area, second area, the 3rd region and four-range areal extent are 5 μm2~50 μ m2, the area of the ultraviolet light hot spot is the first area, second area, the 3rd region or four-range 30%~80%.
Optionally, the device area includes the 5th region, the 6th region, SECTOR-SEVEN domain and the Section Eight being sequentially connected with Domain, the test transistor is PMOS transistor, and the ion implanted region, which makes, Sigma's shape SiGe, wherein：
In the PMOS transistor in the 5th region, the ion implanted region surface is formed with metal silication Thing, inside has carried out ion implanting；
In the PMOS transistor in the 6th region, the ion implanted region surface is gradually from being formed with metal Silicide transits to and does not form metal silicide, and inside has carried out ion implanting；
In the PMOS transistor in the SECTOR-SEVEN domain, the ion implanted region surface is formed with metal silication Thing, it is internal gradually from having carried out ion implanting and transit to not carry out ion implanting；
In the PMOS transistor in the Section Eight domain, the ion implanted region surface does not form metal silication Thing, inside does not carry out ion implanting；
When irradiating the test transistor using ultraviolet light hot spot, the ultraviolet light hot spot is in order or backward is to described 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain are scanned irradiation, a series of different total silicon silicon of return successively Key Raman spectrum.
Optionally, by controlling the mask of mask and formation metal silicide for ion implanting, formation is located at described PMOS transistor in 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain.
Optionally, the areal extent in the 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain is 5 μm2~50 μ m2, the area of the ultraviolet light hot spot is the 30%~80% of the 5th region, the 6th region, SECTOR-SEVEN domain or Section Eight domain, The channel region width is more than or equal to the width of the ultraviolet light hot spot.
Optionally, ultraviolet wavelength range is 350nm~400nm in the ultraviolet light hot spot.
Optionally, above the channel region of the test transistor it is groove, the bottom of the groove, which has, is located at the ditch At least one layer in gate oxide and high-K dielectric layer above road area, the ultraviolet hot spot reaches the ditch by the groove Road area.
Optionally, the side wall of the groove has offset by gap wall and side wall, and the test transistor is also covered including stress Mold layer, the stress mask layer is located between the ion implanted region and the dielectric layer and the side wall and the dielectric layer Between.
Optionally, the metal silicide is the metal silicide of nickel, the thickness range of the metal silicide for 1nm~ Inside 15nm, the ion implanted region ion of injection include one kind in phosphonium ion, arsenic ion, boron ion and gallium ion or A variety of, the concentration range of the ion is 1017cm-3~1020cm-3。
Compared with prior art, technical scheme has advantages below：
In technical scheme, transistor to be measured is provided first, and the transistor is in manufacturing process, its Metal gates are not formed, the transistor is now irradiated using ultraviolet light hot spot, are returned in transistor by channel region and ion note Enter total Raman spectrum that area is returned jointly, the total Raman spectrum of difference returned according to different crystal pipe isolates channel region return Raman spectrum, then the Raman spectrum that channel region is returned and the Raman spectrum of answering the channel region of vanishing to return be compared and Analysis, obtains channel region strain, the channel region strain true and accurate that methods described measurement is obtained, and whole method simplicity can OK, cost is saved, does not have damage effect to transistor, spectral region is big, and frequency displacement is not limited by light source frequency, applied widely.
Brief description of the drawings
Fig. 1 is the PMOS transistor schematic diagram in the first area of the embodiment of the present invention one；
Fig. 2 is the PMOS transistor schematic diagram in the second area of the embodiment of the present invention one；
Fig. 3 is the PMOS transistor schematic diagram in the region of the embodiment of the present invention 1 the 3rd；
Fig. 4 is the PMOS transistor schematic diagram in the region of the embodiment of the present invention 1 the 4th；
Fig. 5 is the first area of the embodiment of the present invention one, second area, the 3rd region and the 4th region in metal silicide system Mask schematic diagram during work and used in ion implantation process；
Fig. 6 is that PMOS transistor is bowed in the first area of the embodiment of the present invention one, second area, the 3rd region and the 4th region Depending on schematic diagram；
Fig. 7 is total silicon silicon for returning in the first area of the embodiment of the present invention one, second area, the 3rd region and the 4th region Key Raman spectrum schematic diagram；
Fig. 8 is the PMOS transistor schematic diagram in the region of the embodiment of the present invention 2 the 5th；
Fig. 9 is the PMOS transistor schematic diagram in the region of the embodiment of the present invention 2 the 6th；
Figure 10 is the PMOS transistor schematic diagram in the SECTOR-SEVEN domain of the embodiment of the present invention two；
Figure 11 is the PMOS transistor schematic diagram in the Section Eight domain of the embodiment of the present invention two；
Figure 12 is the region of the embodiment of the present invention 2 the 5th, the 6th region, SECTOR-SEVEN domain and Section Eight domain in metal silicide Mask schematic diagram in manufacturing process and used in ion implantation process；
Figure 13 is the region of the embodiment of the present invention 2 the 5th, the 6th region, SECTOR-SEVEN domain and Section Eight domain in metal silicide Schematic diagram in manufacturing process and in ion implantation process.
Embodiment
Micro- Raman scattering techniques divide static micro- Raman scattering again（Static Micro-Raman Scattering）Technology and Scan micro- Raman scattering techniques（Scanning Micro-Raman Scattering）.Static micro- Raman scattering techniques are used Facula area can not be less than 1 μm2, therefore static Raman scattering techniques cannot be used directly for the measurement of channel region strain.It is theoretical On, the scanning differential signal that scanning micro- Raman scattering techniques can be returned by the different scanning moment reaches higher spatial discrimination Rate, but in fact, for sub-micron, particularly sub-micro device, corresponding scanning differential signal is too weak, same nothing Method measures channel region strain.In addition, either which kind of Raman scattering techniques, for high-K dielectric layer and metal gate structure Transistor for, due to channel region be located at metal gate below, metal gate can hinder light reach channel region, therefore, it is difficult to transport Channel region strain is measured with existing method.
Therefore, the present invention provides a kind of measuring method of channel region strain there is provided in test transistor, and transistor, Do not complete, but rested on before metal gates formation completely, now only have high-K dielectric layer and gate oxidation above channel region Layer, and high-K dielectric layer and gate oxide do not influence ultraviolet light to arrive channel region, and therefore, ultraviolet light hot spot can pass through groove The channel region of the test transistor is irradiated, total Raman spectrum that the ion implanted region and the channel region are returned is obtained, then The total Raman spectrum of difference returned according to different components region test transistor, carries out analyzing the drawing for obtaining the channel region return Graceful spectrum, the Raman spectrum that the channel region is returned is compared and divided with the Raman spectrum for answering the channel region of vanishing to return Analysis, obtains the channel region strain.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings to the present invention Specific embodiment be described in detail.
The embodiment of the present invention one provides a kind of measuring method of channel region strain.
There is provided multiple device areas first.
In the present embodiment, the device area includes first area, second area, the 3rd region and the 4th region, described Test transistor is the PMOS transistor in manufacturing process, i.e. test transistor is not make complete transistor also.Due to this What embodiment to be measured is the PMOS transistor with high-K dielectric layer and metal gate structure, therefore, if PMOS transistor Complete, then metal gates can shield corresponding light and reach channel region, cause channel region strain can not be measured Consequence, and just can guarantee that measurement result is accurate using this incomplete transistor.
In the present embodiment, PMOS transistor in dummy grid be removed to form groove at the time of because dummy grid is usually Polysilicon, polysilicon has the crystal face and grain boundary structure of complexity, can reach channel region to ultraviolet light and adversely affect.Cause This, the present embodiment removes the dummy grid of polysilicon, forms groove, and follow-up ultraviolet light can reach channel region by groove.
In the present embodiment, PMOS transistor is located in first area, second area, the 3rd region and the 4th region respectively, The ion implanting plot structure of PMOS transistor has difference in different components region.
Fig. 1 is refer to, the PMOS transistor in first area includes the ion implanting being located in Semiconductor substrate 100 Area（Do not mark）With channel region 111（Region in Fig. 1 included by dotted line frame）, the inter-level dielectric in Semiconductor substrate 100 Layer 101, the groove 110 in interlayer dielectric layer 101, groove 110 corresponds to the top of channel region 111, and the bottom of groove 110 has Gate oxide 112 and high-K dielectric layer 113 on channel region 111, the side wall of groove 110 have offset by gap wall 114 and side wall 115, and the surface of side wall 115 and ion implanted region surface are covered by stress mask layer 116.Being made in ion implanted region has Sigma Shape SiGe 117.
In the present embodiment, in the PMOS transistor in first area, ion implanted region surface is formed with metal silication Thing 119, inside has carried out ion implanting, forms ion and reinjects area 118.
Fig. 2 is refer to, the PMOS transistor in second area includes the ion implanting being located in Semiconductor substrate 200 Area（Do not mark）With channel region 211（Region in Fig. 2 included by dotted line frame）, the inter-level dielectric in Semiconductor substrate 200 Layer 201, the groove 210 in interlayer dielectric layer 201, groove 210 corresponds to the top of channel region 211, and the bottom of groove 210 has Gate oxide 212 and high-K dielectric layer 213 on channel region 211, the side wall of groove 210 have offset by gap wall 214 and side wall 215, and the surface of side wall 215 and ion implanted region surface are covered by stress mask layer 216.Being made in ion implanted region has Sigma Shape SiGe 217.
In the present embodiment, in the PMOS transistor in second area, ion implanted region surface does not form metal silication Thing, but inside has carried out ion implanting, forms ion and reinjects area 218.
Fig. 3 is refer to, the PMOS transistor in the 3rd region includes the ion implanting being located in Semiconductor substrate 300 Area（Do not mark）With channel region 311（Region in Fig. 3 included by dotted line frame）, the inter-level dielectric in Semiconductor substrate 300 Layer 301, the groove 310 in interlayer dielectric layer 301, groove 310 corresponds to the top of channel region 311, and the bottom of groove 310 has Gate oxide 312 and high-K dielectric layer 313 on channel region 311, the side wall of groove 310 have offset by gap wall 314 and side wall 315, and the surface of side wall 315 and ion implanted region surface are covered by stress mask layer 316.Being made in ion implanted region has Sigma Shape SiGe 317.
In the present embodiment, in the PMOS transistor in the 3rd region, ion implanted region surface is formed with metal silication Thing 318, but inside does not carry out ion implanting.
Fig. 4 is refer to, the PMOS transistor in the 4th region includes the ion implanting being located in Semiconductor substrate 400 Area（Do not mark）With channel region 411（Region in Fig. 4 included by dotted line frame）, the inter-level dielectric in Semiconductor substrate 400 Layer 401, the groove 410 in interlayer dielectric layer 401, groove 410 corresponds to the top of channel region 411, and the bottom of groove 410 has Gate dielectric layer 412 and high-K dielectric layer 413 on channel region 411, the side wall of groove 410 have offset by gap wall 414 and side wall 415, and the surface of side wall 415 and ion implanted region surface are covered by stress mask layer 416.Being made in ion implanted region has Sigma Shape SiGe 417.
In the present embodiment, in the PMOS transistor in the 4th region, ion implanted region surface does not form metal silication Thing, inside does not carry out ion implanting.
In the present embodiment, Semiconductor substrate 100, Semiconductor substrate 200, Semiconductor substrate 300 and Semiconductor substrate 400 are equal For silicon substrate, therefore each channel region is respectively positioned in silicon substrate, after ultraviolet light, and the Raman spectrum that channel region is returned is silicon silicon Key Raman spectrum, also, after ultraviolet light, ion implanted region also returns to Si prediction Raman spectrum, two Si prediction Ramans Spectrum peak position is sufficiently close to, and state of the art cannot be distinguished by, therefore the actual Si prediction Raman spectrum received during measurement is The total Si prediction Raman spectrum obtained after the superposition of above-mentioned two silicon key Raman spectrum.
In the present embodiment, in aforementioned four region, the material of each stress mask layer can be silicon nitride, each interlayer dielectric layer Material can be silica, the material of each gate dielectric layer can also be silica, and the material of each high-K dielectric layer can be Hafnium oxide, hafnium silicon oxide, lanthana, lanthana aluminium, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, strontium barium oxide titanium, oxygen Change the one kind such as barium titanium, strontium oxide strontia titanium, yittrium oxide, aluminum oxide, lead oxide scandium tantalum or lead niobate zinc.
In the present embodiment, above-mentioned first area, second area, the 3rd region and the 4th region are arranged in one in order Rise.It should be noted that in other embodiments of the invention, above-mentioned first area, second area, the 3rd region and the 4th area Domain can also be located in different wafers or in the diverse location of wafer respectively, be now placed in above-mentioned first area, the The PMOS transistor in manufacturing process in two regions, the 3rd region and the 4th region each makes.
In the present embodiment, it is arranged in a row in order by above-mentioned first area, second area, the 3rd region and the 4th region Afterwards, the PMOS transistor in above-mentioned first area, second area, the 3rd region and the 4th region can be together made, that is, is existed In four regions, it is situated between while completing corresponding ion implanted region, channel region, interlayer dielectric layer, groove, gate oxide, high K The making of matter layer, offset by gap wall, side wall, stress mask layer and SiGe.
Specific process can be there is provided Semiconductor substrate, the Semiconductor substrate have be arranged in a row first area, Second area, the 3rd region and the 4th region.Dummy grid is formed in the Semiconductor substrate in four regions, described Dummy grid side forms offset by gap wall, and the Semiconductor substrate by mask of the offset by gap wall to the dummy grid both sides It is lightly doped.Again in offset by gap wall surface formation side wall, partly the leading in the dummy grid both sides by mask of the side wall Heavy doping is carried out in body substrate, so as to form ion implanted region.Hereafter groove is formed in ion implanted region, and is filled out with SiGe Fill groove formation Sigma shape SiGe.After this, the surface that stress mask layer covers above-mentioned total is formed, and answered Power mask layer upper interlayer dielectric layer, and using the dummy grid as stop-layer, to the interlayer dielectric layer and the stress mask Layer carries out chemical-mechanical planarization (CMP), until the surface of said structure is flushed with dummy grid surface.Then the pseudo- grid are removed Pole forms groove, and sequentially forms gate dielectric layer and high-K dielectric layer in channel bottom.
In above process, can be in western lattice after Sigma's shape SiGe is formed, and before stress mask layer is formed The technique that ion implanting is carried out in agate shape SiGe, and the technique for forming metal silicide on ion implanted region surface.Due to First area, second area, the 3rd region and the 4th region are arranged in a row in order, therefore, can respectively be entered using two layer masks Row above-mentioned two processing step.
Fig. 5 is refer to, when forming metal silicide on ion implanted region surface, mask M11 correspondences first area, mask M12 correspondence second areas, the 3rd region of mask M13 correspondences, the 4th region of mask M14 correspondences.Wherein mask M11 and mask M13 For in the PMOS transistor in blank mask, therefore first area and the 3rd region, ion implanted region surface is formed with metallic silicon Compound.And mask M12 and mask M14 is shadowing mask, therefore, and in PMOS transistor in second area and the 4th region, Ion implanted region surface does not form metal silicide.
Please continue to refer to Fig. 5, when carrying out ion implanting in ion implanted region, mask M15 correspondences first area, mask M16 correspondence second areas, the 3rd region of mask M17 correspondences, the 4th region of mask M18 correspondences.Wherein mask M15 and mask M16 For blank mask, therefore, in the PMOS transistor in first area and second area, ion note is carried out inside ion implanted region Enter, be formed with ion and reinject area.Mask M17 and mask M18 is shadowing mask, therefore, in the 3rd region and the 4th region In PMOS transistor, ion implanting is not carried out inside ion implanted region, ion is not formed and reinjects area.
In the present embodiment, positioned at ion implanted region surface（Nickel）In metal silicide, its thickness range can be 1nm ~15nm, the ion that the ion implanting carried out inside ion implanted region is injected can include phosphonium ion, arsenic ion, boron ion With the one or more in gallium ion, the concentration range of the ion can be 1017cm-3~1020cm-3。
Refer to Fig. 6, in the PMOS transistor being in manufacturing process that the present embodiment is provided, if by one of them Ion implanted region 2（Represent above-mentioned Fig. 1 to Fig. 4 each ion implanted region）As source region, then nearest ion implanting adjacent with it Area 2 is then drain region.And channel region 1（Represent above-mentioned Fig. 1 to Fig. 4 channel region 111, channel region 211, channel region 311 and channel region 411）Between adjacent ions injection region 2.
In the present embodiment, channel region 1 and ion implanted region 2 are larger in the degree upwardly extended along the width W side of channel region 2, That is the width W of channel region 2 is larger, in fact, the width W of channel region 1 is more than or equal to the width of the ultraviolet light hot spot, with In the region for ensureing whole ultraviolet light hot spot irradiation, on channel region width W directions, only one transistor, in other words, in purple In the region that outer hot spot is irradiated to, it is ion implanted region 2 and channel region 1, did not both interrupt, does not also contain other regions, So as to which the channel region strain for ensureing measured is more accurate.
Fig. 7 is refer to, test transistor is irradiated using ultraviolet light hot spot, it is total that acquisition ion implanted region and channel region are returned Si prediction Raman spectrum.PMOS transistor positioned at first area, first total Si prediction is returned after the irradiation of ultraviolet light hot spot and is drawn Graceful spectrum 10.Positioned at the PMOS transistor of second area, second total Si prediction Raman spectrum is returned after the irradiation of ultraviolet light hot spot 20.PMOS transistor positioned at the 3rd region, the 3rd total Si prediction Raman spectrum 30 is returned after the irradiation of ultraviolet light hot spot.It is located at Four-range PMOS transistor, the 4th total Si prediction Raman spectrum 40 is returned after the irradiation of ultraviolet light hot spot.
In the present embodiment, as the above analysis, four regions are respectively positioned in silicon substrate, therefore, channel region and from The actual Si prediction Raman spectrum that sub- injection region is returned is total Si prediction Raman spectrum.It should be noted that aforementioned four region After the irradiation of ultraviolet light hot spot, in addition to returning to four total Si prediction Raman spectrums respectively, such as four can be also returned respectively The other information such as germanium silicon key Raman spectrum, but the present embodiment need not analyze described information, therefore it is not shown.
In the present embodiment, the first area, second area, the 3rd region and four-range areal extent are 5 μm2~ 50μm2.In order that measurement result is accurate, it is necessary to which so that the area of ultraviolet light hot spot and the area in aforementioned four region are in same The order of magnitude.Therefore, the area in aforementioned four region should be moderate, if the area in aforementioned four region is too big, causes follow-up purple The area of outer hot spot is too big, causes the Si prediction Raman spectrum returned to be easily disturbed, measurement result is difficult accurately, if above-mentioned The area in four regions is too small, causes that the area of ultraviolet light hot spot is too small, and light intensity is too low, equally causes measurement result inaccurate. In order to provide required measurement area, and make measurement result accurate, the areal extent in aforementioned four region is set to 5 μm2~ 50μm2。
In the present embodiment, the area of the ultraviolet light hot spot is the first area, second area, the 3rd region or the 4th The 30%~80% of region.Because the area of ultraviolet light hot spot is in micron level, therefore, its shape is typically only capable to as circle, therefore, In order to prevent region that ultraviolet light hot spot is irradiated to beyond aforementioned four region, the area for setting ultraviolet light hot spot is described first Region, second area, the 3rd region or four-range 30%~80%, so that it is above-mentioned to ensure that ultraviolet light hot spot can be entirely fallen within In four regions.
In the present embodiment, ultraviolet wavelength range is 350nm~400nm in the ultraviolet light hot spot.It is purple in the present embodiment Outer hot spot needs to get to channel region through high-K dielectric layer and gate dielectric layer, accordingly, it would be desirable to select the ultraviolet of specific wavelength Light is to ensure that light reaches channel region, so that ensure that the ultraviolet lighting is mapped to after each channel region, being capable of return signal intensity Preferable Si prediction Raman spectrum.
In the present embodiment, first total Si prediction Raman spectrum 10 is formed by two Si prediction Raman spectrums in fact, first Si prediction Raman spectrum is the Si prediction Raman spectrum 11 that channel region 111 is returned, and second Si prediction Raman spectrum is ion note Enter the Si prediction Raman spectrum 12 of area's return.Although Si prediction Raman spectrum 11 is the original drawing that the Si prediction of channel region 111 is returned Graceful spectrum, Si prediction Raman spectrum 12 is that ion implanted region returns to the original Raman spectrum that Si prediction is returned, but is due to silicon silicon The peak position of key Raman spectrum 11 and Si prediction Raman spectrum 12 is sufficiently close to, and state of the art cannot be distinguished by out the two Ramans Spectrum, therefore, in the figure 7, Si prediction Raman spectrum 11 and Si prediction Raman spectrum 12 are represented by dashed line, and are returned by first area The actual Si prediction Raman spectrum returned is first total Si prediction Raman spectrum 10 being formed by stacking by the two Raman spectrums, in figure It is indicated by the solid line in 7.
Due in the ion implanted region of the PMOS transistor of first area, being formed with Sigma's shape SiGe 117 Ion reinjects area 118, and ion implanted region is to be formed with metal silicide 119, and ion reinjects area 118 and metallic silicon Compound 119 can absorb to ultraviolet light, therefore, and the peak value of Si prediction Raman spectrum 12 that ion implanted region is returned is relatively low, leads Cause the peak value of first total Si prediction Raman spectrum 10 relatively low.
In the present embodiment, second total Si prediction Raman spectrum 20 is also to be formed by two Si prediction Raman spectrums, first Si prediction Raman spectrum is the Si prediction Raman spectrum 21 that channel region 211 is returned, and second Si prediction Raman spectrum is ion note Enter the Si prediction Raman spectrum 22 of area's return.Similarly, Si prediction Raman spectrum 21 is the original drawing that the Si prediction of channel region 211 is returned Graceful spectrum, Si prediction Raman spectrum 22 is that ion implanted region returns to the original Raman spectrum that Si prediction is returned, but is due to silicon silicon The peak position of key Raman spectrum 21 and Si prediction Raman spectrum 22 is sufficiently close to, and state of the art cannot be distinguished by out the two Ramans Spectrum, therefore, in the figure 7, Si prediction Raman spectrum 21 and Si prediction Raman spectrum 22 are represented by dashed line, and are returned by first area The actual Si prediction Raman spectrum returned is first total Si prediction Raman spectrum 20 being formed by stacking by the two Raman spectrums, in figure It is indicated by the solid line in 7.
Due in the ion implanted region of the PMOS transistor of second area, being formed with Sigma's shape SiGe 217 Ion reinjects area 218, but is formed without metal silicide, therefore, the decay factor of the PMOS transistor of second area and the The decay factor of the PMOS transistor in one region（Conventional K is represented）Difference, i.e., because second area is formed without metal silicide, The ultraviolet ray intensity thus returned is higher, so that the peakedness ratio Si prediction of Si prediction Raman spectrum 22 that ion implanted region is returned is drawn The peak value of graceful spectrum 12 is high, causes for first total Si prediction Raman spectrum 10 that first area is returned, second area The second total peak value of Si prediction Raman spectrum 20 returned is slightly raised.
In the present embodiment, the 3rd total Si prediction Raman spectrum 30 is also to be formed by two Si prediction Raman spectrums, first Si prediction Raman spectrum is the Si prediction Raman spectrum 31 that channel region 311 is returned, and second Si prediction Raman spectrum is ion note Enter the Si prediction Raman spectrum 32 of area's return.Similarly, Si prediction Raman spectrum 31 is the original drawing that the Si prediction of channel region 311 is returned Graceful spectrum, Si prediction Raman spectrum 32 is that ion implanted region returns to the original Raman spectrum that Si prediction is returned, but is due to silicon silicon The peak position of key Raman spectrum 31 and Si prediction Raman spectrum 32 is sufficiently close to, and state of the art cannot be distinguished by out the two Ramans Spectrum, therefore, in the figure 7, Si prediction Raman spectrum 31 and Si prediction Raman spectrum 32 are represented by dashed line, and are returned by first area The actual Si prediction Raman spectrum returned is first total Si prediction Raman spectrum 30 being formed by stacking by the two Raman spectrums, in figure It is indicated by the solid line in 7.
Due in the ion implanted region of the PMOS transistor in the 3rd region, being formed with Sigma's shape SiGe 317 Metal silicide, but Sigma's shape SiGe 317 is unimplanted ion, therefore, the decay of the PMOS transistor in the 3rd region The factor is also different from the decay factor of the PMOS transistor of first area, i.e., because the 3rd region is not injected into ion, thus return The ultraviolet ray intensity returned is higher, so that the peakedness ratio Si prediction Raman light for the Si prediction Raman spectrum 32 that ion implanted region is returned The peak value of spectrum 12 is high, for the first total Si prediction Raman spectrum 10 returned accordingly, with respect to first area, and the 3rd region is returned The 3rd total peak value of Si prediction Raman spectrum 30 also slightly raise.
In the present embodiment, the 4th total Si prediction Raman spectrum 40 is also to be formed by two Si prediction Raman spectrums, first Si prediction Raman spectrum is the Si prediction Raman spectrum 41 that channel region 411 is returned, and second Si prediction Raman spectrum is ion note Enter the Si prediction Raman spectrum 42 of area's return.Similarly, Si prediction Raman spectrum 41 is the original drawing that the Si prediction of channel region 411 is returned Graceful spectrum, Si prediction Raman spectrum 42 is that ion implanted region returns to the original Raman spectrum that Si prediction is returned, but is due to silicon silicon The peak position of key Raman spectrum 41 and Si prediction Raman spectrum 42 is sufficiently close to, and state of the art cannot be distinguished by out the two Ramans Spectrum, therefore, in the figure 7, Si prediction Raman spectrum 41 and Si prediction Raman spectrum 42 are represented by dashed line, and are returned by first area The actual Si prediction Raman spectrum returned is first total Si prediction Raman spectrum 40 being formed by stacking by the two Raman spectrums, in figure It is indicated by the solid line in 7.
Because in the ion implanted region of four-range PMOS transistor, Sigma's shape SiGe 417 is both without shape It is also unimplanted to have ion into metal silicide, therefore, the decay factor of four-range PMOS transistor also with first area The decay factor of PMOS transistor is different, i.e., be also not injected into ion because the 3rd region is formed without metal silicide, thus The ultraviolet ray intensity of return is higher, so that the peakedness ratio Si prediction Raman for the Si prediction Raman spectrum 42 that ion implanted region is returned The peak value of spectrum 12 is high, therefore for first total Si prediction Raman spectrum 10 that first area is returned, the 4th region is returned The 4th total peak value of Si prediction Raman spectrum 40 returned is further raised.
In the present embodiment, in four regions, correspondence has stress mask layer and inter-level dielectric on each ion implanted region Layer.Because the material of interlayer dielectric layer is silica, for its ultraviolet light to the used particular range of wavelengths of this implementations, Transparent material is substantially corresponded to, therefore, interlayer dielectric layer reaches ion implanted region to ultraviolet light hot spot not to be influenceed substantially.And answer The material of power mask layer is silicon nitride, and on the one hand its thickness is smaller, and on the other hand it will not equally cause substantive shadow to ultraviolet light Ring, therefore, its influence to ultraviolet light hot spot can also be ignored.In four regions, there is high K dielectric above each channel region Layer, because its thickness is smaller, the influence to the ultraviolet light of particular range of wavelengths can be ignored, therefore not influence ultraviolet light to reach ditch Road area.
Please continue to refer to Fig. 7, after different total Si prediction Raman spectrums are obtained, returned further according to different test transistors The total Si prediction Raman spectrums of difference, obtain the Si prediction Raman spectrum of channel region return.I.e. according to first total Si prediction Raman Spectrum 10, second total Si prediction Raman spectrum 20, the 3rd total Si prediction Raman spectrum 40 of total Si prediction Raman spectrum 30 and the 4th, Obtain the Si prediction Raman spectrum of channel region return.
Specifically, the silicon in the channel region in state, can cause the movement and deformation of Ramon's spectrum, Raman scattering is one Inelastic scattering is planted, when frequency is ωiUltraviolet light and measurement zone in frequency be ωjPhonon interaction and occur energy Handing-over, it is ω that the UV frequencies come are scattered back from channel regions, have：
ωs=ωi±ωj
Frequencies omegai- ωjIt is called one-level Stokes (Stokes) Raman scattering, frequencies omegai+ ωjBe called one-level it is anti-this Lentor is general only to study most strong one-level Raman scattering.
Raman scattering is carried out respectively before and after strain to same material mold layer, then the one-level that front and rear Raman scattering twice is obtained Stokes Raman is scattered and one-level anti-Stokes can change, frequencies omega twice front and rear in other wordsi- ωjAnd frequency ωi+ ωjIt can change.And the change of this frequency is referred to as Raman frequency shift, twice Raman frequency shift that is, the position of Si prediction Raman spectrum Movement is put, peak position movement is also can be regarded as.Raman frequency shift reflects the change of the change of atomic distance, i.e. bond distance and bond angle, Exactly reflect the information of strain.
As the above analysis, described in being obtained from the first area, second area, the 3rd region and the 4th region First total Si prediction Raman spectrum 10, second total Si prediction Raman spectrum 20, the 3rd total Si prediction Raman spectrum 30 and the 4th are total In Si prediction Raman spectrum 40, four total Si prediction Raman spectrums are the Si prediction Raman spectrums and ion returned by channel region The Si prediction Raman spectrum that injection region is returned is formed by stacking, and its reason is that state of the art cannot be distinguished by out the two peak positions very Close Si prediction Raman spectrum.Also, in four regions, the Si prediction Raman spectrum returned by channel region, either Peak value or peak position are all identical, and the Si prediction Raman spectrum that four regions intermediate ion injection region is returned is then to that should have four kinds Different situations.
Four kinds of different situations are referred specifically to, and the Si prediction Raman spectrum peak value that first area ion implanted region is returned is minimum, The Si prediction Raman spectrum peak value that 4th region ion implanted region is returned is maximum, and second area and the 3rd region ion implanted region The Si prediction Raman spectrum peak value of return is located in the middle of both, and the Si prediction Raman light that second area ion implanted region is returned Spectrum peak is slightly less than the Si prediction Raman spectrum peak value that the three or three region ion implanted region is returned.
The reason for above-mentioned situation is that the ion implanted region surface of first area has metal silicide and internal with ion Area is reinjected, the ion implanted region surface of second area does not form metal silicide but there is ion to reinject area, the 3rd for inside The ion implanted region surface in region has metal silicide but inside does not form ion and reinjects area, four-range ion implanting Area surface does not form metal silicide and inside does not form ion and reinjects area, regardless of whether being that ion reinjects area or metal Silicide can all absorb to ultraviolet light, cause the peak-fall of Si prediction Raman spectrum.Summarize and understand, actually four kinds feelings Condition be whether there is metal silicide and whether there is ion reinject area be possible to combine.
It can be distinguished by the com-parison and analysis of four total Si prediction Raman spectrums：1. ion implanted region surface metal silication Influence of the thing to total Si prediction Raman spectrum；2. the ion inside ion implanted region reinjects area to total Si prediction Raman spectrum Influence；3. influence of the ion implanted region to total Si prediction Raman spectrum.According to these results, it becomes possible to individually distinguish channel region The Si prediction Raman spectrum of return.
Specifically, the Si prediction Raman spectrum of channel region return can be obtained using the method for Gauss swarming.I.e. four total Si prediction Raman spectrum can regard four total Gaussian peaks as, and each of this four total Gaussian peaks are folded by two Gaussian peaks Plus form.Gaussian peak is represented with function C, then first total Gaussian peak can use C10Represent, be superimposed as two of first total Gaussian peak Gaussian peak can use C respectively11And C12Represent, then have：
C10=aC11+bC12
It can similarly obtain
C20=aC21+bC22
C30=aC31+bC32
C40=aC41+bC42
In above-mentioned four formula, C10、C20、C30And C40For, it is known that and having a C11=C21=C31=C41, and for C12、C22、C32With C42For, its peak position is identical, different simply peak values, therefore, it can the iterative fitting by Gaussian peak（It can be calculated by accordingly Machine program is completed）And coefficient a and coefficient b value are obtained, and further obtain C11、C21、C31And C41, that is, obtain channel region return Si prediction Raman spectrum.
In the present embodiment, after the Si prediction Raman spectrum of channel region return is obtained, the Si prediction that channel region is returned Raman spectrum is compared and analyzed with the Si prediction Raman spectrum for answering the channel region of vanishing to return, and obtains channel region strain.
The Si prediction Raman spectrum returned for the channel region for answering vanishing, can be measured, i.e., by identical experimental method The channel region for answering vanishing is fabricated separately in certain area（That is active area, its area can be more than ultraviolet light facula area）, so The channel region for answering vanishing is irradiated with ultraviolet light hot spot afterwards, the Si prediction Raman spectrum for answering the channel region of vanishing to return is obtained.
In the present embodiment, shape and SiGe of the factor including geometrical factor, i.e. SiGe of influence channel region strain are arrived The factors such as the distance of channel region, another factor is content and the distribution of germanium in SiGe, in addition, lattice integrated degree（For example With the presence or absence of dislocation）It is also one of factor.Due in the first area, second area, the 3rd region and the 4th region, Corresponding PMOS, which makes, has Sigma's shape SiGe, stress mask layer, metal silicide and ion to reinject the structures such as area, because This, the Si prediction extrusion in its channel region, corresponding bond distance and bond angle change, and cause channel region to strain, And this strain is influenceed by above-mentioned each factor, and the peak position amount of movement of Si prediction Raman spectrum and direction represent the strong of strain Weak and type（Extruding and extension）.The channel region with strain is irradiated with ultraviolet light hot spot, can obtain being different from answering vanishing The Si prediction Raman spectrum of Si prediction Raman spectrum that is returned of channel region, by the contrast of two Si prediction Raman spectrums, The frequency displacement of Raman crest can be obtained（Peak position changes）, so as to obtain channel region strain.
Specifically, can be obtained according to above-mentioned analysis：
Δ ω=- 500 (ω of σ=- 500m- ωn)
Wherein, -500 be empirical coefficient, can by demarcate or table look-up wait acquisition, ωmFor the present embodiment said process The Si prediction Raman spectrum peak position that the channel region of acquisition is returned, ωnThe Si prediction Raman returned for the channel region for answering vanishing Spectrum peak position, and Δ ω is the peak position amount of movement in units of frequency, and σ is stress, its unit is Mpa, by above-mentioned relation, Channel region stress is can obtain, further according to σ=E ε, and then channel region strain amount ε is obtained, wherein, E is the modulus of elasticity of channel region, It can be obtained by testing.
The measuring method for the channel region strain that the present embodiment is provided, provides transistor to be measured, the crystal first Pipe is in manufacturing process, and it does not form metal gates, now irradiates the transistor using ultraviolet light hot spot, returns to transistor In total Si prediction Raman spectrum for being returned jointly by channel region and ion implanted region, the total silicon of difference returned according to different crystal pipe Silicon key Raman spectrum, isolates the Si prediction Raman spectrum of channel region return, then the Si prediction Raman spectrum that channel region is returned It is compared and analyzes with the Si prediction Raman spectrum that the channel region of answering vanishing is returned, obtains channel region strain, methods described Obtained channel region strain true and accurate is measured, and whole method is simple and feasible, saves cost, does not damage transistor work With spectral region is big, and frequency displacement is not limited by light source frequency, applied widely.
The measuring method for the channel region strain that the present embodiment is provided, because the Si prediction that can distinguish channel region return is drawn The Si prediction Raman spectrum that graceful spectrum and ion implanted region are returned, therefore, it is possible to channel region strain is made independentization with accurately The measurement of change, and the measuring method only needs to use normal production craft step, and it is appropriate to some steps therein Adjust, you can obtain required measurement structure, without being fabricated separately, therefore with process compatible the characteristics of, in addition, described The measurement of measuring method and analysis process are simple, and measurement period is short, it is easy to control.
The embodiment of the present invention two provides the measuring method of another channel region strain.
There is provided multiple device areas first.
Formed in each device area in the test transistor of same conduction type, the present embodiment, test transistor is similarly PMOS transistor in manufacturing process, to ensure that measurement result is accurate.
In the present embodiment, PMOS transistor is located in the 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain respectively, The ion implanting plot structure of PMOS transistor has difference in different components region.
Fig. 8 is refer to, the PMOS transistor in the 5th region includes the ion implanting being located in Semiconductor substrate 500 Area（Do not mark）With channel region 511（Region in Fig. 8 included by dotted line frame）, the inter-level dielectric in Semiconductor substrate 500 Layer 501, the groove 510 in interlayer dielectric layer 501, groove 510 corresponds to the top of channel region 511, and the bottom of groove 510 has Gate oxide 512 and high-K dielectric layer 513 on channel region 511, the side wall of groove 510 have offset by gap wall 514 and side wall 515, and the surface of side wall 515 and ion implanted region surface are covered by stress mask layer 516.Being made in ion implanted region has Sigma Shape SiGe 517.
In the present embodiment, in the PMOS transistor in the 5th region, ion implanted region surface is formed with metal silication Thing 519, inside has been carried out inside ion implanting, ion implanted region（That is, in Sigma's shape SiGe 517）Form ion again Injection region 518.
Fig. 9 is refer to, the PMOS transistor in the 6th region includes the ion implanting being located in Semiconductor substrate 600 Area（Do not mark）With channel region 611（Region in Fig. 6 included by dotted line frame）, the inter-level dielectric in Semiconductor substrate 600 Layer 601, the groove 610 in interlayer dielectric layer 601, groove 610 corresponds to the top of channel region 611, and the bottom of groove 610 has Gate oxide 612 and high-K dielectric layer 613 on channel region 611, the side wall of groove 610 have offset by gap wall 614 and side wall 615, and the surface of side wall 615 and ion implanted region surface are covered by stress mask layer 616.Being made in ion implanted region has Sigma Shape SiGe 617.
From unlike embodiment one, the present embodiment be located at the 6th region in PMOS transistor in, ion implanted region table Face does not gradually form metal silicide from being formed with metal silicide 619 and transit to, inside ion implanted region（That is, Sigma's shape In SiGe 617）Ion implanting has been carried out, ion has been formed with and reinjects area 618.
Figure 10 is refer to, the PMOS transistor in SECTOR-SEVEN domain includes the ion note being located in Semiconductor substrate 700 Enter area（Do not mark）With channel region 711（Region in Figure 10 included by dotted line frame）, interlayer Jie in Semiconductor substrate 700 Matter layer 701, the groove 710 in interlayer dielectric layer 701, groove 710 corresponds to the top of channel region 711, the bottom of groove 710 tool There are gate oxide 712 and high-K dielectric layer 713 on channel region 711, the side wall of groove 710 has offset by gap wall 714 and side Wall 715, and the surface of side wall 715 and ion implanted region surface are covered by stress mask layer 716.Being made in ion implanted region has western lattice Agate shape SiGe 717.
From unlike embodiment one, the present embodiment be located at SECTOR-SEVEN domain in PMOS transistor in, ion implanted region table Face is formed with inside metal silicide 719, ion implanted region gradually from having carried out ion implanting and transit to not carry out ion implanting, Therefore inside ion implanted region（That is, in Sigma's shape SiGe 717）It is gradually transitions from being formed with ion and reinjecting area 718 There is no ion to reinject area.
Figure 11 is refer to, the PMOS transistor in Section Eight domain includes the ion note being located in Semiconductor substrate 800 Enter area（Do not mark）With channel region 811（Region in Figure 11 included by dotted line frame）, interlayer Jie in Semiconductor substrate 800 Matter layer 801, the groove 810 in interlayer dielectric layer 801, groove 810 corresponds to the top of channel region 811, the bottom of groove 810 tool There are gate dielectric layer 812 and high-K dielectric layer 813 on channel region 811, the side wall of groove 810 has offset by gap wall 814 and side Wall 815, and the surface of side wall 815 and ion implanted region surface are covered by stress mask layer 816.Being made in ion implanted region has western lattice Agate shape SiGe 817.
In the present embodiment, in the PMOS transistor in Section Eight domain, ion implanted region surface does not form metal silication Inside thing, ion implanted region（That is, in Sigma's shape SiGe 817）Ion implanting is not carried out.
In the present embodiment, in aforementioned four region, the material of each stress mask layer, each interlayer dielectric layer and each gate dielectric layer The related content of embodiment one is referred to property.
Above-mentioned 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain are equally arranged in one by the present embodiment in order Rise, and cause the PMOS transistor one in the manufacturing process in above-mentioned 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain With making, i.e., complete simultaneously between ion implanted region, channel region, interlayer dielectric layer, groove, gate oxide, high-K dielectric layer, skew Gap wall, side wall, the making of stress mask layer and SiGe.Specific process may be referred to the corresponding contents of embodiment one.
From unlike embodiment one, in order to make in the 6th region, gradually transitting to from being formed with metal silicide 619 Do not formed in the ion implanted region of metal silicide, and SECTOR-SEVEN domain, be gradually transitioned into from being formed with ion and reinject area 718 There is no ion to reinject the ion implanted region in area, the present embodiment uses mask as shown in figure 12 to combine to form aforementioned four area PMOS in domain.
Figure 12 is refer to, when forming metal silicide on ion implanted region surface, the 5th region of mask M21 correspondences, mask The 6th region of M22 correspondences, mask M23 correspondence SECTOR-SEVENs domain, mask M24 correspondence Section Eight domain.Wherein mask M21 and mask M23 For in the PMOS transistor on blank mask, thus the 5th region and SECTOR-SEVEN domain, ion implanted region surface is formed with metallic silicon Compound.And mask M22 and be that half shadowing mask, i.e. mask M22 half are blank mask, second half is actual mask, also, is covered The boundary line and channel region length direction angled relationships at 45 ° in mould M22 blank masks region and actual mask region, so that In PMOS transistor on 6th region, ion implanted region surface is not formed from being formed with metal silicide 619 and transit to gradually Metal silicide, as shown in Figure 9.Mask M24 is shadowing mask, therefore, in the PMOS transistor on Section Eight domain, ion implanting Area surface does not form metal silicide.
It should be noted that in other embodiments of the invention, the boundary in blank mask region and actual mask region Line and channel region length direction into angle can also be between 30 °~60 °.
Please continue to refer to Figure 12, when forming metal silicide on ion implanted region surface, the 5th region of mask M25 correspondences, The 6th region of mask M26 correspondences, mask M27 correspondence SECTOR-SEVENs domain, mask M28 correspondence Section Eight domain.Wherein mask M25 and mask During M26 is the PMOS transistor on blank mask, thus the 5th region and the 6th region, carried out inside ion implanted region from Son injection.And it is blank mask that mask M27, which is half shadowing mask, i.e. mask M27 half, second half is actual mask, also, is covered Blank masks area and the boundary line and channel region length direction angle at 45 ° in actual mask region in mould M27, so that the In PMOS transistor on seven regions, ion implanted region by it is internal gradually from be formed with ion reinject area 718 be transitioned into not from Son reinjects the ion implanted region in area.Mask M28 is shadowing mask, therefore, in the PMOS transistor on Section Eight domain, ion note Enter and do not carry out ion implanting inside area.
Figure 13 is refer to, test transistor is irradiated using ultraviolet light hot spot 90, ion implanted region is obtained and channel region is returned Total Si prediction Raman spectrum.
From unlike embodiment one, in the present embodiment, the direction as shown in hollow arrow in Figure 13 99 of ultraviolet light hot spot 90 It is mobile, irradiation is scanned successively to the 5th region 95, the 6th region 96, SECTOR-SEVEN domain 97 and Section Eight domain 98 in order, obtained A series of different total Si prediction Raman spectrums for taking the ion implanted region and the channel region to return.It should be noted that In other embodiments of the invention, ultraviolet light hot spot can also be by Section Eight domain, SECTOR-SEVEN domain, the 6th region to the 5th region Order be scanned irradiation.
Specifically, ultraviolet light hot spot is radiated at after the PMOS transistor in the 5th region 95, the 5th total Si prediction Raman is returned Spectrum 91.Ultraviolet light hot spot is moved from the 5th region 95 to the 6th region 96 again, multiple stepping total silicon are obtained Silicon key Raman spectrum, until ultraviolet light hot spot is all carried out in the 6th region 96.Then proceed to from the 6th region 96 to SECTOR-SEVEN Move in domain 97.Moved again from SECTOR-SEVEN domain 97 to Section Eight domain 98.Scanning irradiation is kept in moving process, it is lasting to obtain corresponding Total Si prediction Raman spectrum.
Show from the 5th region 95, the 6th region 96, SECTOR-SEVEN domain 97 and Section Eight domain 98 and returned wherein in Figure 13 One total Si prediction Raman spectrum, is respectively the 5th total Si prediction Raman spectrum 91 returned from the 5th region 95, from the 6th area Domain 96 return the 6th total Si prediction Raman spectrum 92, from SECTOR-SEVEN domain 97 return the 7th total Si prediction Raman spectrum 93 and from The 8th total Si prediction Raman spectrum 94 that Section Eight domain 98 is returned, but total Si prediction Raman spectrum one that the present embodiment is returned is Multiple total Si prediction Raman spectrums of row.When being analyzed, total Si prediction Raman light of requirement can be chosen as needed Compose for analyzing.
In the present embodiment, no matter how many is individual for the total Si prediction Raman spectrum returned from the 5th region 95, each total silicon silicon Key Raman spectrum is all identical, and this 5th total Si prediction Raman spectrum 91 is formed by two Si prediction Raman spectrums, first Si prediction Raman spectrum（As shown in phantom in Figure 13, do not mark）It is the Si prediction Raman spectrum that channel region 511 is returned, second Si prediction Raman spectrum（As shown in phantom in Figure 13, do not mark）It is the Si prediction Raman spectrum that ion implanted region is returned.
Due in the ion implanted region of the PMOS transistor in the 6th region 96, being formed in Sigma's shape SiGe 517 There is ion to reinject area 518, and ion implanted region is to be formed with metal silicide 519, and ion reinjects area 518 and metal Silicide 519 can absorb to ultraviolet light, therefore, and the Si prediction Raman spectrum peak value that ion implanted region is returned is relatively low, leads Cause the peak value of first total Si prediction Raman spectrum 91 relatively low.
In the present embodiment, the total Si prediction Raman spectrum returned from the 6th region 96 in gradually mobile and peak value it is elevated become Gesture.Because, for each the 6th total Si prediction Raman spectrum 92 returned from the 6th region 96, it is by two Si predictions Raman spectrum is formed, first Si prediction Raman spectrum（As shown in phantom in Figure 13, do not mark）It is the silicon that channel region 611 is returned Silicon key Raman spectrum, second Si prediction Raman spectrum（As shown in phantom in Figure 13, do not mark）It is that ion implanted region is returned Si prediction Raman spectrum.
For different total Si prediction Raman spectrums, it is different with peak position in peak value, because in the 6th region 96, ion Injection region surface does not gradually form metal silicide from being formed with metal silicide 619 and transit to, therefore, in ion implanted region Metal silicide 618 is gradually decreased during ultraviolet light beam spot scans, and metal silicide 618 absorbs the effect of ultraviolet light gradually Weaken, therefore the total Si prediction Raman spectrum peak value returned is gradually stepped up, and peak position also accordingly changes.
Similar, total Si prediction Raman spectrum from SECTOR-SEVEN domain 97 and the return of Section Eight domain 98 can be analyzed, Specific analysis process refers to the related content of embodiment one, will not be repeated here.
In the present embodiment, the 5th region 95, the 6th region 96, the areal extent in SECTOR-SEVEN domain 97 and Section Eight domain 98 For 5 μm2~50 μm2, the area in the region is set within this range, to provide required measurement area, makes measurement result accurate Really.
In the present embodiment, the area of the ultraviolet light hot spot is the 5th region 95, the 6th region 96, SECTOR-SEVEN domain 97 With the 30%~80% of the area of Section Eight domain 98.Because the area of ultraviolet light hot spot is in micron level, therefore, its shape is typically only capable to For circle, therefore, in order to prevent region that ultraviolet light hot spot is irradiated to beyond aforementioned four region, the face of ultraviolet light hot spot is set Product is the 30%~80% of the 5th region 95, the 6th region 96, SECTOR-SEVEN domain 97 and the area of Section Eight domain 98, so as to ensure purple Outer hot spot can be entirely fallen within aforementioned four region.
In the present embodiment, ultraviolet wavelength range is 350nm~400nm in the ultraviolet light hot spot.The wave-length coverage Ultraviolet lighting be mapped to after each channel region, being capable of the preferable Si prediction Raman spectrum of return signal intensity.
In the present embodiment, after the applicable total Si prediction Raman spectrum of selection, can according to the identical principle of embodiment one Analysis obtains channel region strain, and the principle refers to the corresponding contents of embodiment one, will not be repeated here.
From unlike embodiment one, in the measuring method for the channel region strain that the present embodiment is provided, measuring what is returned Total Si prediction Raman spectrum is a series of multiple total Si prediction Raman spectrums, therefore, using multiple total Si prediction Raman lights The Si prediction Raman spectrum of channel region return is analyzed and obtained to spectrum, so that the strain that measurement is obtained is more accurate.Moreover, Because the 5th region 95, the 6th region 96, SECTOR-SEVEN domain 97 and Section Eight domain 98 are located in same row, ultraviolet spectrum is being carried out During irradiation, more facilitate, simplify measurement procedure.
It should be noted that the measuring method of channel region strain provided by the present invention equally can be used in measurement NMOS crystalline substances Body pipe channel region strain, specifically, having silicon nitride due to generally being made in nmos pass transistor ion implanted region to be carried to channel region For tensile stress, therefore, the laser of respective wavelength can be selected to be irradiated in addition according to the property of silicon nitride and obtain corresponding Si prediction Raman spectrum, so as to determine corresponding channel region strain.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute The scope of restriction is defined.

Claims (11)

1. a kind of measuring method of channel region strain, it is characterised in that including：
Multiple device areas are provided；
The test transistor of same conduction type is formed in each device area, the test transistor includes being located at Semiconductor substrate In ion implanted region and the channel region between adjacent two ion implanted region, the test transistor do not form metal gate The ion implanting plot structure of test transistor has difference in pole, different components region；
Each device area is irradiated successively using ultraviolet light hot spot, and obtains the ion of test transistor in each device area Total Raman spectrum that injection region and channel region are returned；
The total Raman spectrum of difference returned according to test transistor in different components region, isolates the Raman spectrum of channel region, And obtain the dependent variable of the channel region.
2. the measuring method of channel region strain as claimed in claim 1, it is characterised in that the channel region is located at silicon substrate In, the ion implanted region, which makes, SiGe, and total Raman spectrum is total Si prediction Raman spectrum.
3. the measuring method of channel region strain as claimed in claim 2, it is characterised in that the device area includes the firstth area Domain, second area, the 3rd region and the 4th region, the test transistor are PMOS transistor, and the ion implanted region makes There is Sigma's shape SiGe, wherein：
The PMOS transistor positioned at the first area returns to first total Si prediction Raman spectrum, the ion implanted region table Face is formed with metal silicide, and inside has carried out ion implanting；
The PMOS transistor positioned at the second area returns to second total Si prediction Raman spectrum, the ion implanted region table Face does not form metal silicide, and inside has carried out ion implanting；
The PMOS transistor positioned at the 3rd region returns to the 3rd total Si prediction Raman spectrum, the ion implanted region table Face is formed with metal silicide, and inside does not carry out ion implanting；
The 4th total Si prediction Raman spectrum, the ion implanted region table are returned positioned at PMOS transistor described in the four-range Face does not form metal silicide, and inside does not carry out ion implanting.
4. the measuring method of channel region strain as claimed in claim 3, it is characterised in that the first area, second area, 3rd region and four-range areal extent are 5 μm2~50 μm2, the area of the ultraviolet light hot spot is the first area, Second area, the 3rd region or four-range 30%~80%.
5. the measuring method of channel region strain as claimed in claim 2, it is characterised in that the device area includes sequentially connecting The 5th region, the 6th region, SECTOR-SEVEN domain and the Section Eight domain connect, the test transistor is PMOS transistor, the ion Injection region, which makes, Sigma's shape SiGe, wherein：
In the PMOS transistor in the 5th region, the ion implanted region surface is formed with metal silicide, interior Portion has carried out ion implanting；
In the PMOS transistor in the 6th region, the ion implanted region surface is gradually from being formed with metal silication Thing transits to and does not form metal silicide, and inside has carried out ion implanting；
In the PMOS transistor in the SECTOR-SEVEN domain, the ion implanted region surface is formed with metal silicide, interior Portion is gradually from having carried out ion implanting and transitted to not carry out ion implanting；
In the PMOS transistor in the Section Eight domain, the ion implanted region surface does not form metal silicide, interior Portion does not carry out ion implanting；
When irradiating the test transistor using ultraviolet light hot spot, the ultraviolet light hot spot is in order or backward is to the described 5th Region, the 6th region, SECTOR-SEVEN domain and Section Eight domain are scanned irradiation successively, and a series of different total Si predictions of return are drawn Graceful spectrum.
6. the measuring method of channel region strain as claimed in claim 5, it is characterised in that by controlling for ion implanting Mask and the mask for forming metal silicide, form and are located in the 5th region, the 6th region, SECTOR-SEVEN domain and Section Eight domain PMOS transistor.
7. the measuring method of channel region strain as claimed in claim 5, it is characterised in that the 5th region, the 6th region, The areal extent in SECTOR-SEVEN domain and Section Eight domain is 5 μm2~50 μm2, the area of the ultraviolet light hot spot is the 5th region, 6th region, the 30%~80% of SECTOR-SEVEN domain or Section Eight domain, the channel region width is more than or equal to the ultraviolet light The width of hot spot.
8. the measuring method of channel region strain as claimed in claim 1, it is characterised in that ultraviolet light in the ultraviolet light hot spot Wave-length coverage is 350nm~400nm.
9. the measuring method of channel region strain as claimed in claim 1, it is characterised in that the channel region of the test transistor Top is groove, and the bottom of the groove has in the gate oxide being located above the channel region and high-K dielectric layer at least One layer, the ultraviolet hot spot reaches the channel region by the groove.
10. the measuring method of channel region strain as claimed in claim 9, it is characterised in that the side wall of the groove has inclined Clearance wall and side wall are moved, the test transistor also includes stress mask layer, and the stress mask layer is located at the side wall surface With the ion implanted region surface.
11. the measuring method of the channel region strain as described in claim 3 or 5, it is characterised in that the metal silicide is nickel Metal silicide, the thickness range of the metal silicide is the ion of injection inside 1nm~15nm, the ion implanted region Including the one or more in phosphonium ion, arsenic ion, boron ion and gallium ion, the concentration range of the ion is 1017cm-3 ~1020cm-3。
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