CN104616699B - The design method of the anti-Multiple-bit upsets Reliability Evaluation Model of memory under the influence of Negative Bias Temperature Instability - Google Patents
The design method of the anti-Multiple-bit upsets Reliability Evaluation Model of memory under the influence of Negative Bias Temperature Instability Download PDFInfo
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Abstract
The design method of the anti-Multiple-bit upsets Reliability Evaluation Model of memory, is related to radiation hardening circuit field under the influence of Negative Bias Temperature Instability, and in particular to a kind of design method of memory Reliability Evaluation Model under Multiple-bit upsets effect.In order to solve the problem of model evaluation accuracy rate that the anti-Multiple-bit upsets Reliability Evaluation Model design method of existing memory designs is low.Influence of the present invention analysis NBTI effects to critical charge, obtains the respective value and corresponding relation of NBTI effects and critical charge；Count EventSBUAnd EventMBU, obtain the probability of the memory generation MBUs events of different critical electric charge；According to the MBUs probabilities of happening and the relation curve of NBTI stress times, the Multiple-bit upsets probability of happening model for considering NBTI effects is set upFinally give the anti-Multiple-bit upsets MTTF models of memory of the consideration NBTI effects of unused scrub techniquesWith the anti-Multiple-bit upsets MTTF models of memory of the consideration NBTI effects using scrub techniquesThe present invention is applied to radiation hardening circuit field.
Description
Technical field
The present invention relates to radiation hardening circuit field, and in particular to a kind of memory reliability under Multiple-bit upsets effect
The design method of assessment models.
Background technology
The soft error that Single event upset effecf is caused is the sternness that the design of aerospace applications IC reliability faces
One of challenge.When its memory sensitive nodes of space radiation particle bombardment, extra electron hole pair can be produced, if electric charge is accumulated
Tired more than one critical value, i.e. critical charge to a certain extent, it will upset memory cell logical value, occur soft error, then
Cause electronic system malfunction, spacecraft disabler etc..Single-particle inversion include unit upset (single bit upset,
SBU) and Multiple-bit upsets (multiple bit upsets, MBUs), using error correcting code (error correction
Code, ECC) it is the effective means for protecting memory anti-single particle upset.As integrated circuit feature size develops into deep sub-micro
Rice field, the distance between adjacent cells constantly reduce with the increase of density of memory cells, and unit overturns the growth of probability
Tend to saturation, Multiple-bit upsets phenomenon is increasingly serious, the problem of having become very important.When memory reliability is designed, need
The strong code of correction capability is taken fault-tolerant.
In addition to by the method for expensive radiation test analysis chip soft fault preventing ability, now widely used one kind
Method is when the characteristic that memory raying influences being abstracted into the mode of mathematical modeling to occur Multiple-bit upsets to assess memory
Reliability.This method is generally with the mean free error time (mean time to failure, MTTF) for reliability index
It is modeled, memory reliability can be quickly and efficiently assessed at reservoir designs initial stage, and analyzed every time
With little need for any expense in journey.The reliability model of the anti-Multiple-bit upsets of analysis memory more ripe at present is by modification
Memory span or event arrival rate, Multiple-bit upsets event is simplified, equivalent into unit rollover event, and erasing skill is not used
Art and the use of the anti-Multiple-bit upsets Reliability Evaluation Model of memory under scrub techniques is respectively formula one and formula two：
Wherein,For the anti-Multiple-bit upsets MTTF models of memory of scrub techniques are not used；For the anti-unit upset MTTF models of memory that scrub techniques are not used；To use erasing
The anti-Multiple-bit upsets MTTF models of memory of technology；To be overturn using the anti-unit of the memory of scrub techniques
MTTF models；M and λ are respectively the memory number of words and event arrival rate in the case of SBU, in the case of M ' and λ ' are respectively MBUs
Memory number of words and event arrival rate, tsFor erasing time interval.
For the truly radiation environment of reaction chip as far as possible, current existing model considers that multi-bit error is overlapping, spoke
The radiation environment factors such as the sub- incident angle of radion.In fact, when chip is in running order, long term device is in property under stress
It is able to can decrease, this is due to caused by aging effect.Negative Bias Temperature Instability (negative bias
Temperature instability, NBTI) it is one of typical aging effect, it can cause transistor threshold voltage to drift about,
Critical charge is caused to reduce, then Enhanced Radiation Reduced Blast sensitiveness, now, storage can not be assessed and (over-evaluated) to current model exactly
The reliability of device.
The content of the invention
The present invention is in order to solve the mould that the anti-Multiple-bit upsets Reliability Evaluation Model design method of existing memory is designed
Type assesses the problem of accuracy rate is low.
The design method of the anti-Multiple-bit upsets Reliability Evaluation Model of memory under the influence of Negative Bias Temperature Instability,
Based on it is assumed hereinafter that what condition was realized：
(1) soft error in memory meets Poisson distribution；
(2) probability for occurring soft error in memory cell is equally distributed；
(3) failure, which occurs, for memory at least needs radiation event twice；During using ECC reinforcement techniques, if a MBUs thing
Caused maximum wrong digit is L to part in memory, will use the ECC that capability for correcting is L；Only when on a word be more than L
When position is made a mistake, memory can just occur once to fail；
Radiation event twice on (4) words is the principal element of out of memory；Because ECC correction capability is with depositing
Maximum error number is identical on one word of reservoir, and the error number under high-energy radiation can substantially increase, the mistake that radiation event is produced twice
Number is commonly greater than L by mistake；
Comprise the following steps：
Step 1: influence of the analysis NBTI effects to critical charge, obtain the respective value of NBTI effects and critical charge with
And corresponding relation；
Step 2: building radiation environment analog platform, the equivalent sensitive body of the corresponding memory cell of different critical electric charge is set up,
For different dimension sensitive bodies, make the different particles of different-energy with the incident storage array of different angles, each case is weighed respectively
100,000 emulation, statistics SBU event times Event are carried out againSBUWith MBUs event times EventMBU, according to formula (1), obtain
The Probability p of MBUs events occurs for the memory of different critical electric chargeMBU；
Step 3: according to the memory of the respective value of NBTI effects and critical charge, corresponding relation and different critical electric charge
Occur the probability of MBUs events, obtain different NBTI stress times and distinguish the corresponding MBUs probabilities of happening, draw MBUs events
The relation curve of probability and NBTI stress times；According to the MBUs probabilities of happening and the relation curve of NBTI stress times, foundation is examined
Consider the Multiple-bit upsets probability of happening model of NBTI effects, such as formula (2)
Wherein, plIt is the probability for occurring l bit flippings；pNBTI_lTo consider the probability that l bit flippings occur during NBTI effects；T is
NBTI stress times；θ is the incident angle of particle；A1、B1、C1、A2、B2、C2It is the manufacture with particle kind, energy and memory
The relevant constant of technique, is obtained by being fitted the MBUs probabilities of happening and the relation curve of NBTI stress times；E is that mathematics is normal
Number；
Step 4: the probability for making first time radiation event cause that i bit flippings occur on one word of memory is pi, second
The probability that radiation event causes that j bit flippings occur on a word is pj, according to assumed condition (3), (4) and formula (2), deposited
Reservoir failure probability Pf, such as formula (3)：
Wherein, pNBTI_iAnd pNBTI_jIt is that radiation event causes that i occur on a word when considering NBTI effects respectively
Upset and the probability of j bit flippings；L is ECC correction capabilities, represents the wrong digit of maximum that ECC can be corrected；N is memory position
Number；
Generally, for the memory that number of words is M, under Multiple-bit upsets effects, deposited after h radiation event
Reservoir failure probabilityFor：
Under unit upset effects, by h radiation event background storage failure probabilityFor：
By changing memory number of words M or event arrival rate λ, the Multiple-bit upsets event of memory is approx equivalent to list
Bit flipping event, such as formula (6)
Formula (4) and formula (5) are brought into formula (6), formula (7) can be obtained
Obtain M', such as formula (8)
Step 5: according to the anti-Multiple-bit upsets Reliability Evaluation Model (9) of memory under unused scrub techniques and formula (8)
Obtain being not used the anti-Multiple-bit upsets MTTF models (10) of memory or (11) of the consideration NBTI effects of scrub techniques
Wherein, For the anti-Multiple-bit upsets MTTF models of memory for the consideration NBTI effects that scrub techniques are not used；The anti-unit upset MTTF models of memory of consideration NBTI effects for scrub techniques are not used；
According to the anti-Multiple-bit upsets Reliability Evaluation Model (13) of memory under use scrub techniques, and formula (8) or public affairs
Formula (12) obtains the anti-Multiple-bit upsets MTTF models (14) of memory of the consideration NBTI effects using scrub techniques
To use the anti-Multiple-bit upsets MTTF models of memory of the consideration NBTI effects of scrub techniques；To use the anti-unit upset MTTF models of the memory of the consideration NBTI effects of scrub techniques.
The present invention solves the model that the anti-Multiple-bit upsets Reliability Evaluation Model design method of existing memory is designed
Assess the problem of accuracy rate is low.Compared to the anti-Multiple-bit upsets Reliability Evaluation Model of existing memory, what the present invention was designed deposits
The anti-Multiple-bit upsets Reliability Evaluation Model of reservoir is in M=8K, N=16, L=2, and during θ=0 °, accuracy rate highest improves 74%.
Brief description of the drawings
The design method stream of the anti-Multiple-bit upsets Reliability Evaluation Model of memory under the influence of Fig. 1 Negative Bias Temperature Instabilities
Cheng Tu；
Fig. 2 is single-particle inversion critical charge and the graph of a relation of NBTI stress times；
Fig. 3 is the graph of a relation of Multiple-bit upsets probability and NBTI stress times.
Embodiment
Embodiment one：Memory resists under the influence of illustrating present embodiment, Negative Bias Temperature Instability with reference to Fig. 1
The design method of Multiple-bit upsets Reliability Evaluation Model,
Based on it is assumed hereinafter that what condition was realized：
(1) soft error in memory meets Poisson distribution；
(2) probability for occurring soft error in memory cell is equally distributed；
(3) failure, which occurs, for memory at least needs radiation event twice；During using ECC reinforcement techniques, if a MBUs thing
Caused maximum wrong digit is L to part in memory, will use the ECC that capability for correcting is L；Only when on a word be more than L
When position is made a mistake, memory can just occur once to fail；
Radiation event twice on (4) words is the principal element of out of memory；Because ECC correction capability is with depositing
Maximum error number is identical on one word of reservoir, and the error number under high-energy radiation can substantially increase, the mistake that radiation event is produced twice
Number is commonly greater than L by mistake；
Comprise the following steps：
Step 1: influence of the analysis NBTI effects to critical charge, obtain the respective value of NBTI effects and critical charge with
And corresponding relation；By taking TSMC 65nm CMOS technologies SRAM as an example, HSPICE simulation results are counted, when obtaining with NBTI stress
Between growth, the critical charge change that single-particle inversion occurs for sram cell is as shown in Figure 2.
Step 2: building radiation environment analog platform, the equivalent sensitive body of the corresponding memory cell of different critical electric charge is set up,
For different dimension sensitive bodies, make 299MeV heavy ions20Ne is repeated respectively with 0 °, 45 °, 79 ° of incident storage arrays, each case
Carry out 100,000 emulation, statistics SBU event times EventSBUWith MBUs event times EventMBU, according to formula (1), obtain not
The Probability p of MBUs events occurs for the memory with critical chargeMBU；
Step 3: according to the memory of the respective value of NBTI effects and critical charge, corresponding relation and different critical electric charge
Occur the probability of MBUs events, obtain different NBTI stress times and distinguish the corresponding MBUs probabilities of happening, draw MBUs events
The relation curve of probability and NBTI stress times, 299MeV heavy ions20Ne incidence storage array occur the MBUs probabilities of happening with
NBTI stress time relation curves are as shown in Figure 3；According to the MBUs probabilities of happening and the relation curve of NBTI stress times, foundation is examined
Consider the Multiple-bit upsets probability of happening model of NBTI effects, such as formula (2)
Wherein, A1、B1、C1、A2、B2、C2It is the constant relevant with the manufacturing process of particle kind, energy and memory, it is right
In 299MeV heavy ions20Ne bombardment 65nm CMOS technologies SRAM, A1=14.729, B1=-13.729, C1=0.74, A2=
0.011,B2=1.2, C2=0.548；plIt is the probability for occurring l bit flippings；pNBTI_lTo consider l bit flippings occur during NBTI effects
Probability；T is NBTI stress times；θ is the incident angle of particle；E is math constant；
Step 4: the probability for making first time radiation event cause that i bit flippings occur on one word of memory is pi, second
The probability that radiation event causes that j bit flippings occur on a word is pj, according to assumed condition (3), (4) and formula (2), deposited
Reservoir failure probability Pf, such as formula (3)：
Wherein, pNBTI_iAnd pNBTI_jIt is that radiation event causes that i occur on a word when considering NBTI effects respectively
Upset and the probability of j bit flippings；L is ECC correction capabilities, represents the wrong digit of maximum that ECC can be corrected；N is memory position
Number；
Generally, for the memory that number of words is M, under Multiple-bit upsets effects, deposited after h radiation event
Reservoir failure probabilityFor：
Under unit upset effects, by h radiation event background storage failure probabilityFor：
By changing memory number of words M or event arrival rate λ, the Multiple-bit upsets event of memory is approx equivalent to list
Bit flipping event, such as formula (6)
Formula (4) and formula (5) are brought into formula (6), formula (7) can be obtained
Obtain M', such as formula (8)
Step 5: according to the anti-Multiple-bit upsets Reliability Evaluation Model (9) of memory under unused scrub techniques and formula (8)
Obtain being not used the anti-Multiple-bit upsets MTTF models (10) of memory or (11) of the consideration NBTI effects of scrub techniques
Wherein,
For the anti-Multiple-bit upsets MTTF moulds of memory for the consideration NBTI effects that scrub techniques are not used
Type；
The anti-unit upset MTTF moulds of memory of consideration NBTI effects for scrub techniques are not used
Type；
For 299MeV heavy ions20Ne bombards 65nm CMOS technology SRAM, and the consideration NBTI effects of scrub techniques are not used
The anti-Multiple-bit upsets MTTF models of memory be：
Made according to using the anti-Multiple-bit upsets Reliability Evaluation Model (13) of memory under scrub techniques and (8) or (12)
With the anti-Multiple-bit upsets MTTF models (14) of memory of the consideration NBTI effects of scrub techniques
To use the anti-Multiple-bit upsets MTTF models of memory of the consideration NBTI effects of scrub techniques；To use the anti-unit upset MTTF models of the memory of the consideration NBTI effects of scrub techniques.
For 299MeV heavy ions20Ne bombards 65nm CMOS technology SRAM, uses the consideration NBTI effects of scrub techniques
The anti-Multiple-bit upsets MTTF models of memory are：
Embodiment two：The effective boundary condition point of formula (10) (11) and formula (14) described in present embodiment
It is not：
Wherein, β is that radiation event produces the probability that upset digit is more than L twice；βnonscrubbingIt is that scrub techniques are not used
Under β, βscrubbingIt is to use the β under scrub techniques.
Other steps are identical with embodiment one.
Embodiment three：Memory described in present embodiment is the memory that below 65nm CMOS technologies are manufactured.
Other steps are identical with embodiment two.
Embodiment four：It is by Geant4 that radiation environment analog platform is built in step 2 described in present embodiment
What software was realized.
Other steps are identical with embodiment three.
Claims (4)
1. the design method of the anti-Multiple-bit upsets Reliability Evaluation Model of memory under the influence of Negative Bias Temperature Instability,
It is characterized in that：Comprise the following steps：
Step 1: influence of the analysis NBTI effects to critical charge, the respective value of NBTI effects and critical charge is obtained and right
It should be related to；
Step 2: building radiation environment analog platform, the equivalent sensitive body of the corresponding memory cell of different critical electric charge is set up, for
Different dimension sensitive bodies, make the different particles of different-energy with the incident storage array of different angles, each case repeat respectively into
Row emulation, statistics SBU event times EventSBUWith MBUs event times EventMBU, according to formula (1), obtain different critical electricity
The Probability p of MBUs events occurs for the memory of lotusMBU；
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With the relation curve of NBTI stress times；According to the MBUs probabilities of happening and the relation curve of NBTI stress times, set up and consider
The Multiple-bit upsets probability of happening model of NBTI effects, such as formula (2)
Wherein, plIt is the probability for occurring l bit flippings；pNBTI_lTo consider the probability that l bit flippings occur during NBTI effects；T is NBTI
Stress time；θ is the incident angle of particle；A1、B1、C1、A2、B2、C2It is the manufacturing process with particle kind, energy and memory
Relevant constant, is obtained by being fitted the MBUs probabilities of happening and the relation curve of NBTI stress times；E is math constant；
Step 4: the probability for making first time radiation event cause that i bit flippings occur on one word of memory is pi, second of radiation
The probability that event causes that j bit flippings occur on a word is pj, according to formula (2), obtain out of memory probability Pf, such as formula
(3)：
Wherein, pNBTI_iAnd pNBTI_jIt is that radiation event causes that i bit flippings occur on a word when considering NBTI effects respectively
With the probability of j bit flippings；L is ECC correction capabilities, represents the wrong digit of maximum that ECC can be corrected；N is memory digit；
For the memory that number of words is M, under Multiple-bit upsets effects, by h radiation event background storage failure probabilityFor：
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By changing memory number of words M or event arrival rate λ, turned over for unit the Multiple-bit upsets event of memory is approx equivalent
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Obtain M', such as formula (8)
Step 5: being obtained according to the anti-Multiple-bit upsets Reliability Evaluation Model (9) of memory under unused scrub techniques and formula (8)
The anti-Multiple-bit upsets MTTF models (10) of memory or (11) of the consideration NBTI effects of scrub techniques are not used
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<mo>-</mo>
<mo>-</mo>
<mo>-</mo>
<mrow>
<mo>(</mo>
<mn>9</mn>
<mo>)</mo>
</mrow>
</mrow>
<mrow>
<mtable>
<mtr>
<mtd>
<mrow>
<msub>
<mi>MTTF</mi>
<mrow>
<mi>N</mi>
<mi>B</mi>
<mi>T</mi>
<mi>I</mi>
</mrow>
</msub>
<msubsup>
<mo>|</mo>
<mrow>
<mi>M</mi>
<mi>B</mi>
<mi>U</mi>
</mrow>
<mrow>
<mi>n</mi>
<mi>o</mi>
<mi>n</mi>
<mi>s</mi>
<mi>c</mi>
<mi>r</mi>
<mi>u</mi>
<mi>b</mi>
<mi>b</mi>
<mi>i</mi>
<mi>n</mi>
<mi>g</mi>
</mrow>
</msubsup>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mo>&cong;</mo>
<msub>
<mi>MTTF</mi>
<mrow>
<mi>N</mi>
<mi>B</mi>
<mi>T</mi>
<mi>I</mi>
</mrow>
</msub>
<msubsup>
<mo>|</mo>
<mrow>
<mi>S</mi>
<mi>B</mi>
<mi>U</mi>
</mrow>
<mrow>
<mi>n</mi>
<mi>o</mi>
<mi>n</mi>
<mi>s</mi>
<mi>c</mi>
<mi>r</mi>
<mi>u</mi>
<mi>b</mi>
<mi>b</mi>
<mi>i</mi>
<mi>n</mi>
<mi>g</mi>
</mrow>
</msubsup>
<mo>=</mo>
<mfrac>
<mn>1</mn>
<msup>
<mi>&lambda;</mi>
<mo>&prime;</mo>
</msup>
</mfrac>
<mo>&CenterDot;</mo>
<msqrt>
<mfrac>
<mrow>
<mi>&pi;</mi>
<mo>&CenterDot;</mo>
<mi>M</mi>
</mrow>
<mn>2</mn>
</mfrac>
</msqrt>
</mrow>
</mtd>
</mtr>
</mtable>
<mo>-</mo>
<mo>-</mo>
<mo>-</mo>
<mrow>
<mo>(</mo>
<mn>11</mn>
<mo>)</mo>
</mrow>
</mrow>
Wherein, For the anti-Multiple-bit upsets MTTF models of memory for the consideration NBTI effects that scrub techniques are not used；The anti-unit upset MTTF models of memory of consideration NBTI effects for scrub techniques are not used；
According to the anti-Multiple-bit upsets Reliability Evaluation Model (13) of memory under use scrub techniques, and formula (8) or formula
(12) the anti-Multiple-bit upsets MTTF models (14) of memory of the consideration NBTI effects using scrub techniques are obtained
<mrow>
<mi>M</mi>
<mi>T</mi>
<mi>T</mi>
<mi>F</mi>
<msubsup>
<mo>|</mo>
<mrow>
<mi>M</mi>
<mi>B</mi>
<mi>U</mi>
</mrow>
<mrow>
<mi>s</mi>
<mi>c</mi>
<mi>r</mi>
<mi>u</mi>
<mi>b</mi>
<mi>b</mi>
<mi>i</mi>
<mi>n</mi>
<mi>g</mi>
</mrow>
</msubsup>
<mo>&cong;</mo>
<mi>M</mi>
<mi>T</mi>
<mi>T</mi>
<mi>F</mi>
<msubsup>
<mo>|</mo>
<mrow>
<mi>S</mi>
<mi>B</mi>
<mi>U</mi>
</mrow>
<mrow>
<mi>s</mi>
<mi>c</mi>
<mi>r</mi>
<mi>u</mi>
<mi>b</mi>
<mi>b</mi>
<mi>i</mi>
<mi>n</mi>
<mi>g</mi>
</mrow>
</msubsup>
<mo>=</mo>
<msub>
<mi>t</mi>
<mi>s</mi>
</msub>
<mo>&CenterDot;</mo>
<mfrac>
<mrow>
<mn>2</mn>
<mo>&CenterDot;</mo>
<msup>
<mi>M</mi>
<mo>&prime;</mo>
</msup>
</mrow>
<msup>
<mrow>
<mo>(</mo>
<mi>&lambda;</mi>
<mo>&CenterDot;</mo>
<msub>
<mi>t</mi>
<mi>s</mi>
</msub>
<mo>)</mo>
</mrow>
<mn>2</mn>
</msup>
</mfrac>
<mo>=</mo>
<msub>
<mi>t</mi>
<mi>s</mi>
</msub>
<mo>&CenterDot;</mo>
<mfrac>
<mrow>
<mn>2</mn>
<mo>&CenterDot;</mo>
<mi>M</mi>
</mrow>
<msup>
<mrow>
<mo>(</mo>
<msup>
<mi>&lambda;</mi>
<mo>&prime;</mo>
</msup>
<mo>&CenterDot;</mo>
<msub>
<mi>t</mi>
<mi>s</mi>
</msub>
<mo>)</mo>
</mrow>
<mn>2</mn>
</msup>
</mfrac>
<mo>-</mo>
<mo>-</mo>
<mo>-</mo>
<mrow>
<mo>(</mo>
<mn>13</mn>
<mo>)</mo>
</mrow>
</mrow>
2
To use the anti-Multiple-bit upsets MTTF models of memory of the consideration NBTI effects of scrub techniques；To use the anti-unit upset MTTF models of the memory of the consideration NBTI effects of scrub techniques.
2. the anti-Multiple-bit upsets reliability assessment mould of memory under the influence of Negative Bias Temperature Instability according to claim 1
The design method of type, it is characterised in that formula (10) (11) and the effective boundary condition of formula (14) are respectively：
<mrow>
<msub>
<mi>&beta;</mi>
<mrow>
<mi>n</mi>
<mi>o</mi>
<mi>n</mi>
<mi>s</mi>
<mi>c</mi>
<mi>r</mi>
<mi>u</mi>
<mi>b</mi>
<mi>b</mi>
<mi>i</mi>
<mi>n</mi>
<mi>g</mi>
</mrow>
</msub>
<mo>></mo>
<msqrt>
<mfrac>
<mn>2</mn>
<mrow>
<mi>&pi;</mi>
<mo>&CenterDot;</mo>
<mi>M</mi>
</mrow>
</mfrac>
</msqrt>
<mo>&CenterDot;</mo>
<mfrac>
<mrow>
<mn>2</mn>
<mo>&CenterDot;</mo>
<mi>N</mi>
</mrow>
<mrow>
<mi>L</mi>
<mo>&CenterDot;</mo>
<mrow>
<mo>(</mo>
<mi>N</mi>
<mo>-</mo>
<mi>L</mi>
<mo>)</mo>
</mrow>
<mo>&CenterDot;</mo>
<mrow>
<mo>(</mo>
<mi>L</mi>
<mo>+</mo>
<mn>1</mn>
<mo>)</mo>
</mrow>
</mrow>
</mfrac>
<mo>-</mo>
<mo>-</mo>
<mo>-</mo>
<mrow>
<mo>(</mo>
<mn>15</mn>
<mo>)</mo>
</mrow>
</mrow>
<mrow>
<msub>
<mi>&beta;</mi>
<mrow>
<mi>s</mi>
<mi>c</mi>
<mi>r</mi>
<mi>u</mi>
<mi>b</mi>
<mi>b</mi>
<mi>i</mi>
<mi>n</mi>
<mi>g</mi>
</mrow>
</msub>
<mo>></mo>
<mfrac>
<mrow>
<mi>&lambda;</mi>
<mo>&CenterDot;</mo>
<msub>
<mi>t</mi>
<mi>s</mi>
</msub>
</mrow>
<mrow>
<mn>3</mn>
<mo>&CenterDot;</mo>
<mi>M</mi>
</mrow>
</mfrac>
<mo>&CenterDot;</mo>
<mfrac>
<mrow>
<mn>2</mn>
<mo>&CenterDot;</mo>
<mi>N</mi>
</mrow>
<mrow>
<mi>L</mi>
<mo>&CenterDot;</mo>
<mrow>
<mo>(</mo>
<mi>N</mi>
<mo>-</mo>
<mi>L</mi>
<mo>)</mo>
</mrow>
<mo>&CenterDot;</mo>
<mrow>
<mo>(</mo>
<mi>L</mi>
<mo>+</mo>
<mn>1</mn>
<mo>)</mo>
</mrow>
</mrow>
</mfrac>
<mo>-</mo>
<mo>-</mo>
<mo>-</mo>
<mrow>
<mo>(</mo>
<mn>16</mn>
<mo>)</mo>
</mrow>
</mrow>
Wherein, β is that radiation event produces the probability that upset digit is more than L twice；βnonscrubbingIt is to be not used under scrub techniques
β, βscrubbingIt is to use the β under scrub techniques.
3. the anti-Multiple-bit upsets reliability of memory is commented under the influence of Negative Bias Temperature Instability according to claim 1 or 2
Estimate the design method of model, it is characterised in that described memory is the memory that below 65nm CMOS technologies are manufactured.
4. the anti-Multiple-bit upsets reliability assessment mould of memory under the influence of Negative Bias Temperature Instability according to claim 3
The design method of type, it is characterised in that radiation environment analog platform is built in step 2 and is realized by Geant4 softwares.
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