CN104601269A - Master and slave clock synchronization method and system - Google Patents
Master and slave clock synchronization method and system Download PDFInfo
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- CN104601269A CN104601269A CN201410852588.3A CN201410852588A CN104601269A CN 104601269 A CN104601269 A CN 104601269A CN 201410852588 A CN201410852588 A CN 201410852588A CN 104601269 A CN104601269 A CN 104601269A
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Abstract
The invention discloses a master and slave clock synchronization method and a master and slave clock synchronization system. The master and slave clock synchronization method includes that a slave clock receives a synchronization message and records a recorder reception moment T2; the slave clock obtains a moment T1-t1+t4 from the synchronization following message, wherein t1 is the moment that the synchronization message reaches a first protocol conversion device connected with a master clock, and t4 is the moment that the synchronization message leaves a second protocol conversion device connected with the slave clock; the slave clock sends a delay request message and records a sending moment T3; the slave clock obtains a moment T4+t1'-t4' from a received delay response message, wherein t1' is the moment that the delay request message reaches the second protocol conversion device, and t4' is the moment that the delay request message leaves the first protocol conversion device; the slave clock calculates a time deviation of the master clock and the slave clock according to the moments T2, T3, T1-t1+t4 and T4+t1'-t4'. The master and slave clock synchronization method and the master and slave clock synchronization system improve calculating accuracy of the time deviation of the master clock and the slave clock.
Description
Technical field
The present invention relates to communication technical field, particularly relate to a kind of master-salve clock synchronization method and system.
Background technology
Along with the construction of intelligent grid; protect in electric power system, the new business such as automatic service and line status real-time sensing device has higher requirement to time synchronized; but be configured in each transformer station, the clock synchronization system in power plant not yet becomes net, be difficult to the time high unity reached between each transformer station.
Based on current technical development and network presence, adopt accurate clock synchronization protocol (Precision TimeProtocol, referred to as PTP) technology is one of best solution via SDH (Synchronous Digital Hierarchy) (Synchronous Digital Hierarchy, referred to as SDH) network latency synchronizing signal.Wherein, PTP technology is the exact value T1 that can obtain Sync message delivery time from clock from Follow_Up message, measuring its moment receiving Sync message from clock is T2, the time sending Delay_Req message from clock is T3, can obtain from clock the precise time T4 that master clock receives Delay_Req message from Delay_Resp message.The prerequisite calculating the time deviation between master-salve clock is transmitted in both directions routing symmetry.
In actual environment, SDH network transmission link two-way approach is inconsistent, must introduce delay inequality, and original PTP algorithm is also not exclusively suitable for.And, PTP technical transmission be Ethernet message, SDH Internet Transmission be High Density Bipolar 3 (High Density Bipolar of Order 3 based on E1, referred to as HDB3 code), need during transmission through protocol conversion, but the transmission rate of two agreements differs greatly, certain time delay will inevitably be introduced, and different protocol conversion apparatus conversion time delays is inconsistent.Therefore, in SDH Internet Transmission PTP time synchronizing signal process, due to protocol conversion and the asymmetric time delay caused of bi-directional transmission link, have impact on the computational accuracy of time deviation between master-salve clock, and then affect the precision of transmission time synchronizing signal.
Summary of the invention
The invention provides a kind of master-salve clock synchronization method and system, adopt in the process of PTP technology via SDH network latency synchronizing signal at present at least to solve, there is protocol conversion time delay and the inconsistent time delay of bidirectional transmission path, the problem of influence time deviation computational accuracy.
According to an aspect of the present invention, provide a kind of master-salve clock synchronization method, comprising: receive master clock at the first moment T from clock
1the sync message sent, and record receives the second moment T of described sync message
2; Described receive that described master clock sends from clock synchronously follow message, and obtain delivery time T from described synchronously following message
1-t1+t4, wherein, described delivery time T
1-t1+t4 is that second protocol conversion equipment is to described first moment T
1in the moment obtained after adjusting, described second protocol conversion equipment is connected from clock with described; T1 is the moment that described sync message arrives the first protocol conversion apparatus be connected with described master clock; T4 is the moment that described sync message leaves described second protocol conversion equipment; Described from time clockwise described in master clock transmission lag request message, and record sends the 3rd moment T of described delay request message
3, wherein said master clock is at the 4th moment T
4receive described delay request message; The described delayed response message receiving the transmission of described master clock from clock, and the T time of reception is obtained from described delayed response message
4+ t1 '-t4 ', wherein, described time of reception T
4+ t1 '-t4 ' is that described second protocol conversion equipment is to described 4th moment T
4in the moment obtained after adjusting, t1 ' is the moment that described delay request message arrives described second protocol conversion equipment, and t4 ' is the moment that described delay request message leaves described first protocol conversion apparatus; Described from clock according to described second moment T
2, described 3rd moment T
3, described delivery time T
1-t1+t4 and described time of reception T
4+ t1 '-t4 ' calculates described master clock and described time deviation between clock, and from the time of clock according to described time deviation correction.
In one embodiment, described from clock according to master clock described in following formulae discovery and described time deviation offset:offset=(T between clock
2-T
1+ T
3-T
4+ t4 '-t1 '+t1-t4)/
2.
In one embodiment, master clock is being received at the first moment T from clock
1before the sync message sent, described method also comprises: described first protocol conversion apparatus receives described sync message, records the moment t1 that described sync message arrives described first protocol conversion apparatus, and exports described sync message by SDH network; Described second protocol conversion equipment receives described sync message, is sent to by described sync message described from clock, and records the moment t4 that described sync message leaves described second protocol conversion equipment.
In one embodiment, described to receive from clock that described master clock sends synchronously follow message before, described method also comprises: described first protocol conversion apparatus receives describedly synchronously follows message, synchronously follows described the first moment T carried in message
1be adjusted to T
1-t1, and synchronously follow message by described SDH network output is described; Described second protocol conversion equipment reception is described synchronously follows message, synchronously follows described the moment T carried in message
1-t1 is adjusted to T
1-t1+t4, and described message of synchronously following is sent to described from clock.
In one embodiment, described to receive the delayed response message that described master clock sends from clock before, described method also comprises: described second protocol conversion equipment receives described delay request message, record the moment t1 ' that described delay request message arrives described second protocol conversion equipment, and export described delay request message by SDH network; Described first protocol conversion apparatus receives described delay request message, and described delay request message is sent to described master clock, and records the moment t4 ' that described delay request message leaves described first protocol conversion apparatus; After described master clock receives described delay request message, export described delayed response message; Described first protocol conversion apparatus receives described delayed response message, by the 4th moment T carried in described delayed response message
4be adjusted to T
4+ t1 ', and export described delayed response message by described SDH network; Described second protocol conversion equipment receives described delayed response message, by the moment T carried in described delayed response message
4+ t1 ' is adjusted to T
4+ t1 '-t4 ', and described delayed response message is sent to described from clock.
According to another aspect of the present invention, provide a kind of master-salve clock synchronization system, comprising: master clock, the first protocol conversion apparatus, second protocol conversion equipment and from clock; By SDH Internet Transmission message between described first protocol conversion apparatus and described second protocol conversion equipment; Described master clock, for sending sync message to described from clock, synchronously follow message and delayed response message, and receive from the described delay request message from clock, wherein, described message of synchronously following carries the first moment T that described master clock sends described sync message
1, described delayed response message carries the 4th moment T that described master clock receives described delay request message
4; Described first protocol conversion apparatus, is connected with described master clock, and described first protocol conversion apparatus comprises: the first logging modle and the first adjusting module; Wherein, described first logging modle, arrives for recording and storing described sync message the moment t4 ' that the moment t1 of described first protocol conversion apparatus and described delay request message leave described first protocol conversion apparatus; Described first adjusting module, for synchronously following described the first moment T carried in message
1be adjusted to T
1-t1, and the 4th moment T will carried in described delayed response message
4be adjusted to T
4+ t1 '; Described second protocol conversion equipment, is connected from clock with described, and described second protocol conversion equipment comprises: the second logging modle and the second adjusting module; Wherein, described second logging modle, leaves for recording and storing described sync message the moment t1 ' that the moment t4 of described second protocol conversion equipment and described delay request message arrive described second protocol conversion equipment; Described second adjusting module, for by the described moment T synchronously following message and carry
1-t1 is adjusted to T
1-t1+t4, and by moment T that described delayed response message carries
4+ t1 ' is adjusted to T
4+ t1 '-t4 '; Describedly to comprise from clock: the first transceiver module and computing module; Wherein, described first transceiver module, for receiving described sync message, and record receives the second moment T of described sync message
2; Receive and describedly synchronously follow message, and synchronously follow from described the delivery time T that described master clock after obtaining adjustment message sends described sync message
1-t1+t4; Send described delay request message, and record sends the 3rd moment T of described delay request message
3; Receive described delayed response message, and the described master clock obtain adjustment from described delayed response message after receives the T time of reception of described delay request message
4+ t1 '-t4 '; Described computing module, for according to described second moment T
2, described 3rd moment T
3, described delivery time T
1-t1+t4 and described time of reception T
4+ t1 '-t4 ' calculates described master clock and described time deviation between clock, and from the time of clock according to described time deviation correction.
In one embodiment, described computing module is according to master clock described in following formulae discovery and described time deviation offset:offset=(T between clock
2-T
1+ T
3-T
4+ t4 '-t1 '+t1-t4)/2.
In one embodiment, described first protocol conversion apparatus also comprises: the second transceiver module, for receiving and forwarding described sync message, describedly synchronously follow message, described delay request message and described delayed response message.
In one embodiment, described second protocol conversion equipment also comprises: the 3rd transceiver module, for receiving and forwarding described sync message, describedly synchronously follow message, described delay request message and described delayed response message.
By master-salve clock synchronization method and system of the present invention, in the process of SDH network E1 channel transfer PTP time synchronizing signal, consider protocol conversion time delay and the inconsistent asymmetric time delay of bidirectional transmission path, coordinate the relation mechanism of protocol conversion apparatus and master-salve clock, improve the computational accuracy of time deviation between master-salve clock, and then according to the clock synchronous that this time deviation is carried out, also comparatively reliable, and implementation method is simple.
Accompanying drawing explanation
Accompanying drawing described herein is used to provide a further understanding of the present invention, and form a application's part, schematic description and description of the present invention, for explaining the present invention, does not form limitation of the invention.In the accompanying drawings:
Fig. 1 is the flow chart of the master-salve clock synchronization method of the embodiment of the present invention;
Fig. 2 is the transmission schematic diagram of the protocol massages of the embodiment of the present invention;
Fig. 3 is the structured flowchart of the master-salve clock synchronization system of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on embodiments of the invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to protection scope of the present invention.
Embodiments provide a kind of master-salve clock synchronization method, the protocol conversion time delay and the asymmetric delay problem of bi-directional transmission link introduced in SDH Internet Transmission PTP time synchronizing signal process can be solved, draw the precise time deviation between master-salve clock.
Master clock sends the Ethernet message based on PTP technology, (master clock side is positioned at through E1/Ethernet protocol conversion apparatus, be equivalent to the first following protocol conversion apparatus) convert thereof into E1 signal, in SDH network after transmission, (be positioned at from clock side through E1/Ethernet protocol conversion apparatus, be equivalent to following second protocol conversion equipment) convert E1 signal to Ethernet message, this Ethernet message is received by from clock; Adopt same principle to send PTP message to master clock from clock, realize the transmission of the sync message between master-salve clock.
Fig. 1 is the flow chart of the master-salve clock synchronization method of the embodiment of the present invention, and as shown in Figure 1, the method comprises the following steps:
Step S101, receives master clock at the first moment T from clock
1the sync message (Sync) sent, and record receives the second moment T of sync message
2.
Step S102, what send from clock reception master clock synchronously follows message (Follow_Up), and obtains delivery time T from synchronously following message
1-t1+t4, wherein, delivery time T
1-t1+t4 is that second protocol conversion equipment is to the first moment T
1in the moment obtained after adjusting, second protocol conversion equipment is connected with from clock; T1 is the moment that sync message arrives the first protocol conversion apparatus be connected with master clock; T4 is the moment that sync message leaves second protocol conversion equipment.
Step S103, from time clockwise master clock transmission lag request message (Delay_Req), and record the 3rd moment T of transmission lag request message
3, wherein master clock is at the 4th moment T
4receive delay request message.
Step S104, receives the delayed response message (Delay_Resp) of master clock transmission, and obtain the T time of reception from delayed response message from clock
4+ t1 '-t4 ', wherein, the time of reception T
4+ t1 '-t4 ' is that second protocol conversion equipment is to the 4th moment T
4in the moment obtained after adjusting, t1 ' postpones the moment that request message arrives second protocol conversion equipment, and t4 ' postpones the moment that request message leaves the first protocol conversion apparatus.
Step S105, from clock according to the second moment T
2, the 3rd moment T
3, delivery time T
1-t1+t4 and the time of reception T
4+ t1 '-t4 ' calculates master clock and from the time deviation between clock, and according to the time of time deviation correction from clock.
By above-mentioned master-salve clock synchronization method, in the process of SDH network E1 channel transfer PTP time synchronizing signal, consider protocol conversion time delay and the inconsistent asymmetric time delay of bidirectional transmission path, coordinate the relation mechanism of protocol conversion apparatus and master-salve clock, improve the computational accuracy of time deviation between master-salve clock, and then according to the clock synchronous that this time deviation is carried out, also comparatively reliable, and implementation method is simple.
In one embodiment, from clock according to following formulae discovery master clock and from the time deviation offset:offset=(T between clock
2-T
1+ T
3-T
4+ t4 '-t1 '+t1-t4)/2.Below the origin of this formula is described.
The time synchronizing signal of master clock arrives from the process of clock through E1/Ethernet protocol conversion apparatus and SDH network, and the transmission schematic diagram of each protocol massages as shown in Figure 2.
In fig. 2, suppose that Sync message sends from master clock and change time delay value into △ T through E1/Ethernet protocol conversion apparatus A
1, be delay1 through the path delay of time of SDH Internet Transmission, change time delay value into △ T through E1/Ethernet protocol conversion apparatus B
2.
Suppose that Delay_Req message changes time delay value into △ T by sending from clock through E1/Ethernet protocol conversion apparatus B
4, be delay2 through the path delay of time of SDH Internet Transmission, change time delay value into △ T through E1/Ethernet protocol conversion apparatus A
3.
The computational methods of existing PTP technology master-salve clock time deviation are under the prerequisite being based upon transmitted in both directions routing symmetry, namely can obtain from clock the moment T that master clock sends Sync message from Follow_Up message
1, measuring its moment receiving Sync message from clock is T
2, the moment sending Delay_Req message from clock is T
3, can obtain from clock the moment T that master clock receives Delay_Req message from Delay_Resp message
4.When transmitted in both directions routing symmetry, can show that the relational expression of time deviation offset between master-salve clock and transmission path delay value delay is as follows:
Adopt in the process of SDH Internet Transmission based on the time synchronizing signal of PTP technology, consider the inconsistency of E1/Ethernet protocol conversion time delay and SDH network bi-directional transmission path, formula (1) is revised as:
Arrange:
offset＝(T
2-T
1+T
3-T
4+delay2-delay1+ΔT
3+ΔT
4-ΔT
1-ΔT
2)/2 (3)
As shown in Figure 2, it is t1 that Sync message sends from master clock the moment arriving E1/Ethernet protocol conversion apparatus A, and it is t2 that protocol conversion terminates the moment be ready for sending to SDH network, then t2-t1 obtains changing time delay value into △ T
1.In like manner, the moment that Sync message arrives E1/Ethernet protocol conversion apparatus B is t3, and it is that t4, t4-t3 must change time delay value △ T that protocol conversion terminated to be ready for sending to the moment from clock
2, that is:
In like manner, Delay_Req message is as follows by sending the conversion time delay value arrived in master clock process from clock:
In formula (5), t1 ' is the moment that Delay_Req message arrives E1/Ethernet protocol conversion apparatus B, t2 ' is that protocol conversion terminates to be ready for sending the moment to SDH network, namely Delay_Req message leaves the moment of protocol conversion apparatus B, t3 ' is the moment that Delay_Req message arrives protocol conversion apparatus A, and t4 ' is the moment that Delay_Req message leaves protocol conversion apparatus A.
Formula (4) and formula (5) are substituted into formula (3):
offset＝(T
2-T
1+T
3-T
4+delay2-delay1+t4’-t3’+t2’-t1’-t2+t1-t4+t3)/2 (6)
As shown in Figure 2, the path delay of time that Sync message transmits in SDH network is worth delay1 and can be represented by t3-t2, and Delay_Req message is worth delay2 through the path delay of time of SDH Internet Transmission can be represented therefore have following formula to set up by t3 '-t2 ':
Formula (7) is substituted in formula (6), arranges:
offset＝(T
2-T
1+T
3-T
4+t4’-t1’+t1-t4)/2 (8)
Can be obtained by formula (8), the moment that the time deviation between master-salve clock and Sync message arrive moment of E1/Ethernet protocol conversion apparatus A, Sync message leaves E1/Ethernet protocol conversion apparatus B, Delay_Req message arrive E1/Ethernet protocol conversion apparatus B moment, that Delay_Req message leaves moment of E1/Ethernet protocol conversion apparatus A is relevant.Namely in message transmission procedure, specify Sync message and the Delay_Req message moment value at diverse location, just can calculate the time deviation between master-salve clock exactly, specifically need the moment value that clearly records as follows: the moment receiving Sync message from clock; Master clock sends the exact value in Sync message moment; The moment of Delay_Req message is sent from clock; Master clock receives the exact value in the moment of Delay_Req message; Sync message arrives the moment of the protocol conversion apparatus direct-connected with master clock; Sync message leaves and the moment from the direct-connected protocol conversion apparatus of clock; Delay_Req message leaves the moment of the protocol conversion apparatus direct-connected with master clock; Delay_Req message arrives and the moment from the direct-connected protocol conversion apparatus of clock.
Concrete, module can be increased in E1/Ethernet protocol conversion apparatus, for the moment that recorded message arrives and leaves, the moment of stored record, and according to the time information carried in the moment adjustment message of record.Such as, record and store the moment t1 of Sync message arrival protocol conversion apparatus A and leave the moment t4 of protocol conversion apparatus B, according to the moment T that the moment of record will carry in Follow_up message
1be adjusted to T
1-t1+t4; Record and store Delay_Req message and arrive the moment t1 ' of protocol conversion apparatus B and leave the moment t4 ' of protocol conversion apparatus A, according to the moment T that the moment of record will carry in Delay_Resp message
4be adjusted to T
4+ t1 '-t4 '.When specific implementation, can pass through relation mechanism, configuration and the direct-connected protocol conversion apparatus of master clock only record and store Sync message and arrive the moment t4 ' that the moment t1 of protocol conversion apparatus and Delay_Req message leave protocol conversion apparatus; Configuration leaves the moment t1 ' that the moment t4 of protocol conversion apparatus and Delay_Req message arrive protocol conversion apparatus with only recording from the protocol conversion apparatus that clock is direct-connected and store Sync message; Then respectively the time information entrained by corresponding message is adjusted.
The concrete record moment and the method for time adjustment as follows:
1) master clock is at the first moment T
1after sending sync message, the first protocol conversion apparatus receives sync message, and recording synchronism message arrives the moment t1 of the first protocol conversion apparatus, and exports sync message by SDH network;
Second protocol conversion equipment receives sync message, send to sync message from clock, and recording synchronism message leaves the moment t4 of second protocol conversion equipment;
After master clock sends and synchronously follows message, the first protocol conversion apparatus receives and synchronously follows message, will synchronously follow the first moment T carried in message
1be adjusted to T
1-t1, and synchronously follow message by the output of SDH network;
Second protocol conversion equipment receives and synchronously follows message, will synchronously follow the moment T carried in message
1-t1 is adjusted to T
1-t1+t4, and send to synchronously following message from clock.
2) from clock at the 3rd moment T
3after transmission lag request message, second protocol conversion equipment receive delay request message, record postpones the moment t1 ' that request message arrives second protocol conversion equipment, and by SDH network output delay request message;
First protocol conversion apparatus receive delay request message, sends to master clock by delay request message, and record postpones the moment t4 ' that request message leaves the first protocol conversion apparatus;
Master clock is at the 4th moment T
4receive after postponing request message, output delay response message;
First protocol conversion apparatus receive delay response message, by the 4th moment T carried in delayed response message
4be adjusted to T
4+ t1 ', and by SDH network output delay response message;
Second protocol conversion equipment receive delay response message, by the moment T carried in delayed response message
4+ t1 ' is adjusted to T
4+ t1 '-t4 ', and delayed response message is sent to from clock.
As can be seen here, when master-salve clock adopts PTP technology by SDH network latency synchronizing signal, E1/Ethernet protocol conversion apparatus introduces protocol conversion time delay and the inconsistent asymmetric time delay of SDH network bi-directional transmission path, (require that bidirectional transmission path is symmetrical at original PTP algorithm, namely two-way time delay is consistent) basis on, include conversion time delay and asymmetric time delay in computational process, draw master-salve clock time deviation comparatively accurately, and then according to the clock synchronous that this time deviation is carried out, also comparatively reliable.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of master-salve clock synchronization system, may be used for the method realized described by above-described embodiment, as described in the following examples.The principle of dealing with problems due to master-salve clock synchronization system is similar to master-salve clock synchronization method, and therefore the enforcement of master-salve clock synchronization system see the enforcement of master-salve clock synchronization method, can repeat part and repeat no more.Following used term " module " can realize the software of predetermined function and/or the combination of hardware.Although the system described by following examples preferably realizes with software, hardware, or the realization of the combination of software and hardware also may and conceived.
Fig. 3 is the structured flowchart of the master-salve clock synchronization system of the embodiment of the present invention, as shown in Figure 3, this system comprises: master clock 31, first protocol conversion apparatus 32, second protocol conversion equipment 33 and from clock 34, by SDH Internet Transmission message between the first protocol conversion apparatus 32 and second protocol conversion equipment 33.Below this structure is specifically described.
Master clock 31, for sending sync message from clock 34, synchronously following message and delayed response message, and receives the delay request message since clock 34, wherein, synchronously follows message and carries the first moment T that master clock sends sync message
1, delayed response message carries master clock and receives the 4th moment T postponing request message
4;
First protocol conversion apparatus 32, is connected with master clock 31, and the first protocol conversion apparatus 32 comprises: the first logging modle 321 and the first adjusting module 322;
Wherein, the first logging modle 321, arrives the moment t1 of the first protocol conversion apparatus for recording and storing sync message and postpones the moment t2 ' that request message leaves the first protocol conversion apparatus;
First adjusting module 322, is connected to the first logging modle 321, for will synchronously follow the first moment T carried in message
1be adjusted to T
1-t1, and the 4th moment T will carried in delayed response message
4be adjusted to T
4+ t1 ';
Second protocol conversion equipment 33, is connected with from clock 34, and second protocol conversion equipment 33 comprises: the second logging modle 331 and the second adjusting module 332;
Wherein, the second logging modle 331, leaves the moment t2 of second protocol conversion equipment for recording and storing sync message and postpones the moment t1 ' that request message arrives second protocol conversion equipment;
Second adjusting module 332, is connected to the second logging modle 331, for the moment T that will synchronously follow message and carry
1-t1 is adjusted to T
1-t1+t2, and the moment T that delayed response message is carried
4+ t1 ' is adjusted to T
4+ t1 '-t2 ';
Comprise from clock 34: the first transceiver module 341 and computing module 342;
Wherein, the first transceiver module 341, for receiving sync message, and record receives the second moment T of sync message
2; Receive and synchronously follow message, and obtain from synchronously following message the delivery time T that the master clock after adjustment sends sync message
1-t1+t2; Transmission lag request message, and the 3rd moment T recording transmission lag request message
3; Receive delay response message, and the master clock obtain adjustment from delayed response message after receives the T time of reception postponing request message
4+ t1 '-t2 ';
Computing module 342, is connected to the first transceiver module 341, for according to the second moment T
2, the 3rd moment T
3, delivery time T
1-t1+t2 and the time of reception T
4+ t1 '-t2 ' calculates master clock and from the time deviation between clock, and according to the time of time deviation correction from clock.
By above-mentioned master-salve clock synchronization system, in the process of SDH network E1 channel transfer PTP time synchronizing signal, consider protocol conversion time delay and the inconsistent asymmetric time delay of bidirectional transmission path, coordinate the relation mechanism of protocol conversion apparatus and master-salve clock, improve the computational accuracy of time deviation between master-salve clock, and then according to the clock synchronous that this time deviation is carried out, also comparatively reliable, and implementation method is simple.
Computing module 342 is according to following formulae discovery master clock and from the time deviation offset between clock:
offset＝(T
2-T
1+T
3-T
4+t4’-t1’+t1-t4)/2。
First protocol conversion apparatus 32 also comprises: the second transceiver module, for receiving and forwarding sync message, synchronously follow message, postpone request message and delayed response message.
Second protocol conversion equipment 33 also comprises: the 3rd transceiver module, for receiving and forwarding sync message, synchronously follow message, postpone request message and delayed response message.
In sum, when master-salve clock adopts PTP technology by SDH network latency synchronizing signal, E1/Ethernet protocol conversion apparatus introduces protocol conversion time delay and the inconsistent asymmetric time delay of SDH network bi-directional transmission path, coordinate the relation mechanism of protocol conversion apparatus and master-salve clock, (require that bidirectional transmission path is symmetrical at original PTP algorithm, namely two-way time delay is consistent) basis on, include conversion time delay and asymmetric time delay in computational process, draw master-salve clock time deviation comparatively accurately, improve the computational accuracy of time deviation between master-salve clock, and then according to the clock synchronous that this time deviation is carried out, also comparatively reliable.
Those skilled in the art should understand, embodiments of the invention can be provided as method, system or computer program.Therefore, the present invention can adopt the form of complete hardware embodiment, completely software implementation or the embodiment in conjunction with software and hardware aspect.And the present invention can adopt in one or more form wherein including the upper computer program implemented of computer-usable storage medium (including but not limited to magnetic disc store, CD-ROM, optical memory etc.) of computer usable program code.
The present invention describes with reference to according to the flow chart of the method for the embodiment of the present invention, system and computer program and/or block diagram.Should understand can by the combination of the flow process in each flow process in computer program instructions realization flow figure and/or block diagram and/or square frame and flow chart and/or block diagram and/or square frame.These computer program instructions can being provided to the processor of all-purpose computer, special-purpose computer, Embedded Processor or other programmable data processing device to produce a machine, making the instruction performed by the processor of computer or other programmable data processing device produce device for realizing the function of specifying in flow chart flow process or multiple flow process and/or block diagram square frame or multiple square frame.
These computer program instructions also can be stored in can in the computer-readable memory that works in a specific way of vectoring computer or other programmable data processing device, the instruction making to be stored in this computer-readable memory produces the manufacture comprising command device, and this command device realizes the function of specifying in flow chart flow process or multiple flow process and/or block diagram square frame or multiple square frame.
These computer program instructions also can be loaded in computer or other programmable data processing device, make on computer or other programmable devices, to perform sequence of operations step to produce computer implemented process, thus the instruction performed on computer or other programmable devices is provided for the step realizing the function of specifying in flow chart flow process or multiple flow process and/or block diagram square frame or multiple square frame.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; the protection range be not intended to limit the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. a master-salve clock synchronization method, is characterized in that, comprising:
Master clock is received at the first moment T from clock
1the sync message sent, and record receives the second moment T of described sync message
2;
Described receive that described master clock sends from clock synchronously follow message, and obtain delivery time T from described synchronously following message
1-t1+t4, wherein, described delivery time T
1-t1+t4 is that second protocol conversion equipment is to described first moment T
1in the moment obtained after adjusting, described second protocol conversion equipment is connected from clock with described; T1 is the moment that described sync message arrives the first protocol conversion apparatus be connected with described master clock; T4 is the moment that described sync message leaves described second protocol conversion equipment;
Described from time clockwise described in master clock transmission lag request message, and record sends the 3rd moment T of described delay request message
3, wherein said master clock is at the 4th moment T
4receive described delay request message;
The described delayed response message receiving the transmission of described master clock from clock, and the T time of reception is obtained from described delayed response message
4+ t1 '-t4 ', wherein, described time of reception T
4+ t1 '-t4 ' is that described second protocol conversion equipment is to described 4th moment T
4in the moment obtained after adjusting, t1 ' is the moment that described delay request message arrives described second protocol conversion equipment, and t4 ' is the moment that described delay request message leaves described first protocol conversion apparatus;
Described from clock according to described second moment T
2, described 3rd moment T
3, described delivery time T
1-t1+t4 and described time of reception T
4+ t1 '-t4 ' calculates described master clock and described time deviation between clock, and from the time of clock according to described time deviation correction.
2. method according to claim 1, is characterized in that, described from clock according to master clock described in following formulae discovery and described time deviation offset between clock:
offset＝(T
2-T
1+T
3-T
4+t4’-t1’+t1-t4)/2。
3. method according to claim 1, is characterized in that, is receiving master clock at the first moment T from clock
1before the sync message sent, described method also comprises:
Described first protocol conversion apparatus receives described sync message, records the moment t1 that described sync message arrives described first protocol conversion apparatus, and exports described sync message by SDH network;
Described second protocol conversion equipment receives described sync message, is sent to by described sync message described from clock, and records the moment t4 that described sync message leaves described second protocol conversion equipment.
4. method according to claim 3, is characterized in that, described to receive from clock that described master clock sends synchronously follow message before, described method also comprises:
Described first protocol conversion apparatus reception is described synchronously follows message, synchronously follows described the first moment T carried in message
1be adjusted to T
1-t1, and synchronously follow message by described SDH network output is described;
Described second protocol conversion equipment reception is described synchronously follows message, synchronously follows described the moment T carried in message
1-t1 is adjusted to T
1-t1+t4, and described message of synchronously following is sent to described from clock.
5. method according to claim 1, is characterized in that, described to receive the delayed response message that described master clock sends from clock before, described method also comprises:
Described second protocol conversion equipment receives described delay request message, records the moment t1 ' that described delay request message arrives described second protocol conversion equipment, and exports described delay request message by SDH network;
Described first protocol conversion apparatus receives described delay request message, and described delay request message is sent to described master clock, and records the moment t4 ' that described delay request message leaves described first protocol conversion apparatus;
After described master clock receives described delay request message, export described delayed response message;
Described first protocol conversion apparatus receives described delayed response message, by the 4th moment T carried in described delayed response message
4be adjusted to T
4+ t1 ', and export described delayed response message by described SDH network;
Described second protocol conversion equipment receives described delayed response message, by the moment T carried in described delayed response message
4+ t1 ' is adjusted to T
4+ t1 '-t4 ', and described delayed response message is sent to described from clock.
6. a master-salve clock synchronization system, is characterized in that, comprising: master clock, the first protocol conversion apparatus, second protocol conversion equipment and from clock; By SDH Internet Transmission message between described first protocol conversion apparatus and described second protocol conversion equipment;
Described master clock, for sending sync message to described from clock, synchronously follow message and delayed response message, and receive from the described delay request message from clock, wherein, described message of synchronously following carries the first moment T that described master clock sends described sync message
1, described delayed response message carries the 4th moment T that described master clock receives described delay request message
4;
Described first protocol conversion apparatus, is connected with described master clock, and described first protocol conversion apparatus comprises: the first logging modle and the first adjusting module;
Wherein, described first logging modle, arrives for recording and storing described sync message the moment t4 ' that the moment t1 of described first protocol conversion apparatus and described delay request message leave described first protocol conversion apparatus;
Described first adjusting module, for synchronously following described the first moment T carried in message
1be adjusted to T
1-t1, and the 4th moment T will carried in described delayed response message
4be adjusted to T
4+ t1 ';
Described second protocol conversion equipment, is connected from clock with described, and described second protocol conversion equipment comprises: the second logging modle and the second adjusting module;
Wherein, described second logging modle, leaves for recording and storing described sync message the moment t1 ' that the moment t4 of described second protocol conversion equipment and described delay request message arrive described second protocol conversion equipment;
Described second adjusting module, for by the described moment T synchronously following message and carry
1-t1 is adjusted to T
1-t1+t4, and by moment T that described delayed response message carries
4+ t1 ' is adjusted to T
4+ t1 '-t4 ';
Describedly to comprise from clock: the first transceiver module and computing module;
Wherein, described first transceiver module, for receiving described sync message, and record receives the second moment T of described sync message
2; Receive and describedly synchronously follow message, and synchronously follow from described the delivery time T that described master clock after obtaining adjustment message sends described sync message
1-t1+t4; Send described delay request message, and record sends the 3rd moment T of described delay request message
3; Receive described delayed response message, and the described master clock obtain adjustment from described delayed response message after receives the T time of reception of described delay request message
4+ t1 '-t4 ';
Described computing module, for according to described second moment T
2, described 3rd moment T
3, described delivery time T
1-t1+t4 and described time of reception T
4+ t1 '-t4 ' calculates described master clock and described time deviation between clock, and from the time of clock according to described time deviation correction.
7. system according to claim 6, is characterized in that, described computing module is according to master clock described in following formulae discovery and described time deviation offset between clock:
offset＝(T
2-T
1+T
3-T
4+t4’-t1’+t1-t4)/2。
8. system according to claim 6, it is characterized in that, described first protocol conversion apparatus also comprises: the second transceiver module, for receiving and forwarding described sync message, describedly synchronously follow message, described delay request message and described delayed response message.
9. system according to claim 6, it is characterized in that, described second protocol conversion equipment also comprises: the 3rd transceiver module, for receiving and forwarding described sync message, describedly synchronously follow message, described delay request message and described delayed response message.
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