CN104599619A - Grid line driving method, gate driving circuit and display device - Google Patents
Grid line driving method, gate driving circuit and display device Download PDFInfo
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- CN104599619A CN104599619A CN201310661892.5A CN201310661892A CN104599619A CN 104599619 A CN104599619 A CN 104599619A CN 201310661892 A CN201310661892 A CN 201310661892A CN 104599619 A CN104599619 A CN 104599619A
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Abstract
The invention discloses a grid line driving method, a gate driving circuit and a display device. The method comprises the following steps: grouping the grid line; orderly driving the grid line of odd number line in each grid line group for the first time; orderly driving the grid line of even number line in each grid line group for the second time; and the second time is later than the first time. The turning display effect can be achieved by adopting the method and the usage experience can be improved.
Description
Technical field
The present invention relates to display field, particularly relate to a kind of grid line driving method, gate driver circuit and display device.
Background technology
Display technique development is in recent years very fast, and panel display apparatus has complanation, quality is light, thickness is thin and the feature such as power saving.At present, panel display apparatus has plasma display panel (PDP, Plasma DisplayPanel), liquid crystal display (LCD, Liquid Crystal Display), Field Emission Display (FED, FieldEmission Display), Organic Light Emitting Diode (OELD, Organic Light-Emitting Diode) display device and projection display equipment etc.Wherein, LCD is with fastest developing speed, technology is the most ripe, application surface is the most extensive, but, the cost compare of this mode is high, thus slowly glass substrate is made by shift register the gate driver circuit that forms namely integrate driving circuit (Gate In Panel, GIP) gate driver circuit substitute.
At present, use GIP gate driver circuit to the method that LCD drives is: described GIP gate driver circuit controls to open storer corresponding to each pixel of one's own profession, and the source electrode corresponding by described each pixel exports, writes gray scale voltage in which memory.But, use this driving method to need along with clock order, open downwards successively from top line and write.Display effect multiple spot being brought to overturn to user like this, thus affect display effect.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of grid line driving method, gate driver circuit and display device, can realize the display effect of some upset, thus promotes the experience of user.
For solving the problems of the technologies described above, technical scheme of the present invention is achieved in that
The invention provides a kind of grid line driving method, described method comprises:
Grid line is divided into groups;
Within the very first time, odd-numbered line grid line in driving each grid line to divide into groups successively;
Within the second time, drive even number line grid line in described each grid line grouping successively; Wherein, described second time is later than the very first time.
Preferably, describedly grouping is carried out to grid line comprise: by the quantity of clock signal, described grid line is divided into groups.
Preferably, within the described very first time, the opening time interval of the capable grid line of adjacent odd is identical, and within described second time, the opening time interval of neighbouring even-numbered row grid line is identical.
The present invention also provides a kind of gate driver circuit, comprises bilateral driving circuit,
The first limit driving circuit in described bilateral driving circuit is connected with odd-numbered line grid line, within the very first time, and odd-numbered line grid line in driving each grid line to divide into groups successively;
Second Edge driving circuit in described bilateral driving circuit is connected with even number line grid line, within the second time, and even number line grid line in driving each grid line to divide into groups successively.
The present invention also provides a kind of display device, and described device comprises above-mentioned gate driver circuit.
By grid line driving method of the present invention, gate driver circuit and display device, grid line can be divided into multiple groups, then the gate driver circuit that in the grouping of each grid line, odd-line pixels is corresponding is first opened, open the gate driver circuit that in the grouping of each grid line, even rows is corresponding again, written information in each pixel of described even rows.Thus realize the row pixel of first opening same polarity in each row group pixels, then open the row pixel of another polarity in each row group pixels, so can be realized the display effect of some upset by multiple spot upset, thus promote the experience of user.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of grid line driving method of the present invention;
Fig. 2 is that grid of the present invention exports and source electrode exports schematic diagram;
Fig. 3 is sequential chart one of the present invention;
Fig. 4 is sequential chart two of the present invention;
Fig. 5 is the hardware composition structural representation of display device of the present invention.
Embodiment
Below in conjunction with drawings and the specific embodiments, the present invention is further described in more detail.
Embodiment one,
Grid line driving method provided by the invention, as shown in Figure 1, comprising:
Step 101: grid line is divided into groups.
Step 102: within the very first time, odd-numbered line grid line in driving each grid line to divide into groups successively.
Step 103: within the second time, drives even number line grid line in described each grid line grouping successively; Wherein, described second time is later than the very first time.
Preferably, row pixel that is adjacent, specified quantity is all comprised in each grouping.Wherein, described grid line grouping can be any a group in place LCD all row group pixels.
Wherein, the first driving voltage V1 and the second driving voltage V2 can be the same or different, as long as can ensure that the grid line of being expert at is opened.
It should be noted that, the very first time t1 moment drives the odd-numbered line grid line in the grouping of scanning grid line, and the second time t2 moment drove the even number line grid line in the grouping of scanning grid line.
As a kind of embodiment of embodiment of the present invention grid line driving method, trigger pip in this specific embodiment using STV signal as the GIP cell operation connected with corresponding grid line, the clock signal that displacement exports using CLK signal as control GIP unit, completes the control procedure of grid line On/Off by STV signal and CLK signal.
Preferably, described specified quantity is capable identical with the quantity of clock signal, such as, when system provides 8 clock signals, and specified quantity behavior 8 row; When system provides 4 clock signals, specified quantity behavior 4 row; When system provides 16 clock signals, specified quantity behavior 16 row.
Preferably, described gate driver circuit is GIP gate driver circuit.
Such as, grid as shown in Figure 2 exports and source electrode exports schematic diagram, and wherein, system provides 8 clock signals, and 8 often adjacent row pixels are divided into one group; Arranging the grid line driving circuit that in every group, odd-line pixels is corresponding is GIP1, GIP2, GIP3, GIP4, and the grid line driving circuit that often in group, even rows is corresponding is GIP5, GIP6, GIP7 and GIP8; Namely arrange GIP1, GIP2, GIP3, GIP4 and control the capable pixel of 1-3-5-7, GIP5, GIP6, GIP7 and GIP8 control the capable pixel of 2-4-6-8;
The GATE signal deciding that the On/Off of grid line is provided by the GIP unit be connected with this grid line, further, trigger pip can comprise STV1R, STV1L, STV2R, STV2L.Wherein, first trigger pip triggers the odd-numbered line grid line in grouping, is specially STV1L control GIP1, control the 1st row grid line by GIP1 to open, STV1R control GIP2 opens the 3rd row grid line, and STV2L control GIP3 opens the 5th row grid line, and STV2R control GIP4 opens the 7th row grid line; The first even number line grid line again triggered in current group of trigger pip, GIP5 control the 2nd row grid line is opened, GIP6 control the 4th row grid line is opened, GIP7 controls the 6th row grid line unlatching, GIP8 controls the unlatching of eighth row grid line, opens all row of whole display screen successively.
Fig. 3 is that above-mentioned Fig. 2 grid exports and source electrode exports sequential chart corresponding to schematic diagram, and wherein, 4 STV signals and 8 CLK signals control the output of the gate driver circuit of eight row pixels, visible, do not have overlapping part between neighboring gates signal.
It should be noted that, because very first time t1 and the second time t2 is separate, therefore, the opening time interval of the capable grid line of adjacent odd is likely not identical with the opening time interval of neighbouring even-numbered row grid line.Those skilled in the art can according to the design needs of display device, carry out difference further arrange odd-numbered line grid line and even number line grid line, thus overcome display device and show bad problem, such as: the problem that the band existed in display device display is bad.
Illustrate with the On/Off of the first grid line.The On/Off of the first grid line depends on GATE 1 signal with the first grid line, and GATE 1 signal is after trigger pip STV 1L triggers, and is controlled to generate by trigger pip STV 1L and clock signal clk 1L.In very first time t1, after STV 1L signal triggers, STV 1L signal and clock signal clk 1L generate GATE 1 signal, concrete: when GATE 1 signal is high level, and GIP 1 controls the first grid line and opens; When GATE 1 signal is low level, GIP 1 controls the first grid line and closes.
And for grid line driving method of the present invention, the signal controlling adjacent grid line On/Off is separated, such as: wherein the signal of corresponding On/Off first grid line is in very first time t1, and the signal of corresponding On/Off second grid line is in the second time t2.Its each grid line sequential as shown in Figure 3.
Further, the sequential chart of embodiment of the present invention grid line driving method also can be as shown in Figure 4.It should be noted that, the sequential chart difference shown in the sequential chart shown in Fig. 4 and Fig. 3 is: the working time of clock signal clk adds in the diagram.Concrete, grid line driving method sequential chart is as shown in Figure 4 that one is more preferably selected, can by increasing the length of clock signal, increased, like this, before the gray scale voltage that in pixel of being expert at, the source drive unit write of each pixel is corresponding the opening time of the gate driver circuit of often going, increase the precharge time that each pixel is corresponding, thus when source drive unit writes in each pixel, decrease its duration of charging, so can promote write efficiency.
At this, need to supplement a bit, in above-described embodiment grid line driving method analytic process, grid line driving method all make use of four trigger pip STV and completes driving process to grid line.In fact, utilize general knowledge known in this field, technician's adjustable grid line driving method, thus make the grid line driving method of the embodiment of the present invention utilize the trigger pip of other quantity to control, complete the driving process to grid line; Or the driving process of grid line is completed with other forms.
Embodiment two,
Gate driver circuit provided by the invention, comprising: bilateral driving circuit, and the first limit driving circuit in described bilateral driving circuit is connected with odd-numbered line grid line, within the very first time, and odd-numbered line grid line in driving each grid line to divide into groups successively;
Second Edge driving circuit in described bilateral driving circuit is connected with even number line grid line, within the second time, and even number line grid line in driving each grid line to divide into groups successively; Wherein, described second time is later than the very first time.
Described grid line grouping can be any one group in place LCD all row group pixels.
Described clock module may be used for exporting one or more clock signal, such as, can export 8 tunnel clock signals.
Preferably, being retrieved as of described grid line grouping: by row pixels all in an lcd divide into groups, wherein, in each grouping, all comprise row pixel that is adjacent, specified quantity.
Preferably, described specified quantity is capable identical with the quantity of clock signal, such as, when system provides 8 clock signals, and specified quantity behavior 8 row; When system provides 4 clock signals, specified quantity behavior 4 row; When system provides 16 clock signals, specified quantity behavior 16 row.
Preferably, described gate driver circuit is GIP gate driver circuit.
Such as, grid as shown in Figure 2 exports and source electrode exports schematic diagram, and wherein, described clock module exports 8 tunnel clock signals, and 8 often adjacent row pixels are divided into one group;
Arranging the gate driver circuit that in odd-numbered line grid electrode drive module, odd-line pixels is corresponding is GIP1, GIP2, GIP3, GIP4;
The gate driver circuit that in even number line grid electrode drive module, even rows is corresponding is GIP5, GIP6, GIP7 and GIP8; Namely arrange GIP1, GIP2, GIP3, GIP4 and control the capable pixel of 1-3-5-7, GIP5, GIP6, GIP7 and GIP8 control the capable pixel of 2-4-6-8.
Concrete, can be as shown in Figure 5, clock signal controls to open GIP1, GIP2, GIP3, GIP4, GIP5, GIP6, GIP7 and GIP8 respectively, therefore, successively by the unlatching of GIP1 control the 1st row, the unlatching of GIP2 control the 3rd row, the unlatching of GIP3 control the 5th row, the unlatching of GIP4 control the 7th row, the unlatching of GIP5 control the 2nd row, the unlatching of GIP6 control the 4th row, the unlatching of GIP7 control the 6th row, the unlatching of GIP8 control eighth row, circulate the whole display screen of unlatching all row successively.
Fig. 3 is that above-mentioned Fig. 2 grid exports and source electrode exports sequential chart corresponding to schematic diagram, and wherein, 4 STV signals and 8 CLK signals control the output of the gate driver circuit of eight row pixels, visible, do not have overlapping part between neighboring gates signal.
On the other hand, the embodiment of the present invention additionally provides a kind of display device, and this display device comprises the gate driver circuit in above-described embodiment.Described display device can be: liquid crystal panel, Electronic Paper, oled panel, LCD TV, liquid crystal display, digital album (digital photo frame), mobile phone, panel computer etc. have product or the parts of any Presentation Function.
The display device that the embodiment of the present invention provides, comprises above-mentioned gate driver circuit, and its image displaying quality is better and power loss is less.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; change can be expected easily or replace, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (5)
1. a grid line driving method, is characterized in that, described method comprises:
Grid line is divided into groups;
Within the very first time, odd-numbered line grid line in driving each grid line to divide into groups successively;
Within the second time, drive even number line grid line in described each grid line grouping successively; Wherein, described second time is later than the very first time.
2. method according to claim 1, is characterized in that, describedly carries out grouping to grid line and comprises: divide into groups to described grid line by the quantity of clock signal.
3. method according to claim 1, is characterized in that, within the described very first time, the opening time interval of the capable grid line of adjacent odd is identical, and within described second time, the opening time interval of neighbouring even-numbered row grid line is identical.
4. a gate driver circuit, is characterized in that, comprises bilateral driving circuit,
The first limit driving circuit in described bilateral driving circuit is connected with odd-numbered line grid line, within the very first time, and odd-numbered line grid line in driving each grid line to divide into groups successively;
Second Edge driving circuit in described bilateral driving circuit is connected with even number line grid line, within the second time, and even number line grid line in driving each grid line to divide into groups successively; Wherein, described second time is later than the very first time.
5. a display device, is characterized in that, described device comprises gate driver circuit as claimed in claim 4.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310661892.5A CN104599619A (en) | 2013-12-06 | 2013-12-06 | Grid line driving method, gate driving circuit and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310661892.5A CN104599619A (en) | 2013-12-06 | 2013-12-06 | Grid line driving method, gate driving circuit and display device |
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| CN104599619A true CN104599619A (en) | 2015-05-06 |
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| CN201310661892.5A Pending CN104599619A (en) | 2013-12-06 | 2013-12-06 | Grid line driving method, gate driving circuit and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018201582A1 (en) * | 2017-05-05 | 2018-11-08 | 惠科股份有限公司 | Display panel driving method, driving device and display device |
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| CN1983374B (en) * | 2005-12-16 | 2011-08-31 | 三星电子株式会社 | Display apparatus and method for driving the same |
| US20130010006A1 (en) * | 2011-07-04 | 2013-01-10 | Seiko Epson Corporation | Electro-optical device and electronic apparatus |
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Application publication date: 20150506 |