CN104575378A - Pixel circuit, display device and display driving method - Google Patents

Abstract

The invention discloses a pixel circuit, a display device and a display driving method. The pixel circuit comprises first-fifth transistors, a light emitting device and a first capacitor, wherein the first transistor is used for providing driving current for the light emitting device; the second-fifth transistors are used as switching tubes and used for responding to a scanning signal; the first capacitor is used for storing voltage information. The pixel circuit provided by the invention not only can compensate the drift of the threshold voltage of the driving transistor, but also can compensate the drift of the threshold voltage of the light emitting device OLED, thereby achieving more uniform light emitting. In addition, the pixel circuit provided by the invention not only can use the scanning signal of the row, but also can use the scanning signal of the former row to respectively drive all transistors, so that number of control wires is reduced, and complexity of an peripheral grid driving circuit is reduced.

Description

Image element circuit, display device and display drive method

Technical field

The present invention relates to display device field, be specifically related to image element circuit, display device and display drive method.

Background technology

Organic Light Emitting Diode (Organic Light-Emitting Diode, OLED) display is because having the advantages such as high brightness, high-luminous-efficiency, wide viewing angle and low-power consumption, extensively studied by people in recent years, and be applied to rapidly in the middle of display device of new generation.The type of drive of OLED display is divided into passive waked-up (PassiveMatrix OLED, PMOLED) and driven with active matrix (Active Matrix OLED, AMOLED) two kinds.Although passive waked-up is with low cost, owing to there is cross-talk phenomenon, therefore can not realize high-resolution display, and electric current needed for passive waked-up is large, shortens the serviceable life of OLED.By contrast, driven with active matrix mode arranges the different transistor of number on each pixel as current source, and avoid cross-talk phenomenon, required drive current is less, and power consumption is lower, the life-span of OLED is extended, can realize high-resolution display.

Traditional AMOLED pixel circuit is simple two Thin Film Transistor (TFT) (Thin FilmTransistor, TFT) structure, as shown in Figure 1, comprises transistor T1, transistor T2, electric capacity C1 and luminescent device OLED.Although this circuit structure is simple, the unevenness of the drift because driving transistors T1 and OLED threshold voltage produce and the panel that causes because TFT device adopts polycrystalline material the to make threshold voltage of TFT device everywhere can not be compensated.When there is drift in driving transistors T1 threshold voltage, OLED threshold voltage or value is everywhere inconsistent on panel, drive current I _dSwill change, and pixels different on panel is because of the difference of bias voltage, its drift situation is also different, will cause the unevenness of Display panel like this.

Therefore, with regard to current technology, in order to solve the threshold voltage V of TFT device _tHthe problem that drift brings, the technique that the image element circuit regardless of AMOLED adopts is polysilicon (poly-Si) technology, amorphous silicon (a-Si) technology or oxide semiconductor technology, and it all needs to provide V when forming image element circuit _tHcompensation mechanism.Developed the image element circuit of the mechanism of much affording redress at present, these circuit roughly can be divided into two classes: voltage driven type image element circuit and current drive-type image element circuit.Current drive-type image element circuit is when practical application, and due to data line existing parasitic capacitance effect, the foundation of data current needs the longer time, and this problem is more outstanding when small area analysis, has had a strong impact on the actuating speed of circuit.Voltage driven type image element circuit has charge/discharge rates faster relative to current drive-type image element circuit, can meet the needs of large area, high-resolution display.But voltage driven type image element circuit needs threshold voltage V _tHdrift and the degeneration of OLED compensate, just can reach the object of evenly display.

So current a lot of researchs are all the image element circuits compensated for TFT threshold voltage, circuit such as shown in Fig. 2, this image element circuit comprises a driving transistors T1, three switching transistors T2, T3 and T4, two electric capacity C1 and C2, and luminescent device OLED.Its driving process is divided into initialization, valve value compensation, programming and luminous four-stage.At initial phase, the voltage of the first power lead Vcomp becomes high level from low level, T2 and T4 pipe is opened, and A point is charged to the voltage V of VREF in advance _rEF, the voltage of power lead VDD becomes low level V simultaneously _dDL, by driving tube T1, B point current potential is pulled down to V _dDL; Extract the stage in threshold value, the first power lead Vcomp continues to maintain high level, and power lead VDD is by low level V _dDLbecome high level V _dDH, charged to B point by driving tube T1, until driving tube T1 ends, B point current potential remains V _rEF-V _tH, threshold voltage information is stored in electric capacity C1; In programming phases, the first power lead becomes low level from high level in advance, and sweep trace Scan [n] becomes high level, T2 and T4 pipe is closed, and power lead VDD becomes a certain appropriate level V simultaneously _dDL', ensure that programming phases OLED is not luminous, T3 pipe is opened, and data voltage is written to C point by T3 pipe, and is coupled to A point by electric capacity C1, and A point current potential is V _tH+ V _dATA; In glow phase, sweep trace Scan [n] becomes low level, and power lead VDD becomes high level, flows through the electric current of OLED

$\begin{array}{c}{I}_{\mathrm{DS}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}+V_{\mathrm{TH}}-V_{\mathrm{OLED}}-V_{\mathrm{TH}})}^2\\ =\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}-V_{\mathrm{OLED}})}^2\end{array}\·\·\·\left(1\right)$

Wherein V _tHrepresent the threshold voltage of driving transistors T1, V _oLEDrepresent the current potential of glow phase OLED anode, μ _n, C _ox, W, L be respectively the effective mobility of driving transistors T1, unit area gate capacitance, channel width and channel length.Can find out that the electric current flowing through OLED is not with the V of driving transistors by formula (1) _tHchange and change, and only with data voltage V _oLEDrelevant with the voltage drop on OLED.

In above-mentioned image element circuit, although flow through the electric current of OLED and the threshold voltage V of driving tube _tHirrelevant, but voltage drop V on OLED can be subject to _oLEDimpact, wherein V _oLEDrelevant with the threshold voltage of OLED, so above-mentioned image element circuit can not compensate the threshold voltage shift of OLED, in addition, in above-mentioned image element circuit, the voltage of power lead VDD is fluctuation, will be achieved in actual use and also there is difficulty.

Summary of the invention

According to a first aspect of the invention, a kind of image element circuit is provided, it is disposed in the sweep trace of the supply scan control signal of first direction arrangement with between the data line of the supplies data signals of second direction arrangement, comprising: the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor, the first electric capacity and luminescent device.

The control pole of the first transistor is coupled to the second current lead-through pole of transistor seconds, and the first current lead-through pole of the first transistor is coupled to the negative electrode of luminescent device, and the second current lead-through pole of the first transistor is coupled to the first current lead-through pole of the 5th transistor.

The control pole of transistor seconds is coupled to sweep trace, and the first current lead-through pole of transistor seconds is coupled to the first current lead-through pole of the 3rd supply voltage or the first transistor, and the second current lead-through pole of transistor seconds is coupled to the control pole of the first transistor.

The control pole of third transistor is coupled to sweep trace, and the first current lead-through pole of third transistor is coupled to the second current lead-through pole of the 4th transistor, and the second current lead-through pole of third transistor is coupled to data line;

The control pole of the 4th transistor is coupled to sweep trace, and the first current lead-through pole of the 4th transistor is coupled to the second current lead-through pole of the first transistor, and the second current lead-through pole of the 4th transistor is coupled to the first current lead-through pole of third transistor.

The control pole of the 5th transistor is coupled to sweep trace, and the first current lead-through pole of the 5th transistor is coupled to the second current lead-through pole of the first transistor, and the second current lead-through pole of the 5th transistor is coupled to second source voltage.

First capacitive coupling is between the control pole of the first transistor and the first current lead-through pole of third transistor.

First current lead-through pole of luminescent device is coupled to the first supply voltage, and the second current lead-through pole of luminescent device is coupled to the first current lead-through pole of the first transistor.

In a first embodiment, sweep trace comprises the first sweep trace, the second sweep trace and the second scan control line, the sweep trace of the previous row image element circuit that the image element circuit that the second sweep trace is the first sweep trace is expert at, the second scan control line is the revertive delay sweep trace of the second sweep trace.The control pole of third transistor is coupled to the first sweep trace; The control pole of transistor seconds and the control pole of the 4th transistor are coupled to the second sweep trace, and the control pole of the 5th transistor is coupled to the second scan control line; First current lead-through pole of transistor seconds is coupled to the first current lead-through pole of the first transistor, and the second scan control line is the revertive delay sweep trace of the second sweep trace.The first transistor, transistor seconds, third transistor, the 4th transistor and the 5th transistor are N-type pipe; First supply voltage is high level, and second source voltage is low level or ground wire, the first current lead-through very anode of luminescent device, the second current lead-through very negative electrode of luminescent device; Or the first transistor, transistor seconds, third transistor, the 4th transistor and the 5th transistor are P type pipe; First supply voltage is low level or ground wire, and second source voltage is high level, the first current lead-through very negative electrode of luminescent device, the second current lead-through very anode of luminescent device.

In the second embodiment, sweep trace comprises the first control line, the second control line, the 3rd control line and the 4th control line, the control pole of transistor seconds is coupled to the first control line, first current lead-through pole of transistor seconds is coupled to the 3rd supply voltage, the control pole of third transistor is coupled to the second control line, the control pole of the 4th transistor is coupled to the 3rd control line, and the control pole of the 5th transistor is coupled to the 4th control line.The first transistor, transistor seconds, third transistor, the 4th transistor and the 5th transistor are N-type pipe; First supply voltage is high level, and second source voltage is low level or ground wire, the first current lead-through very anode of luminescent device, the second current lead-through very negative electrode of luminescent device; Or the first transistor, transistor seconds, third transistor, the 4th transistor and the 5th transistor are P type pipe; First supply voltage is low level or ground wire, and second source voltage is high level, the first current lead-through very negative electrode of luminescent device, the second current lead-through very anode of luminescent device.3rd supply voltage is used for when circuit initializes to the first transistor low voltage (can be zero potential), thus prevents luminescent device from sending too bright light in the circuit initializes stage.

In other embodiments of the present invention, image element circuit also comprises the second electric capacity, and the second capacitive coupling, between the first current lead-through pole and the first supply voltage of third transistor, for keeping electric charge, lowers charge leakage.

According to a second aspect of the invention, provide a kind of display device, comprise display panel, gate driver circuit and data drive circuit, wherein, display panel comprises some above-mentioned image element circuits; Gate driver circuit is used for providing scan control signal by sweep trace to image element circuit; Data drive circuit is used for providing data-signal by data line to image element circuit.

According to a third aspect of the invention we, provide a kind of display drive method of image element circuit of the first embodiment above-mentioned, its step is as follows.

Third transistor controls in cut-off state by the first sweep trace, and transistor seconds and the 4th transistor control in conducting state by the second sweep trace, the 5th transistor by the second scan control line traffic control in conducting state; The first transistor becomes diode-connected, and image element circuit is initialised.

Third transistor controls in cut-off state by the first sweep trace, and transistor seconds and the 4th transistor control in conducting state by the second sweep trace, the 5th transistor by the second scan control line traffic control in cut-off state; The threshold voltage of the first transistor is stored to the first electric capacity.

Third transistor controls in conducting state by the first sweep trace, and transistor seconds and the 4th transistor control in cut-off state by the second sweep trace, the 5th transistor by the second scan control line traffic control in conducting state; The data propagated on the data line are written into the first electric capacity.

Third transistor controls in cut-off state by the first sweep trace, and transistor seconds and the 4th transistor control in cut-off state by the second sweep trace, the 5th transistor by the second scan control line traffic control in conducting state; Luminescent device is luminous.

According to a forth aspect of the invention, provide a kind of display drive method of image element circuit of above-mentioned the second embodiment, its step is as follows.

Transistor seconds controls in conducting state by the first control line, and third transistor controls in conducting state by the second control line, and the 4th transistor controls in cut-off state by the 3rd control line, and the 5th transistor controls in conducting state by the 4th control line; The first transistor becomes diode-connected, and image element circuit is initialised.

Transistor seconds controls in conducting state by the first control line, and third transistor controls in cut-off state by the second control line, and the 4th transistor controls in conducting state by the 3rd control line, and the 5th transistor controls in cut-off state by the 4th control line; The threshold voltage of the first transistor is stored to the first electric capacity.

Transistor seconds controls in cut-off state by the first control line, and third transistor controls in conducting state by the second control line, and the 4th transistor controls in cut-off state by the 3rd control line, and the 5th transistor controls in conducting state by the 4th control line; The data propagated on the data line are written into the first electric capacity.

Transistor seconds controls in cut-off state by the first control line, and third transistor controls in cut-off state by the second control line, and the 4th transistor controls in cut-off state by the 3rd control line, and the 5th transistor controls in conducting state by the 4th control line; Luminescent device is luminous.

The invention has the beneficial effects as follows: compared with the existing image element circuit that two electric capacity are set, decrease the quantity of electric capacity, simplify circuit.

In actual applications, when utilize sweep signal control image element circuit of the present invention carry out display driver time, image element circuit proposed by the invention not only can the drift of compensation for drive transistor threshold voltage, the drift of light-emitting component OLED threshold voltage can also be compensated, thus realize more uniform luminous.

Accompanying drawing explanation

Fig. 1 is the structural drawing of traditional uncompensated two TFT image element circuits;

Fig. 2 is traditional structural drawing having compensation 4T2C image element circuit;

Fig. 3 is the structural drawing of the display device of the embodiment of the present invention one;

Fig. 4 is the structural drawing of the image element circuit of the embodiment of the present invention one;

Fig. 5 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention one;

Fig. 6 is the structural drawing of the image element circuit of the embodiment of the present invention two;

Fig. 7 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention two;

Fig. 8 is the structural drawing of the image element circuit of the embodiment of the present invention three;

Fig. 9 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention three;

Figure 10 is the structural drawing of the image element circuit of the embodiment of the present invention four;

Figure 11 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention four.

Embodiment

First to used herein to some terms be described, first to the 5th transistor can be any type of transistor, such as field effect transistor (Field Effect Transistor, or bipolar transistor (Bipolar Junction Transistor, BJT) FET).

If select field effect transistor, then control the grid (G pole) of very field effect transistor; The drain electrode (D pole) of the first current lead-through very field effect transistor, the source electrode (S pole) of the second current lead-through very field effect transistor; Or the source electrode of the first current lead-through very field effect transistor, the drain electrode of the second current lead-through very field effect transistor.It will be understood by those of skill in the art that in concrete circuit design, in order to promote the realization of circuit function, neatly the source electrode of certain field effect transistor and drain electrode can be exchanged according to the actual conditions of circuit.

If select bipolar transistor, then control the base stage (B pole) of very triode, the emitter (E pole) of the first current lead-through very bipolar transistor, the collector (C pole) of the second current lead-through very bipolar transistor.It will be understood by those of skill in the art that in concrete circuit design, in order to promote the realization of circuit function, neatly the transmitting of certain triode and collector can be exchanged according to the actual conditions of circuit.

Transistor in display device is generally thin film transistor (TFT), and now, the control pole of transistor refers to the grid of thin film transistor (TFT), the drain electrode of the first current lead-through very thin film transistor (TFT), the source electrode of the second current lead-through electrode film transistor.Those skilled in the art is to be understood that, in concrete circuit design, in order to promote the realization of circuit function, neatly the source electrode of certain thin film transistor (TFT) and drain electrode can be exchanged according to the actual conditions of circuit, namely in the de-scription, time " the first electrode " and " the second electrode ", can be but be not limited to drain electrode and source electrode.

The OLED used in each embodiment of the present invention can be other light-emitting components.

In some embodiments, display device can be liquid crystal display, organic light emitting display and Electronic Paper display (E-paper) etc.

By reference to the accompanying drawings the present invention is described in further detail below by embodiment.

Embodiment one:

Be illustrated in figure 3 the display device structure schematic diagram with multiple image element circuit of the present embodiment, wherein, image element circuit can be but be not limited to some image element circuits proposed by the invention.Display device mainly comprises pel array 1, gate driver circuit 2, data drive circuit 3, controller 4.

Namely pel array 1 comprise controlled by gate driver circuit 2 sweep trace Scan [1], Scan [2] ..., Scan [N], the data line Data1 controlled by data drive circuit 3, Data2 ..., DataM, and be arranged in the image element circuit of cross section between sweep trace and data line, image element circuit is with the matrix-style arrangement of the capable M row of N, namely this pel array 1 is that N is capable, M row, and wherein N, M are positive integer.Usually, the same a line image element circuit in pel array is all connected on same sweep trace, and the same row image element circuit in pel array 1 is then connected on same data line.

Gate driver circuit 2 is for providing sweep signal and control signal by sweep trace to image element circuit.Data drive circuit 3 is for providing half-tone information by data line to image element circuit, by half-tone information by data line transfer to corresponding pixel cell to realize gradation of image, in certain embodiments, data line also can provide initialization level and datum to pixel.Controller 4 is for data drive circuit 3 and gate driver circuit 2 provide sequential control, and provides signal to export for the global lines in display device.

Fig. 4 is the image element circuit structure figure of the present embodiment, mainly comprises: an OLED, the first electric capacity C1, a driving transistors T1, four switching transistors T2, T3, T4 and T5.

Transistor T1, T2, T3, T4 and T5 in pixel are N-type TFT, and image element circuit also can use and complementary comprise P-type TFT to drive, and now image element circuit needs to make suitably to change and connects with the circuit meeting P-type TFT.Transistor T1, T2, T3, T4 and T5 can by adopting amorphous silicon, receive/microcrystal silicon, polysilicon, organic semiconductor, metal oxide semiconductor techniques (such as IGZO-TFT), N-type semiconductor, P-type semiconductor or compensated semiconductor technology and prepare.Multiple image element circuit just can form a matrix for driving OLED display screen.

In addition this image element circuit also comprises two sweep trace Scan [n] and Scan [n-1], a data line Data, a scan control line Scan_b [n-1], a power lead VDD.Sweep trace Scan [n] controls the ablation process of data voltage to the image element circuit of n-th line, the revertive delay sweep trace (as shown in the timing diagram of fig. 5) that Scan_b [n] is Scan [n], by that analogy.

Annexation between device is: first electrode coupling of driving transistors T1 is to the negative electrode of light-emitting component OLED, and the second electrode coupling is to first electrode of switching transistor T5, and grid is coupled to second electrode of switching transistor T2; First electrode coupling of switching transistor T2 is to the negative electrode of light-emitting component OLED, and the second electrode coupling is to the grid of driving transistors T1, and grid is coupled to sweep trace Scan [n-1]; First electrode coupling of switching transistor T3 is to second electrode of switching transistor T4, and the second electrode coupling is to data line Data, and grid is coupled to sweep trace Scan [n]; First electrode coupling of switching transistor T4 is to second electrode of driving transistors T1, and the second electrode coupling is to first electrode of switching transistor T3, and grid is coupled to sweep trace Scan [n-1]; First electrode coupling of switching transistor T5 is to second electrode of driving transistors T1, and the second electrode coupling is to ground wire (i.e. VSS), and grid is coupled to scan control line Scan_b [n-1]; First electric capacity C1 is coupling between the grid of driving transistors T1 and first electrode of switching transistor T3; The anode of OLED is coupled to power lead VDD, and negative electrode is coupled to first electrode of driving transistors T1.For ease of describing, if second electrode of the grid of transistor T1, T2 and the first electric capacity C1 are coupled in A point, the negative electrode of first electrode of transistor T1, first electrode of T2 and light-emitting component OLED is coupled in B point, first electrode of transistor T3, second electrode of T4 and electric capacity C1 are coupled in C point, and first electrode coupling of second electrode of switching transistor T1, first electrode of T4 and T5 is in D point.The sweep trace of the previous row that Scan [n-1] is expert at for image element circuit, the sequential relationship of Scan [n-1] and Scan [n] as shown in Figure 5, accordingly, Scan_b [n-1] the image element circuit revertive delay sweep trace corresponding with sweep trace Scan [n-1] of previous row of being expert at.

Fig. 5 is the signal timing diagram of embodiment one image element circuit, wherein Scan [n] and Scan [n-1] is respectively the sweep trace of n-th line and the (n-1)th row image element circuit, and Scan_b [n] and Scan_b [n-1] is respectively the scan control line of the (n+1)th row and n-th line pixel.A kind of display driver process of image element circuit shown in Fig. 4 is specifically described, i.e. the display drive method of the embodiment of the present invention one below in conjunction with Fig. 5.

As shown in Figure 5, the time of a whole frame is divided into initialization, threshold value extraction, valve value compensation (namely programming) and luminous four-stage.

At initial phase: sweep trace Scan [n] is low level, switching transistor T3 is cut-off state, sweep trace Scan [n-1] and scan control line Scan_b [n-1] is high level, switching transistor T2, T4 and T5 are conducting state, A, B 2 are communicated with by switching transistor T2, driving transistors T1 connects into diode form by switching transistor T2, and A, B 2 are charged to V in advance _dD-V _oLED, i.e. V _a=V _b=V _dD-V _oLED, wherein, V _dDfor the value of power lead, V _oLEDfor the pressure drop at light-emitting component OLED two ends, C, D 2 are communicated with by switching transistor T4, and are connected with ground wire by switching transistor T5, and the current potential that C, D are 2 is 0.

Extract stage: sweep trace Scan [n] in threshold value to continue to maintain low level, switching transistor T3 is cut-off state, scan control line Scan_b [n-1] becomes low level, switching transistor T5 is cut-off state, sweep trace Scan [n-1] continues to maintain high level, switching transistor T2 and T4 is conducting state, and power lead charges, until D, C 2 current potentials are V to D, C point _dD-V _oLED-V _tH, driving transistors T1 ends, and D, C 2 current potentials remain V _dD-V _oLED-V _tH, i.e. V _c=V _d=V _dD-V _oLED-V _tH, wherein V _tHfor the threshold voltage of driving transistors T1, threshold voltage is stored in the first electric capacity C1.

In programming phases: sweep trace Scan [n-1] becomes low level, switching transistor T2 and T4 is cut-off state, scan control line Scan_b [n-1] becomes high level, switching transistor T5 is conducting state, sweep trace Scan [n] becomes high level, switching transistor T3 is conducting state, and data line voltage is written to C point by switching transistor T3, and the current potential in node C is by V _dD-V _oLED-V _tHbecome V _dATAprocess in can be coupled to node A by the first electric capacity C1, thus make A point current potential become V _dATA+ V _tH.

In glow phase: sweep trace Scan [n-1] continues to maintain low level, switching transistor T2 and T4 is cut-off state, scan control line Scan_b [n-1] continues to maintain high level, switching transistor T5 is conducting state, sweep trace Scan [n] becomes low level, switching transistor T3 is cut-off state, and D point current potential is 0, and the electric current flowing through light-emitting component OLED is:

$\begin{array}{c}{I}_{\mathrm{DS}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}^2=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}+V_{\mathrm{TH}}-V_{\mathrm{TH}})}^2\\ =\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{\left(V_{\mathrm{DATA}}\right)}^2\end{array}\·\·\·(1-1)$

Wherein, μ _n, C _ox, W, L be respectively the effective mobility of driving transistors T1, unit area gate capacitance, channel width and channel length, V _gSfor the grid voltage of T1.As can be seen from (1-1), the threshold voltage finally flowing through the electric current of OLED and the threshold voltage of driving transistors T1 and OLED itself is all irrelevant, thus the image element circuit in the present embodiment can well compensate the unevenness of display.

Image element circuit in the present embodiment not only can the drift of compensation for drive transistor threshold voltage, the drift of OLED threshold voltage can also be compensated, in addition, the image element circuit of the present embodiment also uses sweep trace and the control line of lastrow, effectively can reduce the complexity of peripheral gates driving circuit, thus reduce costs.

Embodiment two:

Fig. 6 is the structural drawing originally executing routine image element circuit, mainly comprises: an OLED, the first electric capacity C1 and the second electric capacity C2, a driving transistors T1, four switching transistors T2, T3, T4 and T5.

Transistor T1, T2, T3, T4 and T5 in image element circuit are P-type TFT, and image element circuit also can use and complementary comprise N-type TFT to drive, and now image element circuit needs to make suitably to change and connects with the circuit meeting N-type TFT.Transistor T1, T2, T3, T4 and T5 can by adopting amorphous silicon, receive/microcrystal silicon, polysilicon, organic semiconductor, metal oxide semiconductor techniques (such as IGZO-TFT), N-type semiconductor, P-type semiconductor or compensated semiconductor technology and prepare.Multiple image element circuit just can form a matrix for driving OLED display screen.

In addition this image element circuit also comprises two sweep trace Scan [n] and Scan [n-1], a data line Data, a scan control line Scan_b [n-1], a power lead VDD.Sweep trace Scan [n] controls the ablation process of data voltage to the image element circuit of n-th line, the revertive delay sweep trace (as shown by the timing diagrams of figure 7) that Scan_b [n] is Scan [n], by that analogy.

Annexation between device is: first electrode coupling of driving transistors T1 is to second electrode of switching transistor T5, and the second electrode coupling is to the anode of light-emitting component OLED, and grid is coupled to first electrode of switching transistor T2; First electrode coupling of switching transistor T2 is to the grid of driving transistors T1, and the second electrode coupling is to the anode of light-emitting component OLED, and grid is coupled to sweep trace Scan [n-1]; First electrode coupling of switching transistor T3 is to second electrode of switching transistor T4, and the second electrode coupling is to data line, and grid is coupled to sweep trace Scan [n]; First electrode coupling of switching transistor T4 is to first electrode of driving transistors T1, and the second electrode coupling is to first electrode of switching transistor T3, and grid is coupled to sweep trace Scan [n-1]; First electrode coupling of switching transistor T5 is to power lead VDD, and the second electrode coupling is to first electrode of driving transistors T1, and grid is coupled to scan control line Scan_b [n-1]; First electric capacity C1 is coupling between the grid of driving transistors T1 and first electrode of switching transistor T3; Second electric capacity C2 is coupling between first electrode of switching transistor T3 and ground wire (i.e. VSS); The anode of OLED is coupled to second electrode of driving transistors T1, and negative electrode is coupled to ground wire.For ease of describing, if first electrode of the grid of transistor T1, T2 and the first electric capacity C1 are coupled in A point, the anode of second electrode of transistor T1, second electrode of T2 and light-emitting component OLED is coupled to B point, first electrode of transistor T3, second electrode of T4 and capacity cell C1, C2 are coupled to C point, and second electrode coupling of first electrode of switching transistor T1, first electrode of T4 and T5 is to D point.

Fig. 7 is the signal timing diagram of embodiment one image element circuit, wherein Scan [n] and Scan [n-1] is respectively the sweep trace of n-th line and the (n-1)th row pixel, and Scan_b [n] and Scan_b [n-1] is respectively the scan control line of the (n+1)th row and n-th line pixel.A kind of display driver process of image element circuit shown in Fig. 6 is specifically described, i.e. the display drive method of the embodiment of the present invention two below in conjunction with Fig. 7.

As shown in Figure 7, the time of a whole frame is divided into initialization, threshold value extraction, valve value compensation (namely programming) and luminous four-stage.

At initial phase: sweep trace Scan [n] is high level, switching transistor T3 is cut-off state, sweep trace Scan [n-1] and scan control line Scan_b [n-1] is low level, switching transistor T2, T4 and T5 are conducting state, A, B 2 are communicated with by switching transistor T2, driving transistors T1 connects into diode form by switching transistor T2, and A, B 2 are charged to V in advance _oLED, wherein V _oLEDfor light-emitting component OLED anode potential, C, D 2 are communicated with by switching transistor T4, and are connected with power lead VDD by switching transistor T5, and C, D 2 are charged to V in advance _dD, V _dDfor the magnitude of voltage of power lead.

Extract stage: sweep trace Scan [n] in threshold value to continue to maintain high level, switching transistor T3 is cut-off state, scan control line Scan_b [n-1] becomes high level, switching transistor T5 is cut-off state, sweep trace Scan [n-1] continues to maintain low level, switching transistor T2 and T4 is conducting state, C, D 2 electric discharge, until D, C 2 current potentials are V _oLED-V _tH, driving transistors T1 ends, and D, C 2 current potentials remain V _oLED-V _tH, i.e. V _c=V _d=V _oLED-V _tH, wherein V _tHfor the threshold voltage of driving transistors T1, because T1 is P-type crystal pipe, so V _tHfor negative value, V _tHbe stored in the first electric capacity C1.

In programming phases: sweep trace Scan [n-1] becomes high level, switching transistor T2 and T4 is cut-off state, scan control line Scan_b [n-1] step-down level, switching transistor T5 is conducting state, sweep trace Scan [n] becomes low level, switching transistor T3 is conducting state, and data line voltage is written to C point by switching transistor T3, in node C current potential by V _oLED-V _tHbecome V _dATAprocess in can be coupled to node A by the first electric capacity C1, thus make A point current potential become V _dATA+ V _tH.

In glow phase: sweep trace Scan [n-1] continues to maintain high level, switching transistor T2 and T4 is cut-off state, scan control line Scan_b [n-1] continues to maintain low level, switching transistor T5 is conducting state, sweep trace Scan [n] becomes high level, switching transistor T3 is cut-off state, and D point current potential is V _dD, the electric current flowing through light-emitting component OLED is:

$\begin{array}{c}{I}_{\mathrm{DS}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}^2=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}+V_{\mathrm{TH}}-V_{\mathrm{DD}}-V_{\mathrm{TH}})}^2\\ =\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}-V_{\mathrm{DD}})}^2\end{array}\·\·\·(2-1)$

Wherein, μ _n, C _ox, W, L be respectively the effective mobility of driving transistors T1, unit area gate capacitance, channel width and channel length, V _gSfor the grid voltage of T1.As can be seen from (2-1), the threshold voltage finally flowing through the electric current of OLED and the threshold voltage of driving transistors T1 and OLED itself is all irrelevant, thus the image element circuit in the present embodiment can well compensate the unevenness of display.

In the process of display driver, the second electric capacity C2 can keep electric charge, lowers charge leakage.

Image element circuit in the present embodiment not only can the drift of compensation for drive transistor threshold voltage, the drift of OLED threshold voltage can also be compensated, in addition, the image element circuit of the present embodiment also uses sweep trace and the control line of lastrow, effectively can reduce the complexity of peripheral gates driving circuit, thus reduce costs.

Embodiment three:

Fig. 8 is the structural drawing of the image element circuit of the present embodiment, mainly comprises: an OLED, the first electric capacity C1 and the second electric capacity C2, a driving transistors T1, four switching transistors T2, T3, T4 and T5.

Transistor T1, T2, T3, T4 and T5 in pixel are N-type TFT, and image element circuit also can use the complementary technology comprising P-type TFT to drive, and now image element circuit needs to make suitably change to meet the circuit connection of P-type TFT.Transistor T1, T2, T3, T4 and T5 can by adopting amorphous silicon, receive/microcrystal silicon, polysilicon, organic semiconductor, metal oxide semiconductor techniques (such as IGZO-TFT), N-type semiconductor, P-type semiconductor or compensated semiconductor technology and prepare.Multiple image element circuit just can form a matrix for driving OLED display screen.

In addition this image element circuit also comprises four control lines Sel1, Sel2, Sel3 and Sel4, and for luminous type of drive of lining by line scan, these four control lines are row control line, a data line Data, a power lead VDD, a Control of Voltage line VREF.

Annexation between device is: first electrode coupling of driving transistors T1 is to the negative electrode of light-emitting component OLED, and the second electrode coupling is to first electrode of switching transistor T5, and grid is coupled to second electrode of switching transistor T2; First electrode coupling of switching transistor T2 is to Control of Voltage line VREF, and the second electrode coupling is to the grid of driving transistors T1, and grid is coupled to control line Sel1; First electrode coupling of switching transistor T3 is to second electrode of switching transistor T4, and the second electrode coupling is to data line Data, and grid is coupled to control line Sel2; First electrode coupling of switching transistor T4 is to second electrode of driving transistors T1, and the second electrode coupling is to first electrode of switching transistor T3, and grid is coupled to control line Sel3; First electrode coupling of switching transistor T5 is to second electrode of driving transistors T1, and the second electrode coupling is to ground wire VSS, and grid is coupled to control line Sel4; First electric capacity C1 is coupling between the grid of driving transistors T1 and first electrode of switching transistor T3; Second electric capacity C2 is coupling between power lead VDD and first electrode of switching transistor T3; The anode of OLED is coupled to power lead VDD, and negative electrode is coupled to first electrode of driving transistors T1.The grid of transistor T1, second electrode of T2 and the first electric capacity C1 are coupled to A point, first electrode of transistor T3, second electrode of T4 and the first electric capacity C1, the second electric capacity C2 are coupled to C point, and first electrode coupling of second electrode of switching transistor T1, first electrode of T4 and T5 is to D point.

Fig. 9 is the signal timing diagram of the image element circuit of the present embodiment, and wherein Sel1, Sel2, Sel3, Sel4 are four row control lines, control the image element circuit of one's own profession.A kind of display driver process of image element circuit shown in Fig. 8 is specifically described, i.e. the display drive method of the embodiment of the present invention three below in conjunction with Fig. 9.

As shown in Figure 9, the time of a whole frame is divided into initialization, threshold value extraction, valve value compensation (namely programming) and luminous four-stage.

At initial phase: control line Sel1, Sel2 and Sel4 are high level, switching transistor T2, T3 and T5 are conducting state, control line Sel3 is low level, switching transistor T4 is cut-off state, data line writes a negative voltage by switching transistor T3 to node C, node D discharges into zero potential through T5, VREF is zero potential, Control of Voltage line VREF writes a zero potential (write a zero potential by Control of Voltage line VREF to node A, can prevent luminescent device from sending too bright light at this moment) by switching transistor T2 to node A.

The stage is extracted: control line Sel1 continues to maintain high level, and switching transistor T2 is conducting state, and node A current potential is maintained V in threshold value _rEF, V _rEFbe the voltage of Control of Voltage line VREF, control line Sel2 becomes low level, switching transistor T3 is cut-off state, node C current potential remains negative voltage by the second electric capacity C2, control line Sel3 becomes high level, Sel4 becomes low level, switching transistor T5 is cut-off state, T4 is conducting state, node C and node D electric charge is made to share (charge sharing), i.e. C, D two node is communicated with by switching transistor T4, two node potentials are consistent (as long as to the negative voltage that the write of C point is enough during initialization, after then T4 becomes conducting state, C point and D point can be all negative voltages, and the V of T1 _gSthe threshold voltage of T1 can be bigger than, so T1 is in conducting state).Meanwhile, power lead VDD by driving transistors T1 to C, D 2 charging, until C, D two node be charged to V _rEF-V _tHtime driving transistors T1 cut-off, threshold voltage is stored in the first electric capacity C1.

In programming phases: control line Sel1 and Sel3 becomes low level, switching transistor T2 and T4 is cut-off state, and node A current potential is V _rEF, node C, D 2 current potentials are V _rEF-V _tH, control line Sel2 and Sel4 becomes high level, and switching transistor T3 and T5 is in conducting state, and data voltage is written to C point by switching transistor T3 by data line, and C point current potential is V _dATA, can be capacitively coupled to A point by first at the process data voltage of write, A point current potential becomes V _dATA+ V _tH.

In glow phase: control line Sel1 and Sel3 continues to maintain low level, switching transistor T2 and T4 is cut-off state, control line Sel2 becomes low level, switching transistor T3 is cut-off state, control line Sel4 continues to maintain high level, switching transistor T5 is in conducting state, and OLED is luminous, and the electric current flowing through OLED is:

$\begin{array}{c}{I}_{\mathrm{DS}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}^2=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}+V_{\mathrm{TH}}-V_{\mathrm{TH}})}^2\\ =\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{\left(V_{\mathrm{DATA}}\right)}^2\end{array}\·\·\·(3-1)$

Wherein, μ _n, C _ox, W, L be respectively the effective mobility of driving transistors T1, unit area gate capacitance, channel width and channel length, V _gSfor the grid voltage of T1.As can be seen from (3-1), the threshold voltage finally flowing through the electric current of OLED and the threshold voltage of driving transistors T1 and OLED itself is all irrelevant, thus the image element circuit in the present embodiment can well compensate the unevenness of display.

In the process of display driver, the second electric capacity C2 can keep electric charge, reduces charge leakage.

In addition, it should be noted that, if the Control of Voltage line current potential in the present embodiment image element circuit adopts (V _tH) max<=V _rEF<=V _dD-V _oLED(wherein (V _tH) max be drive transistor threshold voltage drift maximum), then the present embodiment image element circuit just can utilize the control signal in embodiment two, be compared to embodiment two image element circuit, have more a Control of Voltage line VREF, but not having too large electric current when initialization flows through OLED.

Image element circuit in the present embodiment not only can the drift of compensation for drive transistor threshold voltage, can also compensate the drift of OLED threshold voltage.

Embodiment four:

Figure 10 is the structural drawing of the image element circuit of the present embodiment, mainly comprises: an OLED, the first electric capacity C1 and the second electric capacity C2, a driving transistors T1, four switching transistors T2, T3, T4 and T5.

Transistor T1, T2, T3, T4 and T5 in pixel are P-type TFT, and image element circuit also can use the complementary technology comprising N-type TFT to drive, and now image element circuit needs to make suitably change to meet the circuit connection of N-type TFT.Transistor T1, T2, T3, T4 and T5 can by adopting amorphous silicon, receive/microcrystal silicon, polysilicon, organic semiconductor, metal oxide semiconductor techniques (such as IGZO-TFT), N-type semiconductor, P-type semiconductor or compensated semiconductor technology and prepare.Multiple image element circuit just can form a matrix for driving OLED display screen.

In addition this image element circuit also comprises four control lines Sel1, Sel2, Sel3 and Sel4, and for luminous type of drive of lining by line scan, these four control lines are row control line, a data line Data, a Control of Voltage line VREF.

Annexation between device is: second electrode coupling of driving transistors T1 is to the anode of light-emitting component OLED, and the first electrode coupling is to second electrode of switching transistor T5, and grid is coupled to first electrode of switching transistor T2; Second electrode coupling of switching transistor T2 is to Control of Voltage line VREF, and the first electrode coupling is to the grid of driving transistors T1, and grid is coupled to control line Sel1; First electrode coupling of switching transistor T3 is to second electrode of switching transistor T4, and the second electrode coupling is to data line Data, and grid is coupled to control line Sel2; First electrode coupling of switching transistor T4 is to first electrode of driving transistors T1, and the second electrode coupling is to first electrode of switching transistor T3, and grid is coupled to control line Sel3; Second electrode coupling of switching transistor T5 is to first electrode of driving transistors T1, and the first electrode coupling is to power lead VDD, and grid is coupled to control line Sel4; First electric capacity C1 is coupling between the grid of driving transistors T1 and first electrode of switching transistor T3; Second electric capacity C2 is coupling between ground wire VSS and first electrode of switching transistor T3; The negative electrode of OLED is coupled to ground wire VSS, and anode is coupled to second electrode of driving transistors T1.The grid of transistor T1, first electrode of T2 and the first electric capacity C1 are coupled to A point, first electrode of transistor T3, second electrode of T4 and the first electric capacity C1, the second electric capacity C2 are coupled to C point, and second electrode coupling of first electrode of switching transistor T1, first electrode of T4 and T5 is to D point.

Figure 11 is the signal timing diagram of the image element circuit of the present embodiment, and wherein Sel1, Sel2, Sel3, Sel4 are four row control lines, control the image element circuit of one's own profession.A kind of display driver process of image element circuit shown in Figure 10 is specifically described, i.e. the display drive method of the embodiment of the present invention four below in conjunction with Figure 11.

As shown in Figure 11, the time of a whole frame is divided into initialization, threshold value extraction, valve value compensation (namely programming) and luminous four-stage.

At initial phase: control line Sel1, Sel2 and Sel4 are low level, switching transistor T2, T3 and T5 are conducting state, control line Sel3 is high level, switching transistor T4 is cut-off state, data line writes a positive voltage by switching transistor T3 to node C, node D is charged to VDD through T5, VREF is VDD, Control of Voltage line VREF writes a VDD (write a VDD by Control of Voltage line VREF to node A, can prevent luminescent device from sending too bright light at this moment) by switching transistor T2 to node A.

The stage is extracted: control line Sel1 continues to maintain low level, and switching transistor T2 is conducting state, and node A current potential is maintained V in threshold value _rEF, V _rEFbe the voltage of Control of Voltage line VREF, control line Sel2 becomes high level, switching transistor T3 is cut-off state, node C current potential remains positive voltage by the second electric capacity C2, control line Sel3 becomes low level, Sel4 becomes high level, switching transistor T5 is cut-off state, T4 is conducting state, node C and node D electric charge is made to share (charge sharing), i.e. C, D two node is communicated with by switching transistor T4, two node potentials are consistent (as long as to the positive voltage (positive voltage larger than VDD) that the write of C point is enough large during initialization, after then T4 becomes conducting state, C point and D point can be all the positive voltages larger than VDD, and the V of T1 _gScan be bigger than T1 threshold voltage (because be all that P manages, so VGS, VTH are negative value, i.e. T1 | V _gS| can T1 be greater than | V _tH|), so T1 is in conducting state).Meanwhile, C, D 2 are discharged by T1, until C, D two node be placed to V _rEF-V _tHtime driving transistors T1 cut-off, wherein V _tHfor the threshold voltage of driving transistors T1, because T1 is P-type crystal pipe, so V _tHfor negative value, threshold voltage is stored in the first electric capacity C1.

In programming phases: control line Sel1 and Sel3 becomes high level, switching transistor T2 and T4 is cut-off state, and node A current potential is V _rEF, node C, D 2 current potentials are V _rEF-V _tH, control line Sel2 and Sel4 becomes low level, and switching transistor T3 and T5 is in conducting state, and data voltage is written to C point by switching transistor T3 by data line, and C point current potential is V _dATA, can be capacitively coupled to A point by first at the process data voltage of write, A point current potential becomes V _dATA+ V _tH.

In glow phase: control line Sel1 and Sel3 continues to maintain high level, switching transistor T2 and T4 is cut-off state, control line Sel2 becomes high level, switching transistor T3 is cut-off state, control line Sel4 continues to maintain low level, switching transistor T5 is in conducting state, and OLED is luminous, and the electric current flowing through OLED is:

$\begin{array}{c}{I}_{\mathrm{DS}}=\frac{1}{2}{\mathrm{\&mu;}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}^2=\frac{1}{2}{\mathrm{\&mu;}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}+V_{\mathrm{TH}}-\mathrm{VDD}-V_{\mathrm{TH}})}^2\\ =\frac{1}{2}{\mathrm{\&mu;}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{DATA}}-\mathrm{VDD})}^2\end{array}\&CenterDot;\&CenterDot;\&CenterDot;(4-1)$

Wherein, μ _n, C _ox, W, L be respectively the effective mobility of driving transistors T1, unit area gate capacitance, channel width and channel length, V _gSfor the grid voltage of T1.As can be seen from (4-1), the threshold voltage finally flowing through the electric current of OLED and the threshold voltage of driving transistors T1 and OLED itself is all irrelevant, thus the image element circuit in the present embodiment can well compensate the unevenness of display.

In the process of display driver, the second electric capacity C2 can keep electric charge, reduces charge leakage.

In addition, it should be noted that, if the Control of Voltage line current potential in the present embodiment image element circuit adopts (V _tH) max<=V _rEF<=V _dD+ (V _tH) max (wherein (V _tH) max be drive transistor threshold voltage drift maximum), then the present embodiment image element circuit just can utilize the control signal in embodiment two, be compared to embodiment two image element circuit, have more a Control of Voltage line VREF, but not having too large electric current when initialization flows through OLED.

Image element circuit in the present embodiment not only can the drift of compensation for drive transistor threshold voltage, can also compensate the drift of OLED threshold voltage.

In sum, image element circuit proposed by the invention not only can the drift of compensation for drive transistor threshold voltage, can also compensate the drift of light-emitting component OLED threshold voltage, thus realize more uniform luminous.

Technical scheme of the present invention, by the structure of appropriate design image element circuit, makes power lead VDD remain a certain level, more easily realizes the design that peripheral gate drives.Namely image element circuit of the present invention also increases a switching transistor T5 on driving branch road, power lead can be made to be a certain fixed level, there will not be fluctuation, can realize for grid driving than being easier to.

Above content is in conjunction with concrete embodiment further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, some simple deduction or replace can also be made.

Claims (10)

1. an image element circuit, it is disposed in the sweep trace of the supply scan control signal of first direction arrangement with between the data line of the supplies data signals of second direction arrangement, it is characterized in that, comprising: the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor, the first electric capacity, luminescent device;

The control pole of described the first transistor is coupled to the second current lead-through pole of described transistor seconds, first current lead-through pole of described the first transistor is coupled to the negative electrode of described luminescent device, and the second current lead-through pole of described the first transistor is coupled to the first current lead-through pole of described 5th transistor;

The control pole of described transistor seconds is coupled to sweep trace, first current lead-through pole of described transistor seconds is coupled to the first current lead-through pole of the 3rd supply voltage or described the first transistor, and the second current lead-through pole of described transistor seconds is coupled to the control pole of described the first transistor;

The control pole of described third transistor is coupled to sweep trace, and the first current lead-through pole of described third transistor is coupled to the second current lead-through pole of described 4th transistor, and the second current lead-through pole of described third transistor is coupled to data line;

The control pole of described 4th transistor is coupled to sweep trace, first current lead-through pole of described 4th transistor is coupled to the second current lead-through pole of described the first transistor, and the second current lead-through pole of described 4th transistor is coupled to the first current lead-through pole of described third transistor;

The control pole of described 5th transistor is coupled to sweep trace, and the first current lead-through pole of described 5th transistor is coupled to the second current lead-through pole of described the first transistor, and the second current lead-through pole of described 5th transistor is coupled to second source voltage;

Described first capacitive coupling is between the control pole of described the first transistor and the first current lead-through pole of described third transistor;

First current lead-through pole of described luminescent device is coupled to described first supply voltage, and the second current lead-through pole of described luminescent device is coupled to the first current lead-through pole of described the first transistor.

2. image element circuit as claimed in claim 1, it is characterized in that, described sweep trace comprises the first sweep trace, the second sweep trace and the second scan control line, and the control pole of described third transistor is coupled to described first sweep trace; The control pole of described transistor seconds and the control pole of described 4th transistor are coupled to described second sweep trace, and the control pole of described 5th transistor is coupled to described second scan control line; First current lead-through pole of described transistor seconds is coupled to the first current lead-through pole of described the first transistor, first sweep trace of the previous row image element circuit that described second sweep trace is expert at for described image element circuit, described second scan control line is the revertive delay sweep trace of described second sweep trace.

3. image element circuit as claimed in claim 2, is characterized in that, when described luminescent device is driven,

In the first stage, described third transistor controls in cut-off state by described first sweep trace, described transistor seconds and described 4th transistor control in conduction state by described second sweep trace, described 5th transistor by described second scan control line traffic control in conduction state; Described the first transistor becomes diode-connected, and described image element circuit is initialised;

In subordinate phase, described third transistor controls in cut-off state by described first sweep trace, described transistor seconds and described 4th transistor control in conduction state by described second sweep trace, described 5th transistor by described second scan control line traffic control in cut-off state; The threshold voltage of described the first transistor is stored to the first electric capacity;

In the phase III, described third transistor controls in conduction state by described first sweep trace, described transistor seconds and described 4th transistor control in cut-off state by described second sweep trace, described 5th transistor by described second scan control line traffic control in conduction state; The data propagated on the data line are written into described first electric capacity;

In fourth stage, described third transistor controls in cut-off state by described first sweep trace, described transistor seconds and described 4th transistor control in cut-off state by described second sweep trace, described 5th transistor by described second scan control line traffic control in conduction state; Described luminescent device is luminous.

4. image element circuit as claimed in claim 1, it is characterized in that, described sweep trace comprises the first control line, the second control line, the 3rd control line and the 4th control line, the control pole of described transistor seconds is coupled to described first control line, first current lead-through pole of described transistor seconds is coupled to the 3rd supply voltage, the control pole of described third transistor is coupled to described second control line, the control pole of described 4th transistor is coupled to described 3rd control line, and the control pole of described 5th transistor is coupled to described 4th control line.

5. image element circuit as claimed in claim 4, is characterized in that, when described luminescent device is driven,

In the first stage, described transistor seconds controls in conducting state by described first control line, described third transistor controls in conducting state by described second control line, described 4th transistor controls in cut-off state by described 3rd control line, and described 5th transistor controls in conducting state by described 4th control line; Described image element circuit is initialised;

In subordinate phase, described transistor seconds controls in conducting state by described first control line, described third transistor controls in cut-off state by described second control line, described 4th transistor controls in conducting state by described 3rd control line, and described 5th transistor controls in cut-off state by described 4th control line; The threshold voltage of described the first transistor is stored to the first electric capacity;

In the phase III, described transistor seconds controls in cut-off state by described first control line, described third transistor controls in conducting state by described second control line, described 4th transistor controls in cut-off state by described 3rd control line, and described 5th transistor controls in conducting state by described 4th control line; The data propagated on the data line are written into described first electric capacity;

In fourth stage, described transistor seconds controls in cut-off state by described first control line, described third transistor controls in cut-off state by described second control line, described 4th transistor controls in cut-off state by described 3rd control line, and described 5th transistor controls in conducting state by described 4th control line; Described luminescent device is luminous.

6. the image element circuit as described in any one of claim 1-5, is characterized in that,

Described the first transistor, described transistor seconds, described third transistor, described 4th transistor and described 5th transistor are N-type pipe; Described first supply voltage is high level, and described second source voltage is low level or ground wire; The first current lead-through very anode of described luminescent device, the second current lead-through very negative electrode of described luminescent device;

Or described the first transistor, described transistor seconds, described third transistor, described 4th transistor and described 5th transistor are P type pipe; Described first supply voltage is low level or ground wire, and described second source voltage is high level; The first current lead-through very negative electrode of described luminescent device, the second current lead-through very anode of described luminescent device.

7. the image element circuit as described in any one of claim 1-5, is characterized in that, also comprises the second electric capacity, and described second capacitive coupling, between the first current lead-through pole and the first supply voltage of described third transistor, for keeping electric charge, lowers charge leakage.

8. a display device, comprising:

With the multi-strip scanning line of first direction arrangement;

Gate driver circuit, for generation of sweep signal, is connected respectively with multi-strip scanning line;

With a plurality of data lines of second direction arrangement;

Data drive circuit, for generation of data-signal, is connected respectively with a plurality of data lines;

It is characterized in that, also comprise multiple image element circuit as described in any one of claim 1-7, described image element circuit be disposed in intersect between described sweep trace and described data line.

9. a display drive method for the image element circuit as described in claim 1-3, is characterized in that, comprising:

In the first stage, described third transistor controls in cut-off state by described first sweep trace, described transistor seconds and described 4th transistor control in conducting state by described second sweep trace, described 5th transistor by described second scan control line traffic control in conducting state; Described the first transistor becomes diode-connected, and described image element circuit is initialised;

In subordinate phase, described third transistor controls in cut-off state by described first sweep trace, described transistor seconds and described 4th transistor control in conducting state by described second sweep trace, described 5th transistor by described second scan control line traffic control in cut-off state; The threshold voltage of described the first transistor is stored to the first electric capacity;

In the phase III, described third transistor controls in conducting state by described first sweep trace, described transistor seconds and described 4th transistor control in cut-off state by described second sweep trace, described 5th transistor by described second scan control line traffic control in conducting state; The data propagated on the data line are written into described first electric capacity;

In fourth stage, described third transistor controls in cut-off state by described first sweep trace, described transistor seconds and described 4th transistor control in cut-off state by described second sweep trace, described 5th transistor by described second scan control line traffic control in conducting state; Described luminescent device is luminous.

10. a display drive method for the image element circuit as described in claim 4-7, is characterized in that, comprising:

In the first stage, described transistor seconds controls in conducting state by described first control line, described third transistor controls in conducting state by described second control line, described 4th transistor controls in cut-off state by described 3rd control line, and described 5th transistor controls in conducting state by described 4th control line; Described image element circuit is initialised;

In subordinate phase, described transistor seconds controls in conducting state by described first control line, described third transistor controls in cut-off state by described second control line, described 4th transistor controls in conducting state by described 3rd control line, and described 5th transistor controls in cut-off state by described 4th control line; The threshold voltage of described the first transistor is stored to the first electric capacity;

In the phase III, described transistor seconds controls in cut-off state by described first control line, described third transistor controls in conducting state by described second control line, described 4th transistor controls in cut-off state by described 3rd control line, and described 5th transistor controls in conducting state by described 4th control line; The data propagated on the data line are written into described first electric capacity;

In fourth stage, described transistor seconds controls in cut-off state by described first control line, described third transistor controls in cut-off state by described second control line, described 4th transistor controls in cut-off state by described 3rd control line, and described 5th transistor controls in conducting state by described 4th control line; Described luminescent device is luminous.