CN104519292A - Projection device and image data access method thereof - Google Patents
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Abstract
A projection device and an image data access method thereof are provided. The projection device comprises an image receiving unit, an image projection unit, a first memory, a second memory and a memory controller. The image receiving unit is used for receiving image data, and the image projecting unit is used for projecting an image corresponding to the image data to the projection surface. The first memory and the second memory are used for storing image data. The memory controller is coupled to the image projection unit, the image receiving unit, the first memory and the second memory, and is configured to: the image data transmitted from the image receiving unit is written into the first memory in response to the first level of the clock signal, and the image data stored in the second memory is read out from the second memory at the same time.
Description
Technical field
The invention relates to a kind of shadow casting technique, and relate to a kind of projection arrangement and image data access method thereof especially.
Background technology
Projection arrangement by image projecting on a larger screen, can watch content shown on screen to facilitate more people simultaneously.Therefore, the public arena such as company and school is often applied to.Moreover the trend developed towards large scale along with family expenses display product, projection arrangement is also popularized in general family gradually, and becomes a kind of electronic product daily in the modern life.
In general, in the process of projection device picture, projection arrangement carries out write and the reading of image data in single memory according to clock signal.That is, this single memory is changed according to being controlled between reading state and write state of clock signal, and namely this memory cannot carry out write and the reading of image data with the time.So, when projection arrangement need wait for that this single memory is converted to reading state, a frame (frame) image frame could be exported.And projection arrangement is after output one frame image frame, and single memory need be converted to write state again to be write in the middle of memory by image data.
As can be seen here, projection arrangement needs the conversion of the access status waiting for single memory just image frame can be projected away.If the frequency of clock signal is too low, just may there is the problem that picture postpones in the picture that projection arrangement projects.In general, in order to reach drop shadow effect smoothly, the frequency of clock signal can be improved to the problem avoiding picture to postpone, but the frequency improving clock signal relatively can produce the phenomenon of power consumption.On the other hand, in order to provide higher resolution, the data volume of image frame also will increase thereupon.So the reading time needed for single frame image data and write time also can be elongated, also just relatively more easily there is the problem that picture postpones.
Summary of the invention
In view of this, the invention provides a kind of Memory Controller and data access method thereof, read data and write data by being controlled in two memories of single clock signal, to allow projection arrangement can image output rapidly, and promote the smooth degree that projected picture views and admires.
The present invention proposes a kind of projection arrangement, comprises image receiving element, image projecting unit, first memory, second memory and Memory Controller.Image receiving element is in order to receive image data, and image projecting unit is in order to corresponding to the image projecting of image data to perspective plane.Memory Controller couples image projecting unit, image receiving element, first memory and second memory, and it is configured to: react on the first level of clock signal and the image data that image receiving element sends write to first memory, and meanwhile reading out the image data being stored in second memory from second memory.
In one embodiment of this invention, above-mentioned Memory Controller is also configured to: react on a second electrical level of clock signal and read out the image data storing first memory from first memory, and meanwhile the image data that image receiving element sends being write to second memory.
In one embodiment of this invention, above-mentioned projection arrangement also comprises clock generating unit.Clock generating unit coupled memory controller also provides clock signal to Memory Controller, and the first level of clock signal and second electrical level are different level.
In one embodiment of this invention, above-mentioned Memory Controller comprises memory interface and Memory Management Unit.This memory interface couples first memory and second memory.Memory Management Unit coupled memory interface, Memory Management Unit receive clock signal, and Memory Management Unit is according to clock signal carry out data write and digital independent to first memory and second memory by memory interface.
In one embodiment of this invention, above-mentioned Memory Controller also comprises Data Input Interface.Memory Controller couples image receiving element by Data Input Interface, to receive the image data that image receiving element sends.
In one embodiment of this invention, above-mentioned Memory Controller also comprises data output interface.Memory Controller couples image projecting unit by data output interface, to export the image data out of the ordinary read from first and second memory to image projecting unit.
In one embodiment of this invention, above-mentioned first memory and second memory are random access memory (random access memory, RAM).
From another viewpoint, the present invention proposes a kind of image data access method, be applicable to the Memory Controller be arranged in projection arrangement, and projection arrangement comprises image receiving element, image projecting unit, first memory and second memory, this data access method comprises the following steps.There is provided clock signal to Memory Controller.Receive the image data that image receiving element sends.React on the first level of clock signal and the image data that image receiving element sends write to first memory, and meanwhile reading out the image data being stored in second memory from second memory.Export the image data that reads out from first memory or second memory to image projecting unit.
In one embodiment of this invention, above-mentioned data access method also comprises: react on the second electrical level of clock signal and read out the image data being stored in second memory from first memory, and meanwhile the image data that image receiving element sends is write to second memory.
In one embodiment of this invention, above-mentioned clock signal is provided by clock generating unit, and the first level of clock signal and second electrical level are different level.
Based on above-mentioned, in Memory Controller provided by the present invention and data access method thereof, when clock signal is the first level, inputted image data is write to first memory and reads the image data stored from second memory by Memory Controller.When clock signal is second electrical level, inputted image data is write to second memory and reads the image data stored from first memory by Memory Controller.Thus, by the control of single clock signal, Memory Controller can read stored image data in turn from first memory and second memory, and Memory Controller can write inputted image data equally in turn in first memory and second memory.Accordingly, do not need the conversion just exportable image frame of the access status waiting for memory, and improve the smooth degree of projected picture.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.
Accompanying drawing explanation
Institute's accompanying drawings is below a part for specification of the present invention, depicts example embodiment of the present invention, and institute's accompanying drawings illustrates principle of the present invention together with the description of specification.
Fig. 1 is the schematic diagram of the projection arrangement illustrated according to one embodiment of the invention.
The block schematic diagram of Memory Controller of Fig. 2 for illustrating according to Fig. 1 embodiment.
Fig. 3 is the schematic diagram of the access status of first memory and the second memory illustrated according to one embodiment of the invention.
Fig. 4 is the flow chart of a kind of data access method illustrated according to one embodiment of the invention.
[label declaration]
10: projection arrangement 100: Memory Controller
110: image receiving element 120: image projecting unit
130: first memory 140: second memory
150: clock generating unit 101: Data Input Interface
102: data output interface 103: memory interface
104: Memory Management Unit 130: first memory
140: second memory CLK: clock signal
Img_d: image data
S401 ~ S405: each step of the image data access method described in one embodiment of the invention
Embodiment
With detailed reference to this one exemplary embodiment, the example of described one exemplary embodiment is described in the accompanying drawings.In addition, all may part, in graphic and execution mode, use the element/component of identical label to represent identical or similar portions.
Fig. 1 is the schematic diagram of the projection arrangement illustrated according to one embodiment of the invention.Please refer to Fig. 1, projection arrangement 10 comprises Memory Controller 100, image receiving element 110, image projecting unit 120, first memory 130, second memory 140 and clock generating unit 150.In the present embodiment, projection arrangement 10 can be (miniature) projector or the various electronic installation with projecting function.Projection arrangement 10 receives the image data from external device (ED) (not illustrating), and external device (ED) can be intelligent mobile phone (smartphone), notebook computer (notebook), desktop PC, multi-media player or game machine etc. are various has signal of video signal and provide and/or the electronic installation of playing function.
In the present embodiment, image receiving element 110 is in order to receive image data, and it can comprise wired, wave point or its combination.Such as, the wireline interface of image receiving element 110 can in order to receiver, video graphic array (Video Graphics Array, VGA), digital visual interface (digital video interface, DVI), high-definition multimedia interface (High-Definition Multimedia Interface, HDMI), the signal of video signal of the various wire transmission form such as display port (DisplayPort), independent vide terminal (S-Video), AV terminal, aberration terminal and/or internet (Internet), but be not restricted to this.In addition, the wave point of image receiving element 110 then can in order to receive bluetooth (Bluetooth, BT), the signal of video signal of the various radio transmission format such as 3G, Wireless Fidelity (Wireless Fidelity, WiFi) and/or WiGig, but be not restricted to this.
Image projecting unit 120 is in order to corresponding to the image projecting of received image data to perspective plane.And, image projecting unit 120 can be support digital light processing (Digital Light Processing, DLP), the projection optical module of the various shadow casting technique such as liquid crystal on silicon (Liquid crystal on silicone, LCoS), 3LCD.
First memory 130 and second memory 140 are in order to store image data, and it is such as the combination of the fixed of any pattern or packaged type random access memory (Random Access Memory, RAM), flash memory (Flash memory), hard disk or other similar device or these devices.And random access memory can be dynamic random access memory (dynamic RAM, or static RAM (static ram DRAM), SRAM), the present invention is not specially limited for the kenel of random access memory.
Clock generating unit 150 provides clock signal to Memory Controller 100, allows Memory Controller 100 can normal operation according to this.Wherein, clock signal has the first different level and second electrical level.Accordingly, the level of the clock signal that can provide according to clock generating unit 150 in order to the Memory Controller 100 of the control core as projection arrangement 10 and carry out the access of image data on first memory 130 with second memory 140.
Memory Controller 100 is coupled between image receiving element 110 and image projecting unit 120, and couples first memory 130, second memory 140 and clock generating unit 150.Memory Controller 100 receives the image data that image receiving element 110 sends, and the image data that image receiving element 110 sends is write to first memory 130 and second memory 140, be stored in first memory 130 and second memory 140 with the image data sent by image receiving element 110.On the other hand, Memory Controller 100 can read and is stored in first memory 130 and the image data in second memory 140, and export the image data read from first memory 130 or second memory 140 to image projecting unit 120, make image projecting unit 120 produce corresponding projected light beam and the frame out that projects on the projection surface according to this.
In detail, Memory Controller 100 is configured to react on the first level of clock signal and the image data that image receiving element 110 sends is write to first memory 130, and meanwhile reads out the image data being stored in second memory 140 from second memory 140.On the other hand, Memory Controller 100 can react on the second electrical level of clock signal and read out the image data being stored in first memory 130 from first memory 130, and meanwhile the image data that image receiving element 110 sends is write to second memory 140.
Further, the block schematic diagram of Memory Controller of Fig. 2 for illustrating according to Fig. 1 embodiment.Referring to Fig. 1 and Fig. 2, Memory Controller 100 comprises Data Input Interface 101, data output interface 102, memory interface 103 and Memory Management Unit 104.In the present embodiment, Memory Controller 100 couples image receiving element 110 by Data Input Interface 101, to receive the image data img_d that image receiving element 110 sends.On the other hand, Memory Controller 100 couples image projecting unit 120 by data output interface 102, to export image data img_d to image projecting unit 120, carries out the projection of picture according to this.
Data Input Interface 101 and data output interface 102 can be compatible with universal serial bus (Universal Serial Bus, USB) standard, advanced annex arranged side by side (Parallel Advanced TechnologyAttachment, PATA) standard, Institute of Electrical and Electric Engineers (Institute of Electrical andElectronic Engineers, IEEE) 1394 standards, high-speed peripheral component connecting interface (PeripheralComponent Interconnect Express, PCI Express) standard, advanced annex (the SerialAdvanced Technology Attachment of sequence, SATA) standard or other data transmission standard be applicable to, the present invention does not limit this.
Memory interface 103 couples first memory 130 and second memory 140.Memory Management Unit 104 couples Data Input Interface 101, data output interface 102 and memory interface 103, and Memory Management Unit 104 carries out data write and digital independent according to clock signal clk by memory interface 103 pairs of first memories 130 and second memory 140.Furthermore, the image data for storing is write to first memory 130 and second memory 140 by memory interface 103 by Memory Management Unit 104.Similarly, Memory Management Unit 104 reads out the image data being stored in first memory 130 and second memory 140 by memory interface 103.In the present embodiment, the clock signal clk that Memory Management Unit 104 receive clock generation unit 150 exports, and the access according to clock signal clk, first memory 130 and second memory 140 being carried out to data.
Specifically, when clock signal clk is the first level, the image data img_d inputted from Data Input Interface 101 is write to first memory 130 by Memory Management Unit 104, and meanwhile Memory Management Unit 104 reads the image data img_d being stored in second memory 140, and exported the image data img_d read out from second memory by data output interface 102.On the other hand, when clock signal clk is second electrical level signal from the first level transitions, Memory Management Unit 104 reads the image data img_d being stored in first memory 130, and exported the image data img_d read out from first memory by data output interface 102, and the image data img_d inputted from Data Input Interface 101 is also write to second memory 140 by Memory Management Unit 104 simultaneously.That is, by the control of single clock signal CLK, Memory Controller 100 can read the image data img_d that image receiving element 110 is transmitted by Data Input Interface 101 in turn from first memory 130 and second memory 140.
In order to describe spirit of the present invention in detail, Fig. 3 is the schematic diagram of the access status of first memory and the second memory illustrated according to one embodiment of the invention.Referring to Fig. 2 and Fig. 3, clock signal clk is changed regularly according to its clock frequency between the first level and second electrical level.Specifically in the present embodiment, the first level is assumed to be high level, and second electrical level is low level, but the present invention is not as limit.In the middle of another embodiment, the first level can be also low level, and second electrical level is high level relatively.
During time t1 ~ t2, Memory Management Unit 104 receives the clock signal clk of high level.So Memory Management Unit 104 controls first memory 130 for write state, so that the image data inputted from Data Input Interface 101 img_d is write to first memory 130.Meanwhile, Memory Management Unit 104 controls second memory 140 for reading state, to read the image data img_d being stored in second memory 140.
And then, during time t2 ~ t3, Memory Management Unit 104 receives and is converted to low level clock signal clk from high level.So Memory Management Unit 104 controls first memory 130 for reading state, to read the image data img_d writing to first memory 130 during time t1 ~ t2.That is, during time t1 ~ t2, be written into first memory 130 image data img_d to be read during time t2 ~ t3.
On the other hand, during same time t2 ~ t3, Memory Management Unit 104 controls second memory 140 for write state, so that the image data inputted from Data Input Interface 101 img_d is write to second memory 140.That is, Memory Management Unit 104 is during time t2 ~ t3, Memory Management Unit 104 not only reads the image data img_d stored from first memory 130, inputted image data img_d is also write to second memory 140 by Memory Management Unit 104 simultaneously.Wherein, after image data img_d stored by Memory Management Unit 104 reads respectively respectively at first memory 130 and second memory 140, can by data output interface 102 by image data img_d read respectively export image projecting unit 120 to, so that will the image projection to of inputted image data img_d be corresponded on the surface.
In like manner can push away, during time t3 ~ t4, Memory Management Unit 104 receive from low transition be the clock signal clk of high level.So Memory Management Unit 104 controls second memory 140 and converts back reading state, to read the image data img_d of write during time t2 ~ t3.Meanwhile, Memory Management Unit 104 controls first memory 130 and converts back write state, so that the image data inputted from Data Input Interface 101 img_d is write to first memory 130.
As can be seen here, when Memory Controller 100 reads from first memory 130 image data stored, inputted image data can be write to second memory 140 simultaneously, and Memory Controller 100 can read stored image data incessantly in turn from first memory 130 and second memory 140, to allow image projecting unit 120 can according to read image data swimmingly by image projection out.In addition, no matter the frequency height of clock signal clk why, Memory Controller 100 can read stored image data from first memory 130 and second memory 140 incessantly.Base this, the frequency of clock signal clk can be reduced, make clock control cell 150 can provide clock signal clk with lower frequency of oscillation, therefore reach effect of power saving.
Specifically in the above-described embodiments, the image data img_d inputted can be written into first memory 130 during time t1 ~ t2, and is and then read out in first memory 130 during time t2 ~ t3.That is, and then each data is just read out after being written into memory.But the present invention is not as limit, the reading order of each data is determined by practical application situation.For example, in another embodiment, the image data inputted can be written into first memory 130 during time t1 ~ t2, but stored image data can be read out from first memory 130 during time t4 ~ t5.Spirit of the present invention is, Memory Controller 110 can read stored image data from first memory 130 and second memory 140 incessantly, but is not limited with the order read for each data write.
Fig. 4 is the flow chart of steps of the image data access method of one embodiment of the invention.Described method is applicable to the Memory Controller as described in the embodiment of Fig. 1 and Fig. 2.Wherein, the method described in Fig. 4 all can obtain sufficient support and teaching according to the explanation of preceding figures, therefore being in this and repeating no more of similar or repetition.
Please refer to Fig. 4, first, clock generating unit 150 provides clock signal clk to Memory Controller 100 (step S401).Memory Controller 100 receives the image data img_d (step S402) that image receiving element 110 sends.Memory Controller 100 reacts on the first level of clock signal clk and the image data img_d sent by image receiving element 110 writes to first memory 130, and meanwhile reads out the image data img_d (step S403) being stored in second memory 140 from second memory 140.
And then, Memory Controller 100 reacts on the second electrical level of clock signal clk and reads out the image data img_d being stored in first memory 130 from first memory 130, and meanwhile the image data img_d that image receiving element 110 sends is write to second memory 140 (step S404).Memory Controller 100 exports the image data img_d that reads out respectively from first memory 130 and second memory 140 to image projecting unit 120 (step S405) by data output interface 102.
In sum, Memory Controller of the present invention and data access method thereof are by the control of single clock signal, stored image data can be read in turn from first memory and second memory, and in first memory and second memory, write inputted image data in turn simultaneously.Accordingly, do not need to wait for that the level conversion of clock signal just can read stored image data, and then improve the smooth degree of projected picture.In addition, because Memory Controller does not need to wait for that the level conversion of clock signal just can read stored image data, therefore can reduce the control frequency of clock signal when normal image output picture, and then reach effect of power saving.
Although the present invention discloses as above with embodiment; so itself and be not used to limit the present invention; have in any art and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the appended right person of defining.
Claims (10)
1. a projection arrangement, is characterized in that, comprising:
Image receiving element, in order to receive image data;
Image projecting unit, in order to corresponding to the image projecting of this image data on perspective plane;
First memory;
Second memory; And
Memory Controller, couple this image projecting unit, this image receiving element, this first memory and this second memory, and it is configured to: react on the first level of clock signal and this image data that this image receiving element sends write to this first memory, and meanwhile reading out the image data being stored in this second memory from this second memory.
2. projection arrangement according to claim 1, wherein this Memory Controller is also configured to: react on the second electrical level of this clock signal and read out the image data being stored in this first memory from this first memory, and meanwhile this image data that this image receiving element sends is write to this second memory.
3. projection arrangement according to claim 1, wherein this projection arrangement also comprises clock generating unit, this clock generating unit couples this Memory Controller and provides this clock signal to this Memory Controller, and this first level of this clock signal and this second electrical level are different level.
4. projection arrangement according to claim 3, wherein this Memory Controller comprises:
Memory interface, couples this first memory and this second memory; And
Memory Management Unit, couple this memory interface, this Memory Management Unit receives this clock signal, and this Memory Management Unit carries out data write and digital independent by this memory interface to this first memory and this second memory according to this clock signal.
5. projection arrangement according to claim 4, wherein this Memory Controller also comprises Data Input Interface, and this Memory Controller couples this image receiving element by this Data Input Interface, to receive this image data that this image receiving element sends.
6. projection arrangement according to claim 4, wherein this Memory Controller also comprises data output interface, this Memory Controller couples this image projecting unit by this data output interface, first to export this image projecting unit to read the respectively image data of this second memory by from this.
7. projection arrangement according to claim 1, wherein this first memory and this second memory are random access memory.
8. an image data access method, for being arranged at the Memory Controller in projection arrangement, and this projection arrangement comprises image receiving element, image projecting unit, first memory and second memory, it is characterized in that, this data access method comprises:
There is provided clock signal to this Memory Controller;
Receive the image data that this image receiving element sends;
React on the first level of this clock signal and this image data that this image receiving element sends write to this first memory, and meanwhile reading out the image data being stored in this second memory from this second memory; And
Export the image data that reads out respectively from this first memory and this second memory to this image projecting unit.
9. image data access method according to claim 8, also comprises:
React on the second electrical level of this clock signal and read out the image data being stored in this first memory from this first memory, and meanwhile this image data that this image receiving element sends being write to this second memory.
10. image data access method according to claim 9, wherein this clock signal is provided by clock generating unit, and this first level of this clock signal and this second electrical level are different level.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102135398A TWI516854B (en) | 2013-09-30 | 2013-09-30 | Projection apparatus and image data accessing method thereof |
| TW102135398 | 2013-09-30 |
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| Publication Number | Publication Date |
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| CN104519292A true CN104519292A (en) | 2015-04-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310594566.7A Pending CN104519292A (en) | 2013-09-30 | 2013-11-22 | Projection device and image data access method thereof |
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| CN (1) | CN104519292A (en) |
| TW (1) | TWI516854B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113079336A (en) * | 2020-01-03 | 2021-07-06 | 深圳市春盛海科技有限公司 | High-speed image recording method and device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1738397A (en) * | 2002-11-07 | 2006-02-22 | 精工爱普生株式会社 | Projection apparatus and monitoring method of projection apparatus |
| CN102968394A (en) * | 2012-10-19 | 2013-03-13 | 华中科技大学 | Field programmable gate array (FPGA) and digital signal processor (DSP) data transmission system based on Ping Pong mechanism |
| CN103019014A (en) * | 2011-09-22 | 2013-04-03 | 卡西欧计算机株式会社 | Projection apparatus, and projection control method |
-
2013
- 2013-09-30 TW TW102135398A patent/TWI516854B/en not_active IP Right Cessation
- 2013-11-22 CN CN201310594566.7A patent/CN104519292A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1738397A (en) * | 2002-11-07 | 2006-02-22 | 精工爱普生株式会社 | Projection apparatus and monitoring method of projection apparatus |
| CN103019014A (en) * | 2011-09-22 | 2013-04-03 | 卡西欧计算机株式会社 | Projection apparatus, and projection control method |
| CN102968394A (en) * | 2012-10-19 | 2013-03-13 | 华中科技大学 | Field programmable gate array (FPGA) and digital signal processor (DSP) data transmission system based on Ping Pong mechanism |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113079336A (en) * | 2020-01-03 | 2021-07-06 | 深圳市春盛海科技有限公司 | High-speed image recording method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201512764A (en) | 2015-04-01 |
| TWI516854B (en) | 2016-01-11 |
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