CN104519240B - The IP kernel and method of a kind of foreground target detection - Google Patents
The IP kernel and method of a kind of foreground target detection Download PDFInfo
- Publication number
- CN104519240B CN104519240B CN201410793059.0A CN201410793059A CN104519240B CN 104519240 B CN104519240 B CN 104519240B CN 201410793059 A CN201410793059 A CN 201410793059A CN 104519240 B CN104519240 B CN 104519240B
- Authority
- CN
- China
- Prior art keywords
- frame
- circuit
- block
- coordinate
- pixel block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Image Analysis (AREA)
- Image Processing (AREA)
Abstract
The present invention provides the IP kernel and method of a kind of foreground target detection, can be based on textural characteristics, the foreground target in video pictures in multiple frames is detected respectively, and realize the dynamic renewal of background.A kind of IP kernel detected for foreground target of the present invention, including Coordinate generation circuit, gray scale generative circuit, frame buffer, LBP generative circuits, frozen frozen mass counting circuit, background caching, foreground pixel block counter, frame coordinate registers, border color register, imaging importing circuit in prospect decision circuit, frame.Modules in the foreground target detection circuit of the present invention are hardware module, it is not necessary to which software intervention, hardware is automatically performed foreground target detection.The information such as size, position, the color of frame can be configured by rewriteeing the value of correspondence register.
Description
Technical field
The IP kernel detected the present invention relates to a kind of foreground target and the foreground target detection method based on the IP kernel.
Background technology
Realized, and operated in desk-top based on software more than the foreground target detection technique of configurable detection zone domestic at present
On computer or server.Special circuit is detected currently without the foreground target that can realize configurable detection zone.Using soft
Part algorithm realizes the embedded system of foreground target detection, and it has the disadvantage that cost is higher, and power consumption is larger, and poor real.
The content of the invention
In view of this, the present invention provides a kind of can realize and the foreground target in multiple frame regions is detected respectively
IP kernel, the IP kernel can realize on FPGA or chip.The IP kernel can realize that background dynamics update.The IP kernel is current by contrast
The LBP values of frame and background frames, can reduce influence of the intensity of illumination change to testing result.The present invention also provides one kind and is based on being somebody's turn to do
The foreground target detection method of IP kernel.
The present invention is realized using following technical scheme:A kind of foreground target detects IP kernel, it is characterised in that:Including coordinate life
Sentence into circuit, gray scale generative circuit, frame buffer circuit, LBP generative circuits, frozen frozen mass counting circuit, background buffer circuit, prospect
Determine circuit, foreground pixel block counter, frame coordinate registers, border color register and imaging importing circuit in frame;Institute
State the coordinate that Coordinate generation dot circuit generates currently processed block of pixels according to the row field sync signal of video in real time, and by generation
The coordinate of block of pixels is sent in frame in foreground pixel block counter;The gray scale generative circuit is by the RGB in vision signal
Signal is converted into grey scale signal in real time, and the input of the first output termination LBP generative circuits of the gray scale generative circuit is described
One input of the second output termination frozen frozen mass counting circuit of gray scale generative circuit, the 3rd of the gray scale generative circuit the
The input of output termination frame buffer circuit;The of the first output termination prospect decision circuit of the LBP generative circuits
One input, an input of the second output termination background buffer circuit of the LBP generative circuits, the LBP generations
Circuit generates the LBP values that grey scale signal generates each block of pixels according to the gray scale generative circuit, and the LBP values are buffered in background and delayed
Deposit in circuit;Another input of the output termination frozen frozen mass counting circuit of the frame buffer circuit;The frozen frozen mass meter
Another input of the output termination background buffer circuit of number circuit, the frozen frozen mass counting circuit is used for whether judging present frame
For frozen frozen mass, and frozen frozen mass is counted;Another input of the output termination prospect decision circuitry of the background buffer circuit
End;The first input end of foreground pixel block counter, the prospect in the output termination frame of the prospect decision circuitry
Decision circuitry is used to judge whether current pixel block is prospect;Second input termination of foreground pixel block counter in the frame
The output of the Coordinate generation dot circuit, an output end of its 3rd input termination frame coordinate registers, its output end
Map interlinking is as the first input end of supercircuit;Second input edge fit frame coordinate registers of described image supercircuit it is another
Rgb signal in output end, its described border color register of the 3rd input termination, its 4th input termination vision signal, institute
Number of the imaging importing circuit according to frame coordinate registers and border color register foreground pixel block is stated, it is original in each frame
Stacking side frame image on image, if foreground pixel block is no more than threshold value in frame, frame does not flash, if foreground pixel block in frame
More than threshold value, frame is alarmed in a flashing manner.
In an embodiment of the present invention, the frozen frozen mass counting circuit uses frame differential method, by present frame gray signal
Contrasted with previous frame grey scale signal, whether be frozen frozen mass, and frozen frozen mass is counted if judging present frame, if continuous occur
Static frame number be more than setting, described frozen frozen mass counting circuit can draw high the write enable signal of the background cache module
The time of one frame, and replace original LBP values in background caching with the LBP values of present frame.
In an embodiment of the present invention, the IP kernel is differentiated in units of block of pixels, differentiates that each block of pixels belongs to
Prospect or background;Each block of pixels N × N number of adjacent pixel on picture is constituted, and N is the natural number more than 1.
The present invention also provides a kind of foreground target detection method that IP kernel is detected based on above-mentioned foreground target, and its feature exists
In:Comprise the following steps:Step S01:The gray scale generative circuit is calculated according to the rgb signal of image successively according to time sequencing
Go out the grey scale signal of each pixel of image, LBP generative circuits generate each picture according to the grey scale signal of pixel in each block of pixels
The LBP values of plain block, and the LBP values of generation are buffered in background buffer circuit, it regard the first two field picture as background frames;Step
S02:Since the two field picture of video second, the LBP values of current pixel block and the background are cached electricity by the prospect decision circuit
The LBP values of correspondence position are contrasted in the background frames stored in road, and whether judge current pixel block is prospect, while described sit
Mark generative circuit and the coordinate of current pixel block is generated according to row field sync signal, and the coordinate of the block of pixels of generation is sent to side
In inframe foreground pixel block counter;Step S03:In frame foreground pixel block counter according to prospect decision circuit to current picture
The side stored in the result of determination of plain block, the coordinate of the current pixel block of Coordinate generation circuit evolving and frame coordinate registers
Frame coordinate, counts the foreground pixel block number in each frame;Step S04:Described image supercircuit is according to frame coordinate
The number of foreground pixel block in register, border color register and each frame, side is superimposed on each frame original image
Block diagram picture, if foreground pixel block is not above threshold value in frame, frame does not flash, if foreground pixel block exceedes threshold value, side in frame
Frame is alarmed in a flashing manner.
In an embodiment of the present invention, it is further comprising the steps of:The frozen frozen mass counting circuit gives birth to gray scale generative circuit
Into current pixel gray value and frame buffer in the gray value of previous frame image that stores contrasted, according to frame differential method
Judge whether present frame has moving target, if continuous N frame is all not detected by moving target, frozen frozen mass counting circuit can delay background
Deposit circuit write enable control signal and draw high a frame time, then drag down, the LBP values of the background frames stored in background caching can be in the back of the body
Scape, which caches to write, enables the time interior LBP values replacement by present frame that control signal draws high a frame, realizes the renewal of background, M is certainly
So count.
In an embodiment of the present invention, the foreground target detection method is differentiated in units of block of pixels, differentiates each
Individual block of pixels belongs to prospect or background;Each block of pixels N × N number of adjacent pixel on picture is constituted, N be more than
1 natural number.
The invention has the advantages that:The foreground target detection IP kernel of the present invention, all modules are all hardware circuit module,
With very high concurrency, real-time detection can be realized;Whether the present invention will have moving target as the back of the body in current monitor picture
The foundation of context update in scape calculus of finite differences, can realize the dynamic renewal of background;Background subtraction in the present invention is by present frame
Contrasted with the LBP values in background frames, rather than the gray value of present frame and background frames is contrasted.This way can have
Effect reduces influence of the intensity of illumination change to testing result.
Brief description of the drawings
Fig. 1 is the system framework figure of the present invention.
Fig. 2 is the schematic diagram of block of pixels in the present invention.
Embodiment
The present invention will be further described with specific embodiment below in conjunction with the accompanying drawings.
The system framework figure of the present invention is referring to Fig. 1.The present invention provides a kind of foreground target detection IP kernel, including Coordinate generation
Circuit 1, gray scale generative circuit 2, LBP generative circuits 3, frozen frozen mass counting circuit 4, frame buffer 5, prospect decision circuit 6, background are delayed
Deposit foreground pixel counter 8 in 7, square frame, square frame coordinate registers 9, square frame color register 10, imaging importing circuit 11.Institute
State the coordinate that Coordinate generation dot circuit generates currently processed block of pixels according to the row field sync signal of video in real time, and by generation
The coordinate of block of pixels is sent in frame in foreground pixel block counter;The gray scale generative circuit is by the RGB in vision signal
Signal is converted into grey scale signal in real time, and the input of the first output termination LBP generative circuits of the gray scale generative circuit is described
One input of the second output termination frozen frozen mass counting circuit of gray scale generative circuit, the 3rd of the gray scale generative circuit the
The input of output termination frame buffer circuit;The of the first output termination prospect decision circuit of the LBP generative circuits
One input, an input of the second output termination background buffer circuit of the LBP generative circuits, the LBP generations
Circuit generates the LBP values that grey scale signal generates each block of pixels according to the gray scale generative circuit, and the LBP values are buffered in background and delayed
Deposit in circuit;Another input of the output termination frozen frozen mass counting circuit of the frame buffer circuit;The frozen frozen mass meter
Another input of the output termination background buffer circuit of number circuit, the frozen frozen mass counting circuit is used for whether judging present frame
For frozen frozen mass, and frozen frozen mass is counted;Another input of the output termination prospect decision circuitry of the background buffer circuit
End;The first input end of foreground pixel block counter, the prospect in the output termination frame of the prospect decision circuitry
Decision circuitry is used to judge whether current pixel block is prospect;Second input termination of foreground pixel block counter in the frame
The output of the Coordinate generation dot circuit, an output end of its 3rd input termination frame coordinate registers, its output end
Map interlinking is as the first input end of supercircuit;Second input edge fit frame coordinate registers of described image supercircuit it is another
Rgb signal in output end, its described border color register of the 3rd input termination, its 4th input termination vision signal, institute
Number of the imaging importing circuit according to frame coordinate registers and border color register foreground pixel block is stated, it is original in each frame
Stacking side frame image on image, if foreground pixel block is no more than threshold value in frame, frame does not flash, if foreground pixel block in frame
More than threshold value, frame is alarmed in a flashing manner.
In an embodiment of the present invention, the frozen frozen mass counting circuit uses frame differential method, by present frame gray signal
Contrasted with previous frame grey scale signal, whether be frozen frozen mass, and frozen frozen mass is counted if judging present frame, if continuous occur
Static frame number be more than setting, described frozen frozen mass counting circuit can draw high the write enable signal of the background cache module
The time of one frame, and replace original LBP values in background caching with the LBP values of present frame.
In the present invention one is embodiment, the IP kernel is differentiated in units of block of pixels, differentiates that each block of pixels belongs to
In prospect or background;Each block of pixels N × N number of adjacent pixel on picture is constituted, and N is the natural number more than 1.
Preferably the present invention uses 3 × 3 block of pixels, referring specifically to Fig. 2.
The present invention also provides a kind of foreground target detection method that IP kernel is detected based on above-mentioned foreground target, and its feature exists
In:Comprise the following steps:Step S01:The gray scale generative circuit is calculated according to the rgb signal of image successively according to time sequencing
Go out the grey scale signal of each pixel of image, LBP generative circuits generate each picture according to the grey scale signal of pixel in each block of pixels
The LBP values of plain block, and the LBP values of generation are buffered in background buffer circuit, it regard the first two field picture as background frames;Step
S02:Since the two field picture of video second, the LBP values of current pixel block and the background are cached electricity by the prospect decision circuit
The LBP values of correspondence position are contrasted in the background frames stored in road, and whether judge current pixel block is prospect, while described sit
Mark generative circuit and the coordinate of current pixel block is generated according to row field sync signal, and the coordinate of the block of pixels of generation is sent to side
In inframe foreground pixel block counter;Step S03:In frame foreground pixel block counter according to prospect decision circuit to current picture
The side stored in the result of determination of plain block, the coordinate of the current pixel block of Coordinate generation circuit evolving and frame coordinate registers
Frame coordinate, counts the foreground pixel block number in each frame;Step S04:Described image supercircuit is according to frame coordinate
The number of foreground pixel block in register, border color register and each frame, side is superimposed on each frame original image
Block diagram picture, if foreground pixel block is not above threshold value in frame, frame does not flash, if foreground pixel block exceedes threshold value, side in frame
Frame is alarmed in a flashing manner.
In an embodiment of the present invention, it is further comprising the steps of:The frozen frozen mass counting circuit gives birth to gray scale generative circuit
Into current pixel gray value and frame buffer in the gray value of previous frame image that stores contrasted, according to frame differential method
Judge whether present frame has moving target, if continuous N frame is all not detected by moving target, frozen frozen mass counting circuit can delay background
Deposit circuit write enable control signal and draw high a frame time, then drag down, the LBP values of the background frames stored in background caching can be in the back of the body
Scape, which caches to write, enables the time interior LBP values replacement by present frame that control signal draws high a frame, realizes the renewal of background, M is certainly
So count.M can be configured according to available accuracy demand by user.
In an embodiment of the present invention, the foreground target detection method is differentiated in units of block of pixels, differentiates each
Individual block of pixels belongs to prospect or background;Each block of pixels N × N number of adjacent pixel on picture is constituted, N be more than
1 natural number.Preferably the present invention uses 3 × 3 block of pixels, referring specifically to Fig. 2.
It can be realized using technical scheme and the foreground target in video in multiple certain blocks regions is carried out
Detection, and boxed area can be configured as needed in site of deployment.LBP(Local binary pattern)Can be for description image
Textural characteristics, the LBP operators that the present invention is used can reduce influence of the intensity of illumination change to testing result.While energy of the present invention
Enough realize the dynamic of background with new.
Although the present invention is disclosed above with embodiment, so it is not limited to the present invention, any affiliated technology neck
Have usually intellectual in domain, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore this hair
Bright protection domain is worked as to be defined depending on the appended claims person of defining.
Claims (6)
1. a kind of foreground target detects IP kernel, it is characterised in that:Including Coordinate generation circuit, gray scale generative circuit, frame buffer electricity
Road, LBP generative circuits, frozen frozen mass counting circuit, background buffer circuit, prospect decision circuit, foreground pixel block count in frame
Device, frame coordinate registers, border color register and imaging importing circuit;
The Coordinate generation dot circuit generates the coordinate of currently processed block of pixels according to the row field sync signal of video in real time, and will
The coordinate of the block of pixels of generation is sent in frame in foreground pixel block counter;
Rgb signal in vision signal is converted into grey scale signal, the gray scale generative circuit by the gray scale generative circuit in real time
The first output termination LBP generative circuits input, the second output termination frozen frozen mass meter of the gray scale generative circuit
One input of number circuit, the input of the 3rd output termination frame buffer circuit of the gray scale generative circuit;
The first input end of the first output termination prospect decision circuit of the LBP generative circuits, the LBP generative circuits
The second output termination background buffer circuit first input end;The LBP generative circuits generate electricity according to the gray scale
Road generation grey scale signal generates the LBP values of each block of pixels, and the LBP values are buffered in background buffer circuit;
Another input of the output termination frozen frozen mass counting circuit of the frame buffer circuit;
Another input of the output termination background buffer circuit of the frozen frozen mass counting circuit, the frozen frozen mass counting circuit is used
In judging whether present frame is frozen frozen mass, and frozen frozen mass is counted;
Another input of the output termination prospect decision circuitry of the background buffer circuit;
The first input end of foreground pixel block counter, the prospect in the output termination frame of the prospect decision circuitry
Decision circuitry is used to judge whether current pixel block is prospect;
The output of the second input termination Coordinate generation dot circuit of foreground pixel block counter in the frame, it is the 3rd defeated
Enter the output end for terminating the frame coordinate registers, its output end map interlinking is as the first input end of supercircuit;
Another output end of second input edge fit frame coordinate registers of described image supercircuit, its 3rd input termination institute
The output end of border color register is stated, the RGB input signals in its 4th input termination vision signal, described image superposition electricity
Road is superimposed side according to the number of frame coordinate registers and border color register foreground pixel block on each frame original image
Block diagram picture, if foreground pixel block is no more than threshold value in frame, frame does not flash, if foreground pixel block exceedes threshold value, side in frame
Frame is alarmed in a flashing manner.
2. foreground target according to claim 1 detects IP kernel, it is characterised in that:The frozen frozen mass counting circuit uses frame
Between calculus of finite differences, present frame gray signal and previous frame grey scale signal are contrasted, whether be frozen frozen mass, and right if judging present frame
Frozen frozen mass is counted, if the static frame number continuously occurred is more than setting, described frozen frozen mass counting circuit can be by the back of the body
The write enable signal of scape cache module is drawn high the time of a frame, and with the LBP values of present frame replace background caching in it is original
LBP values.
3. foreground target according to claim 1 detects IP kernel, it is characterised in that:The IP kernel is entered in units of block of pixels
Row differentiates, differentiates that each block of pixels belongs to prospect or background;Each block of pixels N × N number of adjacent pixel on picture is constituted
, N is the natural number more than 1.
4. a kind of foreground target based on described in claim 1 detects the foreground target detection method of IP kernel, it is characterised in that:Bag
Include following steps:
Step S01:The gray scale generative circuit calculates image each picture according to the rgb signal of image successively according to time sequencing
The grey scale signal of element, LBP generative circuits generate the LBP values of each block of pixels according to the grey scale signal of pixel in each block of pixels,
And the LBP values of generation are buffered in background buffer circuit, it regard the first two field picture as background frames;
Step S02:Since the two field picture of video second, the prospect decision circuit is by the LBP values of current pixel block and the back of the body
The LBP values of correspondence position are contrasted in the background frames stored in scape buffer circuit, and whether be prospect, together if judging current pixel block
Shi Suoshu Coordinate generations circuit generates the coordinate of current pixel block according to row field sync signal, and by the coordinate of the block of pixels of generation
It is sent in frame in foreground pixel block counter;
Step S03:Result of determination of the foreground pixel block counter according to prospect decision circuit to current pixel block, coordinate in frame
The frame coordinate stored in the coordinate and frame coordinate registers of the current pixel block of generative circuit generation, counts each side
The foreground pixel block number of inframe;
Step S04:Described image supercircuit is according to before in frame coordinate registers, border color register and each frame
The number of scape block of pixels, the stacking side frame image on each frame original image, if foreground pixel block is not above threshold value, side in frame
Frame is not flashed, if foreground pixel block exceedes threshold value in frame, frame is alarmed in a flashing manner.
5. foreground target detection method according to claim 4, it is characterised in that:It is further comprising the steps of:It is described static
The ash of the previous frame image stored in the gray value for the current pixel that frame count circuit generates gray scale generative circuit and frame buffer
Angle value is contrasted, and judges whether present frame has moving target according to frame differential method, if continuous N frame is all not detected by motion mesh
Background buffer circuit can be write enable control signal and draw high a frame time by mark, frozen frozen mass counting circuit, then be dragged down, background caching
The LBP values of the background frames of middle storage can write enable control signal in background caching and draw high in the time of a frame by the LBP of present frame
Value is replaced, and realizes the renewal of background, M is natural number.
6. foreground target detection method according to claim 4, it is characterised in that:The foreground target detection method is with picture
Plain block is that unit is differentiated, differentiates that each block of pixels belongs to prospect or background;Each block of pixels is the N × N number of on picture
Adjacent pixel composition, N is the natural number more than 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410793059.0A CN104519240B (en) | 2014-12-20 | 2014-12-20 | The IP kernel and method of a kind of foreground target detection |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410793059.0A CN104519240B (en) | 2014-12-20 | 2014-12-20 | The IP kernel and method of a kind of foreground target detection |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104519240A CN104519240A (en) | 2015-04-15 |
CN104519240B true CN104519240B (en) | 2017-08-11 |
Family
ID=52793914
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410793059.0A Active CN104519240B (en) | 2014-12-20 | 2014-12-20 | The IP kernel and method of a kind of foreground target detection |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104519240B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107741231B (en) * | 2017-10-11 | 2020-11-27 | 福州大学 | Multi-moving-target rapid ranging method based on machine vision |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4758842B2 (en) * | 2006-01-26 | 2011-08-31 | 日本放送協会 | Video object trajectory image composition device, video object trajectory image display device, and program thereof |
CN102457724A (en) * | 2010-10-22 | 2012-05-16 | Tcl集团股份有限公司 | Image motion detecting system and method |
JP2013114605A (en) * | 2011-11-30 | 2013-06-10 | Canon Inc | Object detection device, control method of object detection device, and program |
WO2013125768A1 (en) * | 2012-02-21 | 2013-08-29 | 중앙대학교 산학협력단 | Apparatus and method for automatically detecting object and depth information of image photographed by image pickup device having multiple color filter aperture |
KR20140143918A (en) * | 2013-06-10 | 2014-12-18 | 에스케이텔레콤 주식회사 | Method and Apparatus for Detecting Foregroud Image with Separating Foregroud and Background in Image |
-
2014
- 2014-12-20 CN CN201410793059.0A patent/CN104519240B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4758842B2 (en) * | 2006-01-26 | 2011-08-31 | 日本放送協会 | Video object trajectory image composition device, video object trajectory image display device, and program thereof |
CN102457724A (en) * | 2010-10-22 | 2012-05-16 | Tcl集团股份有限公司 | Image motion detecting system and method |
JP2013114605A (en) * | 2011-11-30 | 2013-06-10 | Canon Inc | Object detection device, control method of object detection device, and program |
WO2013125768A1 (en) * | 2012-02-21 | 2013-08-29 | 중앙대학교 산학협력단 | Apparatus and method for automatically detecting object and depth information of image photographed by image pickup device having multiple color filter aperture |
KR20140143918A (en) * | 2013-06-10 | 2014-12-18 | 에스케이텔레콤 주식회사 | Method and Apparatus for Detecting Foregroud Image with Separating Foregroud and Background in Image |
Non-Patent Citations (3)
Title |
---|
Efficient LUT-based truncated multiplier and its application in RGB to YCbCr Color space conversion;Hoang V,Pham C;《IEICE Transaction on Fundamentals of Electronics》;20121231;第95卷(第6期);第999-1006页 * |
基于 FPGA 的红外图像实时采集系统设计与实现;郭永彩等;《仪器仪表学报》;20111231;第32卷(第3期);第515-519页 * |
静态背景下的运动目标检测算法;吴君钦等;《液晶与显示》;20121231;第27卷(第5期);第582-586页 * |
Also Published As
Publication number | Publication date |
---|---|
CN104519240A (en) | 2015-04-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6624629B2 (en) | Fish counting device, fish counting method, fish number prediction device, fish number prediction method, fish counting system and fish number prediction system | |
Yi et al. | Moving object detection based on running average background and temporal difference | |
CN107948465A (en) | A kind of method and apparatus for detecting camera and being disturbed | |
CN107239727A (en) | Gesture identification method and system | |
CN104766342A (en) | Moving target tracking system and speed measuring method based on temporal vision sensor | |
JP2010113335A (en) | Marker recognition method using dynamic threshold, and learning system based on enhancement reality utilizing the same | |
US9122632B2 (en) | Programmable power performance optimization for graphics cores | |
CN107301378A (en) | The pedestrian detection method and system of Multi-classifers integrated in image | |
CN117063205A (en) | Generating and modifying representations of dynamic objects in an artificial reality environment | |
CN104268840A (en) | Method for enhancing infrared image histogram redundancy elimination and gray level equal interval mapping | |
CN109035147B (en) | Image processing method and device, electronic device, storage medium and computer equipment | |
CN111294520B (en) | FPGA-based real-time lucky imaging method and system | |
US20220284621A1 (en) | Synthetic infrared image generation for machine learning of gaze estimation | |
JP2009140307A (en) | Person detector | |
CN103618888A (en) | Method and device for enhancing video image on basis of FPGA (Field Programmable Gata Array) | |
CN104519240B (en) | The IP kernel and method of a kind of foreground target detection | |
CN103347171B (en) | Based on greasy weather processing system for video and the method for DSP | |
TWI715157B (en) | System and method for maintaining a stable frame rate | |
CN104346778B (en) | The edge enhancing method and device and digital camera equipment of image | |
US20080273031A1 (en) | Page based rendering in 3D graphics system | |
JP2020109644A (en) | Fall detection method, fall detection apparatus, and electronic device | |
CN105608685B (en) | Secondary histogram equalization image enhancement method and system for histogram correction | |
CN107977983A (en) | A kind of ghost and static target suppressing method based on modified ViBe | |
CN104715456B (en) | A kind of defogging method of image | |
JP6991045B2 (en) | Image processing device, control method of image processing device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |