CN104506152B - Based on the anti-phase rail-to-rail operational amplifier of internal current - Google Patents
Based on the anti-phase rail-to-rail operational amplifier of internal current Download PDFInfo
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- CN104506152B CN104506152B CN201410822257.5A CN201410822257A CN104506152B CN 104506152 B CN104506152 B CN 104506152B CN 201410822257 A CN201410822257 A CN 201410822257A CN 104506152 B CN104506152 B CN 104506152B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/4521—Complementary long tailed pairs having parallel inputs and being supplied in parallel
- H03F3/45219—Folded cascode stages
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Abstract
The present invention provides a kind of rail-to-rail operational amplifier anti-phase based on internal current, including：Rail-to-rail input stage circuit, anti-phase circuit, class AB output-stage circuit, current mirror mirror image circuit, ascending current compensation circuit and centrifugal current compensation circuit；Current mirror mirror image circuit is used to provide bias current for rail-to-rail input stage circuit, anti-phase circuit and class AB output-stage circuit；Anti-phase circuit is used to the output current signal of rail-to-rail input stage circuit being supplied to class AB output-stage circuit after anti-phase processing, ascending current compensation circuit and centrifugal current compensation circuit are respectively used to input reduction of the complementary differential to pipe operating current when compensation input common mode electrical level is up or descending, and ascending current compensation circuit and centrifugal current compensation circuit are additionally operable to compensate the operating current of class AB output stage.The present invention has the advantages that rail-to-rail input and rail-to-rail output, and its operating efficiency and linearity of output signal are higher, and power consumption is relatively low.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of rail-to-rail computing anti-phase based on internal current
Amplifier.
Background technology
In recent years, with the reduction of ic manufacturing process characteristic size, its supply voltage used progressively declines, but
It is that device threshold voltage does not have corresponding reduction, the common mode input/output scope of operational amplifier is more and more narrow, it is difficult to meet existing
The demand in stage.Meanwhile, in portable electric appts, infrared focal plane read-out circuit, LED drive circuit, flat-panel monitor control
The fields such as circuit processed are more and more urgent to characteristic requirements such as the low-power consumption of integrated circuit operational amplifier, high efficiency, high-speeds, into
The target studied for numerous designers.
Rail-to-rail operational amplifier (rail-to-rail operational amplifier) can be realized high from power supply
The common mode of current potential to ground low potential is inputted, output area, general to input to pipe to realize that the rail of output stage is arrived using complementary differential
Rail is inputted, and the rail-to-rail output of output stage is realized using common source one-stage amplifier.But, the change of complementary differential input pipe mutual conductance
Compensation to frequency brings very big difficulty, and can cause system job insecurity；In addition, gain changes and changed with mutual conductance, also
Extra harmonic distortion can be introduced.Common source one-stage amplifier input common mode electrical level scope is smaller, and is difficult to adjust, its quiescent dissipation
Higher, operating efficiency is relatively low.
In order to solve the above problems, rail-to-rail input circuit must keep inputting constant, the conventional solution master of mutual conductance
To include 1:3 current mirroring circuits, bulk driven circuit, floating gate circuits etc., these schemes can increasing circuit power consumption, reduce
Operating rate.Rail-to-rail output circuit can effectively improve operating efficiency by using class AB (Class AB) output stage, drop
Low speed paper tape reader static power disspation, but its linearity of output signal is relatively low simultaneously, operating rate is difficult to improve.
As shown in figure 1, being a kind of rail-to-rail input stage circuit of the Permeate flow being operated under sub-threshold status in the prior art
Structure.The mutual conductance of metal-oxide-semiconductor and its electric current are directly proportional under sub-threshold status, stop when common mode input is up to PMOS differential pairs
During work, the current compensation circuit of M9, M8 and M7 composition is started working, by the current mirror in M5 into NMOS differential pairs, is protected
Input circuit total working electric current is held constant, so as to keep the mutual conductance of input stage constant.When common mode input, to go downwards to NMOS poor
When moving to being stopped, its operation principle is up similar to common-mode voltage.The current mirror circuit to the accuracy of repetition of electric current compared with
It is low, particularly to the metal-oxide-semiconductor of narrow raceway groove, because channel-length modulation influence is than larger, the replica current of mirror image circuit by
Influence to metal-oxide-semiconductor drain voltage is particularly evident, seriously reduces the accuracy of repetition of current mirror.Meanwhile, complementary differential is to pipe
Operating current is obtained by M5 and M6 by mirror image circuit, and its control to electric current is relatively low, and mutual conductance change is also very greatly.
As shown in Fig. 2 being a kind of rail-to-rail operational amplifier for having used class AB output-stage circuit in the prior art.Should
Amplifier uses class AB output stage as the output stage of amplifier, it is possible to achieve the rail-to-rail output of the operational amplifier, work effect
Rate is higher；And class AB output stage detect folded common source and common grid amplifier signal code, be easy to implement, its control accuracy compared with
It is high.The shortcoming of the circuit is mainly manifested in following two aspects：First, very greatly, harmonic wave loses for rail-to-rail input stage circuit mutual conductance change
It is very higher；2nd, class AB output stage output signal is obvious in the linearity reduction close to power supply and ground part, has a strong impact on rail and arrives
The use that rail is inputted and exported.
The content of the invention
Based on this, the present invention provides a kind of rail-to-rail operational amplifier anti-phase based on internal current, with rail-to-rail defeated
Enter and rail-to-rail output advantage, and its operating efficiency and linearity of output signal are higher, and power consumption is relatively low, meet low electricity at this stage
Requirement of the source voltage to larger common mode electrical level scope.
A kind of rail-to-rail operational amplifier anti-phase based on internal current, including：Rail-to-rail input stage circuit, anti-phase
Circuit, class AB output-stage circuit, current mirror mirror image circuit, ascending current compensation circuit and centrifugal current compensation circuit；
The current mirror mirror image circuit and the rail-to-rail input stage circuit, anti-phase circuit and class AB output stage electricity
Road is sequentially connected；The current mirror mirror image circuit is also connected with the anti-phase circuit and class AB output-stage circuit respectively；
The ascending current compensation circuit is connected with the rail-to-rail input stage circuit and the class AB output-stage circuit respectively；It is described
Centrifugal current compensation circuit is connected with the rail-to-rail input stage circuit and the class AB output-stage circuit respectively；
The current mirror mirror image circuit is used for for the rail-to-rail input stage circuit, anti-phase circuit and class AB output
Level circuit provides bias current；The anti-phase circuit is used to pass through the output current signal of the rail-to-rail input stage circuit
Cross and the class AB output-stage circuit is supplied to after anti-phase processing, the ascending current compensation circuit and centrifugal current compensation circuit
It is respectively used to input reduction of the complementary differential to pipe operating current when compensation input common mode electrical level is up or descending, it is described up
Current compensation circuit and centrifugal current compensation circuit are additionally operable to compensate the operating current of the class AB output stage.
The above-mentioned rail-to-rail operational amplifier anti-phase based on internal current, rail-to-rail input stage circuit, anti-phase circuit,
Class AB output-stage circuit provides bias current by current mirror mirror image circuit, and anti-phase circuit is by rail-to-rail input stage circuit
Output current signal is supplied to class AB output-stage circuit after anti-phase processing, passes through ascending current compensation circuit and downlink electrical
Reduction of the input complementary differential to pipe operating current when stream compensation circuit compensation input common mode electrical level is up or descending, so as to protect
The constant of operating current is held, the constant of the total mutual conductance of input is maintained；And electricity is compensated by ascending current compensation circuit and centrifugal current
Road compensates the operating current of class AB output stage, improves the linearity of class AB output-stage circuit output signal, and reduction harmonic wave loses
Very.
Brief description of the drawings
Fig. 1 is a kind of signal of the rail-to-rail input stage circuit of the Permeate flow being operated under sub-threshold status in the prior art
Figure.
Fig. 2 is a kind of schematic diagram for the rail-to-rail operational amplifier for having used class AB output-stage circuit in the prior art.
Structures of the Fig. 3 for the present invention based on the anti-phase rail-to-rail operational amplifier of internal current in the first embodiment is shown
It is intended to.
Structures of the Fig. 4 for the present invention based on the anti-phase rail-to-rail operational amplifier of internal current in this second embodiment is shown
It is intended to.
Embodiment
The present invention is described in further detail with reference to embodiment and accompanying drawing, but embodiments of the present invention are not limited to
This.
As shown in figure 3, be the present invention based on the anti-phase rail-to-rail operational amplifier of internal current in the first embodiment
Structural representation, thin arrow is control signal in figure, and block arrow is transmission signal；The circuit may include：Rail-to-rail input stage
Circuit, anti-phase circuit, class AB output-stage circuit, current mirror mirror image circuit, ascending current compensation circuit and centrifugal current
Compensation circuit；
The current mirror mirror image circuit and the rail-to-rail input stage circuit, anti-phase circuit and class AB output stage electricity
Road is sequentially connected；The current mirror mirror image circuit is also connected with the anti-phase circuit and class AB output-stage circuit respectively；
The ascending current compensation circuit is connected with the rail-to-rail input stage circuit and the class AB output-stage circuit respectively；It is described
Centrifugal current compensation circuit is connected with the rail-to-rail input stage circuit and the class AB output-stage circuit respectively；
The current mirror mirror image circuit is used for for the rail-to-rail input stage circuit, anti-phase circuit and class AB output
Level circuit provides bias current；The anti-phase circuit is used to pass through the output current signal of the rail-to-rail input stage circuit
Cross and the class AB output-stage circuit is supplied to after anti-phase processing, the ascending current compensation circuit and centrifugal current compensation circuit
It is respectively used to input reduction of the complementary differential to pipe operating current when compensation input common mode electrical level is up or descending, it is described up
Current compensation circuit and centrifugal current compensation circuit are additionally operable to compensate the operating current of the class AB output stage.
As shown in figure 4, be the present invention based on the anti-phase rail-to-rail operational amplifier of internal current in this second embodiment
Structural representation, in the present embodiment, the rail-to-rail input stage circuit be used for input signal common mode electrical level it is rail-to-rail
Input, it sets two input signal end Vin+ and Vin-, including PMOS complementary differentials have to, NMOS complementary differentials to, NMOS
Ource electric current mirror, PMOS active electric current mirrors；The PMOS differential pairs and NMOS complementary differentials are to being all operated in sub-threshold region；
After PMOS M1 in PMOS differential pairs is connected with PMOS M2 source electrode, respectively with the current mirror mirror image circuit
It is connected with centrifugal current compensation circuit；
After the NMOS tube M3 of NMOS complementary differentials pair is connected with NMOS tube M4 source electrode, respectively with current mirror mirror image electricity
Road is connected with ascending current compensation circuit；
PMOS M1 grid is connected with NMOS tube M3 grid, constitutes the input in the same direction of the rail-to-rail input stage circuit
End, PMOS M2 grid is connected with NMOS tube M4 grid constitutes the reverse input end of rail-to-rail input stage circuit；
NMOS active electric current mirror M5 and NMOS active electric current mirrors M6 source electrode meets power vd D；
PMOS active electric current mirror M7 and PMOS active electric current mirrors M8 source ground GND；
PMOS M1 drain electrode and NMOS tube M7 drain electrode and grid concurrent；
NMOS tube M3 drain electrode and PMOS M5 drain electrode and grid concurrent；
PMOS M2 drain electrode is commonly connected to the anti-phase circuit with NMOS tube M4 drain electrode；
PMOS M6 grid and PMOS M5 grid and drain electrode concurrent, it drains and the anti-phase circuit phase
Even；
NMOS tube M8 grid and NMOS tube M7 grid and drain electrode concurrent, it drains and the anti-phase circuit phase
Even.
In a preferred embodiment, the anti-phase circuit is used for the output current of the rail-to-rail input stage circuit
Signal carries out anti-phase processing, including six metal-oxide-semiconductors of M9 to M14：
Drain electrode concurrent of the NMOS tube M9 grid and drain electrode with the PMOS M6 in the rail-to-rail input stage circuit,
Drain electrode concurrent of the PMOS M10 grid and drain electrode with the NMOS tube M8 in the rail-to-rail input stage circuit, for detecting
The change of rail-to-rail input stage circuit output current；
NMOS tube M11 and NMOS tube M9 constitutes mirror image circuit, NMOS tube M11 grid and NMOS tube M9 grid concurrent；
PMOS M12 and PMOS M10 constitutes mirror image circuit, PMOS M12 grid and PMOS M10 grid concurrent；NMOS tube
M11 source electrode and PMOS M12 source electrode concurrent, NMOS tube M11 drain electrode and PMOS M12 drain electrode connect the electricity respectively
Flow mirror mirror image circuit；
After NMOS tube M13 source electrode is connected with PMOS M14 source electrode, it is total to NMOS tube M11 and PMOS M12 source electrode
Point；The electricity is connected respectively after NMOS tube M13 grid and drain electrode concurrent, and grid and the concurrent that drains with PMOS M14
Flow mirror mirror image circuit, NMOS tube M13 and PMOS M14 grid as the anti-phase circuit two output ends.
The main function of the class AB output-stage circuit is the rail-to-rail output for realizing output signal, and its output end is
Vout, including ten metal-oxide-semiconductors of M15 to M24, as shown in Figure 4：
The grid and drain electrode concurrent of NMOS tube M15 and PMOS M16 grid respectively with NMOS tube M13 and PMOS M14,
Leakage current for distinguishing mirror image NMOS tube M13 and PMOS M114；
NMOS tube M15 drain electrode meets power vd D, the source electrode concurrent of its source electrode and PMOS M19；
The M18 of PMOS M16 grounded drain GND, its source electrode and NMOS tube source electrode concurrent；
PMOS M19, its grid and PMOS M22 grid and drain electrode concurrent, its drain drain electrode with NMOS tube M20 and
Grid concurrent；
NMOS tube M20 source ground GND, its grid and drain electrode and NMOS tube M24 grid concurrent；
NMOS tube M18 grid and NMOS tube M21 grid and drain electrode concurrent, its drain drain electrode with PMOS M17 and
Grid concurrent；
PMOS M17 source electrode meets power vd D, its grid and drain electrode and PMOS M23 grid concurrent；
NMOS tube M21 drain electrode is followed by the ascending current compensation circuit and current mirror mirror image circuit with grid concurrent；
PMOS M22 drain electrode is followed by the centrifugal current compensation circuit and current mirror mirror image circuit with grid concurrent；
PMOS M23 source electrode meets power vd D, NMOS tube M24 source ground GND, PMOS M23 and NMOS tube M24
Drain electrode be connected after be output port Vout.
In a preferred embodiment, the current mirror mirror image circuit provides bias current for the work of other each each circuits,
Including M25 to M43 totally ten nine metal-oxide-semiconductors, using typical common-source common-gate current mirror structure：
By NMOS tube M28 and NMOS tube M27,1 constituted with NMOS tube M25 and NMOS tube M26:1 current mirror, for that will join
Examine electric current IrefIt is accurately reproduced in PMOS M30 and PMOS M31；
By PMOS M30 and PMOS M31,1 constituted with PMOS M33 and PMOS M32:K1Current mirror, for by K1
Reference current I againrefCopy in PMOS M32 and PMOS M33；Wherein, K1Ratio is replicated for default first；
By PMOS M31 and PMOS M30,1 constituted with PMOS M36 and M37:2K2Current mirror, for by 2K2Times
IrefCopy in PMOS M42 and PMOS M43；Wherein, K2Ratio is replicated for default second；
By PMOS M31 and PMOS M30,1 constituted with PMOS M42 and PMOS M43:K2Current mirror, for by K2
I againrefCopy in PMOS M42 and PMOS M43；
By NMOS tube M25 and NMOS tube M26,1 constituted with NMOS tube M34 and NMOS tube M35:K1Current mirror, for by K1
I againrefCopy in NMOS tube M34 and NMOS tube M35；
By NMOS tube M25 and NMOS tube M26,1 constituted with NMOS tube M38 and NMOS tube M39:2K2Current mirror, for inciting somebody to action
2K2I againrefCopy in NMOS tube M38 and NMOS tube M39；
By NMOS tube M25 and NMOS tube M26,1 constituted with NMOS tube M40 and NMOS tube M41:K2Current mirror, for by K2
I againrefCopy in NMOS tube M40 and NMOS tube M41；
Wherein, the drain electrode of PMOS M33 drain electrode and NMOS tube M21 drain and gate concurrent, and NMOS tube M34 is passed through
With PMOS M22 drain and gate concurrent, K1I againrefElectric current is used for the current offset of the class AB output-stage circuit；
Pass through PMOS M37 drain electrode and NMOS tube M11 and NMOS tube M12 grid and drain electrode concurrent, and NMOS tube M38
Drain electrode and PMOS M12 and M14 drain electrode concurrent, 2K2Electric current again is used for the biasing of the anti-phase circuit；
Be connected by PMOS M43 drain electrode with PMOS M1 and PMOS M2 source electrode, and NMOS tube M40 drain electrode with
NMOS tube M3 is connected with NMOS tube M4 source electrode, K2I againrefElectric current is used for the bias current of the rail-to-rail output-stage circuit；
PMOS M29 is used for voltage shifts, makes PMOS M30 and NMOS tube M28 drain electrode maintain to stablize relatively.
In a preferred embodiment, the ascending current compensation circuit is used for when input common mode electrical level goes upward to the PMOS
When complementary differential is to being stopped, by the operating current 1 in PMOS M42 and metal-oxide-semiconductor M43:1 copies as NMOS complementary differentials pair
In M3 and M4, keep total working electric current constant, including M44 to M50 totally seven metal-oxide-semiconductors：
PMOS M44, its grid is controlled by biasing Vb1, the onset voltage for adjusting ascending current compensation circuit,
The source electrode concurrent of its source electrode and PMOS M43 drain electrode, PMOS M1 source electrode and PMOS M2, its drain electrode is connected to by NMOS
Pipe M45, NMOS tube M46, NMOS tube M47 and NMOS tube M48 constitute 1:1 common-source common-gate current mirror, and by NMOS tube M47 leakage
Pole is connected with NMOS tube M3 and NMOS tube M4 source electrode, and replica current is compensated into the work electricity for NMOS tube M3 and NMOS tube M4
Stream；
By NMOS tube M49 and NMOS tube M50, the K constituted with NMOS tube M45 and NMOS tube M463:1 cascode current
Mirror, for by the K in NMOS tube M45 and NMOS tube M463Times current replication is into PMOS M49 and PMOS M50, for carrying
The linearity of output signal when high class AB output-stage circuit input signal is up.
In a preferred embodiment, the centrifugal current compensation circuit is used for when input common mode electrical level comes downwards to the NMOS
When complementary differential is to being stopped, by the operating current 1 in NMOS tube M41 and NMOS tube M40:1 copies to the PMOS complementations
In differential pair, keep total working electric current constant, including M51 to M57 totally seven metal-oxide-semiconductors：
NMOS tube M55, its grid is controlled by biasing Vb2, the onset voltage for adjusting centrifugal current compensation circuit；
The source electrode concurrent of its source electrode and NMOS tube M40 drain electrode, NMOS tube M3 source electrode and NMOS tube M4；Its drain electrode is connected to by PMOS
Pipe M53 and PMOS M54,1 constituted with PMOS M51 and PMOS M52:1 common-source common-gate current mirror, and by PMOS M52
Drain electrode be connected with PMOS M1 source electrode and PMOS M2 source electrode, by replica current compensation be PMOS M1 and PMOS M2
Operating current；
By PMOS M56 and PMOS M57, the K constituted with PMOS M53 and PMOS M543:1 cascode current
Mirror, for by the K in PMOS M53 and PMOS M543Times current replication is into PMOS M56 and PMOS M57, for carrying
The linearity of output signal when high class AB output-stage circuit input signal is descending；Wherein, K3Ratio is replicated for the default 3rd.
Next the operation principle of the invention based on the anti-phase rail-to-rail operational amplifier of internal current is illustrated：
PMOS the and NMOS complementary differentials of the rail-to-rail input stage circuit of the circuit are to being operated in sub-threshold status.Subthreshold value
The mutual conductance of metal-oxide-semiconductor is represented by under zone state：
Wherein, IDrainFor the drain current of metal-oxide-semiconductor, n is the sub-threshold slope factor, VtFor calorific potential voltage, CoxFor unit face
Product mountain oxidation layer capacitance, CdepFor unit area depletion region capacitance, k is Boltzmann constant, and T is absolute temperature, and q is electronics electricity
Amount.The MOS mutual conductances for understanding sub-threshold region by (1) (2) (3) are determined by metal-oxide-semiconductor drain circuit, as long as therefore guarantee PMOS and NMOS
Complementary differential is constant to total operating current, and its mutual conductance can keep invariable.
As shown in Figure 4, the total mutual conductance of rail-to-rail input stage circuit is：
In formula, IP,tailFor tail current of the PMOS complementary differentials to pipe, IN,tailFor tail current of the NMOS complementary differentials to pipe,
It is K2Iref.If by I when PMOS complementary differentials are stopped to pipeP,tailCompensate IN,tail, or NMOS complementary differentials pair
By I when pipe is stoppedN,tailCompensate IP,tail, it is possible to the constant of rail-to-rail input stage circuit mutual conductance is maintained, its total mutual conductance
Just it is represented by：
In formula, K2For the duplication ratio of common-source common-gate current mirror, IrefFor reference current.Therefore, the course of work of the circuit
Common mode incoming level can be divided into, and closely VDD/2, common mode incoming level be up, descending three parts of common mode incoming level.
(1) when inputting common mode electrical level closely VDD/2, PMOS complementary differentials are to M1 and M2 and NMOS complementary differentials pair
The equal normal works of M3 and M4, ascending current compensation circuit and centrifugal current compensation circuit are in closed mode, and total mutual conductance is
PMOS with NMOS complementary differentials are added to pipe mutual conductance, and its total transconductance value K is obtained by (4) formula2Iref/nVt。
(2) when common mode input goes upward to PMOS complementary differentials, and M1 and M2 are stopped, ascending current compensation electricity
Road is started working, and by the operating current that the current compensation in PMOS M42 and M43 is NMOS complementary differentials pair, now NMOS is mutual
Mend the K that the total operating current of differential pair is 2 times2Iref, it is K to obtain its total transconductance value by (5)2Iref/nVt, with two pairs of differential complementary pairs
It is consistent pipe works simultaneously when, maintain the constant of mutual conductance.
Meanwhile, the K obtained by NMOS tube M49 and M50 mirror image3Current compensation is compensated again to class AB output-stage circuit
M22 drain electrode, forms the Current Negative Three-Point Capacitance loop for being input to output, prevents that M20 enters subthreshold in higher common mode input
It is worth area, so as to effectively increase the linearity of output signal.
(3) when common mode input comes downwards to NMOS complementary differentials to being stopped, centrifugal current compensation circuit starts
Work, by the operating current that the current compensation in NMOS tube M40 and M41 is PMOS complementary differentials pair, now NMOS complementary differentials
To the K that total operating current is 2 times2Iref, its total transconductance value is K2Iref/nVt, it is maintained at steady state.Centrifugal current compensation electricity
The negative feedback type that road is formed is similar to ascending current compensation circuit, prevents M17 from entering sub-threshold status.
The workflow of whole circuit is as shown in Figure 3：Rail-to-rail input stage circuit, anti-phase circuit, class AB output
Level circuit provides bias current by current mirror mirror image circuit, and anti-phase circuit is by metal-oxide-semiconductor M9 and M10 by rail-to-rail input stage
The output current signal of circuit is supplied to class AB output-stage circuit after anti-phase processing, by ascending current compensation circuit and
Reduction of the input complementary differential to pipe operating current when centrifugal current compensation circuit compensation input common mode electrical level is up or descending,
So as to keep the constant of operating current, the constant of the total mutual conductance of input is maintained；And pass through ascending current compensation circuit and centrifugal current
Compensation circuit compensates the operating current of class AB output stage, improves the linearity of class AB output-stage circuit output signal, reduction
Harmonic distortion.
The rail-to-rail operational amplifier anti-phase based on internal current of the present embodiment, the circuit can be operated in low power supply electricity
Pressure, it is inputted and output can reach power supply to the rail-to-rail voltage range on ground, and smaller, simulation result table is fluctuated in mutual conductance
Bright, under 3.3V supply voltages, when common mode input is increased to 3.3V from 0V, its mutual conductance fluctuation is less than 2.5%.This implementation
The circuit of example effectively increases the linearity of output signal, reduced by the way that compensation electric current is introduced into class AB output-stage circuit
Harmonic distortion.
Embodiment described above only expresses the several embodiments of the present invention, and it describes more specific and detailed, but simultaneously
Therefore the limitation to the scope of the claims of the present invention can not be interpreted as.It should be pointed out that for one of ordinary skill in the art
For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the guarantor of the present invention
Protect scope.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.
Claims (5)
1. a kind of rail-to-rail operational amplifier anti-phase based on internal current, it is characterised in that including：Rail-to-rail input stage electricity
Road, anti-phase circuit, class AB output-stage circuit, current mirror mirror image circuit, ascending current compensation circuit and centrifugal current are mended
Repay circuit；
The current mirror mirror image circuit and the rail-to-rail input stage circuit, anti-phase circuit and class AB output-stage circuit according to
Secondary connection；The current mirror mirror image circuit is also connected with the anti-phase circuit and class AB output-stage circuit respectively；It is described
Ascending current compensation circuit is connected with the rail-to-rail input stage circuit and the class AB output-stage circuit respectively；It is described descending
Current compensation circuit is connected with the rail-to-rail input stage circuit and the class AB output-stage circuit respectively；
The current mirror mirror image circuit is used for for the rail-to-rail input stage circuit, anti-phase circuit and class AB output stage electricity
Road provides bias current；The anti-phase circuit is used for the output current signal of the rail-to-rail input stage circuit by anti-
The class AB output-stage circuit, ascending current compensation circuit and centrifugal current the compensation circuit difference are supplied to after phase processor
For the compensation input common mode electrical level reduction of input complementary differential to pipe operating current, the ascending current when up or descending
Compensation circuit and centrifugal current compensation circuit are additionally operable to compensate the operating current of the class AB output stage；
The rail-to-rail input stage circuit is used for the rail-to-rail input of input signal common mode electrical level, and it sets two input signals
End, including PMOS complementary differentials to, NMOS complementary differentials to, NMOS active electric currents mirror, PMOS active electric current mirrors；The PMOS is poor
Dynamic pair with NMOS complementary differentials to being all operated in sub-threshold region；
After PMOS M1 in PMOS differential pairs is connected with PMOS M2 source electrode, respectively with the current mirror mirror image circuit and under
Row current compensation circuit is connected；
After the NMOS tube M3 of NMOS complementary differentials pair is connected with NMOS tube M4 source electrode, respectively with the current mirror mirror image circuit and
Ascending current compensation circuit is connected；
PMOS M1 grid is connected with NMOS tube M3 grid, constitutes the input in the same direction of the rail-to-rail input stage circuit,
PMOS M2 grid is connected with NMOS tube M4 grid constitutes the reverse input end of rail-to-rail input stage circuit；
NMOS active electric current mirror M5 and NMOS active electric current mirrors M6 source electrode meets power vd D；
PMOS active electric current mirror M7 and PMOS active electric current mirrors M8 source ground GND；
PMOS M1 drain electrode and NMOS tube M7 drain electrode and grid concurrent；
NMOS tube M3 drain electrode and PMOS M5 drain electrode and grid concurrent；
PMOS M2 drain electrode is commonly connected to the anti-phase circuit with NMOS tube M4 drain electrode；
PMOS M6 grid is connected with PMOS M5 grid and drain electrode concurrent, its drain electrode with the anti-phase circuit；
NMOS tube M8 grid is connected with NMOS tube M7 grid and drain electrode concurrent, its drain electrode with the anti-phase circuit.
2. the rail-to-rail operational amplifier anti-phase based on internal current according to claim 1, it is characterised in that the electricity
Flowing negative circuit is used to the output current signal of the rail-to-rail input stage circuit carrying out anti-phase processing, including：
Drain electrode concurrent of the NMOS tube M9 grid and drain electrode with the PMOS M6 in the rail-to-rail input stage circuit, PMOS
Drain electrode concurrent of the M10 grid and drain electrode with the NMOS tube M8 in the rail-to-rail input stage circuit, it is rail-to-rail for detecting
The change of input stage circuit output current；
NMOS tube M11 and NMOS tube M9 constitutes mirror image circuit, NMOS tube M11 grid and NMOS tube M9 grid concurrent；PMOS
Pipe M12 and PMOS M10 constitutes mirror image circuit, PMOS M12 grid and PMOS M10 grid concurrent；NMOS tube M11's
The source electrode concurrent of source electrode and PMOS M12, NMOS tube M11 drain electrode and PMOS M12 drain electrode connect the current mirror respectively
Mirror image circuit；
After NMOS tube M13 source electrode is connected with PMOS M14 source electrode, the source electrode concurrent with NMOS tube M11 and PMOS M12；
NMOS tube M13 grid and drain electrode concurrent, PMOS M14 grid and drain electrode concurrent, M13 drain electrode and M14 drain electrode are distinguished
Connect the current mirror mirror image circuit, NMOS tube M13 and PMOS M14 grid is defeated as two of the anti-phase circuit
Go out end.
3. the rail-to-rail operational amplifier anti-phase based on internal current according to claim 2, it is characterised in that its feature
It is, the current mirror mirror image circuit includes：
By NMOS tube M28 and NMOS tube M27,1 constituted with NMOS tube M25 and NMOS tube M26:1 current mirror, for electricity will to be referred to
Flow IrefIt is accurately reproduced in PMOS M30 and PMOS M31；
By PMOS M30 and PMOS M31,1 constituted with PMOS M33 and PMOS M32:K1Current mirror, for by K1Times
IrefCopy in PMOS M32 and PMOS M33；Wherein, IrefFor default reference current, K1For default first reproduction ratio
Example；
By PMOS M31 and PMOS M30,1 constituted with PMOS M36 and M37:2K2Current mirror, for by 2K2I againref
Copy in PMOS M36 and PMOS M37；Wherein, K2Ratio is replicated for default second；
By PMOS M31 and PMOS M30,1 constituted with PMOS M42 and PMOS M43:K2Current mirror, for by K2Times
IrefCopy in PMOS M42 and PMOS M43；
By NMOS tube M25 and NMOS tube M26,1 constituted with NMOS tube M34 and NMOS tube M35:K1Current mirror, for by K1Times
IrefCopy in NMOS tube M34 and NMOS tube M35；
By NMOS tube M25 and NMOS tube M26,1 constituted with NMOS tube M38 and NMOS tube M39:2K2Current mirror, for by 2K2Times
IrefCopy in NMOS tube M38 and NMOS tube M39；
By NMOS tube M25 and NMOS tube M26,1 constituted with NMOS tube M40 and NMOS tube M41:K2Current mirror, for by K2Times
IrefCopy in NMOS tube M40 and NMOS tube M41；
Wherein, by PMOS M33 drain electrode and NMOS tube M21 drain and gate concurrent, and NMOS tube M34 drain electrode with
PMOS M22 drain and gate concurrent, K1I againrefElectric current is used for the current offset of the class AB output-stage circuit；
Pass through the leakage of PMOS M37 drain electrode and NMOS tube M11 and NMOS tube M12 grid and drain electrode concurrent, and NMOS tube M38
Pole and PMOS M12 and M14 drain electrode concurrent, 2K2Electric current again is used for the biasing of the anti-phase circuit；
Be connected by PMOS M43 drain electrode with PMOS M1 and PMOS M2 source electrode, and NMOS tube M40 drain electrode and NMOS
Pipe M3 is connected with NMOS tube M4 source electrode, K2I againrefElectric current is used for the bias current of the rail-to-rail output-stage circuit.
4. the rail-to-rail operational amplifier anti-phase based on internal current according to claim 3, it is characterised in that on described
Row current compensation circuit is used for when input common mode electrical level goes upward to the PMOS complementary differentials to being stopped, by PMOS
Operating current 1 in M42 and metal-oxide-semiconductor M43:1 copies as NMOS complementary differentials in M3 and M4, including：
PMOS M44, its grid is controlled by biasing Vb1, the onset voltage for adjusting ascending current compensation circuit, its source
Pole and PMOS M43 drain electrode, PMOS M1 source electrode and PMOS M2 source electrode concurrent, its drain electrode are connected to by NMOS tube
M45, NMOS tube M46, NMOS tube M47 and NMOS tube M48 constitute 1:1 common-source common-gate current mirror, and by NMOS tube M47 drain electrode
It is connected with NMOS tube M3 and NMOS tube M4 source electrode, replica current is compensated into the operating current for NMOS tube M3 and NMOS tube M4；
By NMOS tube M49 and NMOS tube M50, the K constituted with NMOS tube M45 and NMOS tube M463:1 common-source common-gate current mirror, is used for
By the K in NMOS tube M45 and NMOS tube M463Times current replication is into PMOS M49 and PMOS M50；Wherein K3To be default
3rd replicates ratio.
5. the rail-to-rail operational amplifier anti-phase based on internal current according to claim 4, it is characterised in that under described
Row current compensation circuit is used for when input common mode electrical level comes downwards to the NMOS complementary differentials to being stopped, by NMOS tube
Operating current 1 in M41 and NMOS tube M40:1 copies to the PMOS complementary differentials centering, including：
NMOS tube M55, its grid is controlled by biasing Vb2, the onset voltage for adjusting centrifugal current compensation circuit；Its source
Pole and NMOS tube M40 drain electrode, NMOS tube M3 source electrode and NMOS tube M4 source electrode concurrent；Its drain electrode is connected to by PMOS
M53 and PMOS M54,1 constituted with PMOS M51 and PMOS M52:1 common-source common-gate current mirror, and by PMOS M52's
Drain electrode is connected with PMOS M1 source electrode and PMOS M2 source electrode, and replica current is compensated as PMOS M1's and PMOS M2
Operating current；
By PMOS M56 and PMOS M57, the K constituted with PMOS M53 and PMOS M543:1 common-source common-gate current mirror, is used for
By the K in PMOS M53 and PMOS M543Times current replication is into PMOS M56 and PMOS M57.
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| CN201410822257.5A CN104506152B (en) | 2014-12-23 | 2014-12-23 | Based on the anti-phase rail-to-rail operational amplifier of internal current |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1071205A2 (en) * | 1999-07-22 | 2001-01-24 | Burr-Brown Corporation | Rail-to-rail input/output operational amplifier and method |
| US6433637B1 (en) * | 2001-03-23 | 2002-08-13 | National Semiconductor Corporation | Single cell rail-to-rail input/output operational amplifier |
| TW567661B (en) * | 2001-09-26 | 2003-12-21 | Richtek Technology Corp | Rail-to-rail AB output series circuit |
| CN100481718C (en) * | 2003-10-13 | 2009-04-22 | 三星电子株式会社 | AB rail-to-rail operational amplifier |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI321901B (en) * | 2006-11-10 | 2010-03-11 | Orise Technology Co Ltd | Rail-to-rail class-ab operational amplifier |
-
2014
- 2014-12-23 CN CN201410822257.5A patent/CN104506152B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1071205A2 (en) * | 1999-07-22 | 2001-01-24 | Burr-Brown Corporation | Rail-to-rail input/output operational amplifier and method |
| US6433637B1 (en) * | 2001-03-23 | 2002-08-13 | National Semiconductor Corporation | Single cell rail-to-rail input/output operational amplifier |
| TW567661B (en) * | 2001-09-26 | 2003-12-21 | Richtek Technology Corp | Rail-to-rail AB output series circuit |
| CN100481718C (en) * | 2003-10-13 | 2009-04-22 | 三星电子株式会社 | AB rail-to-rail operational amplifier |
Non-Patent Citations (4)
| Title |
|---|
| 一种低压功耗CMOS轨对轨运算放大器的设计;傅锐飞;《中国优秀硕士学位论文全文数据库信息科技辑》;20091115;I135-311 * |
| 一种恒跨导CMOS运算放大器的设计;王怡倢等;《现代电子技术》;20110315;第34卷(第6期);141-142 * |
| 低压恒跨导增益提高CMOS运算放大器的设计;周欢欢等;《半导体集成电路》;20130930;第38卷(第9期);651-655 * |
| 叶俊等.一种适合VLSI库的Rail-to-Rail运算放大器.《固体电子学研究与进展》.2002,第22卷(第1期),107-113. * |
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