CN104485639A - Motor power drive protection circuit - Google Patents

Abstract

The invention relates to a motor power drive protection circuit. A logic control unit is arranged between a servo controller and a driving power amplifier and is used for outputting a channel power amplification enable signal according to the operation state of a motor and the operation state of software in the servo controller, when the motor operates in a limit area of motor drive software, the logic control unit outputs an invalid signal, and the driving power amplifier is enabled to work normally; when the motor operates out of the limit area of the motor drive software, the logic control unit outputs a valid signal, the driving power amplifier is switched off, and the motor stops operating; when a PMW signal of the output end of the output end of the servo controller is in a high level or low level, the logic control unit outputs a valid signal, the driving power amplifier is switched off, and the motor stops operating. According to the motor power drive protection circuit, the operation safety of a control system can be improved remarkably, commissioning simulation and the download burning cost of the control system are effectively reduced, the commissioning efficiency is improved, and the system reliability is enhanced.

Description

Power of motor Drive Protecting Circuit

Technical field

The present invention relates to a kind of power of motor Drive Protecting Circuit, belong to motor and drive resist technology field.

Background technology

In the design of some control system motor drive schemes, for occurring large inertia resistance square, and external disturbance moment, as larger in control object moment of inertia when multisensor loads altogether such as photoelectronic reconnaissance platforms, and run into the practical application such as larger moment of wind resistance in-flight in carrier aircraft, motor drive schemes design must select the motor compared with high nominal powers, and bring system starting current and the larger problem of peak current at locked-rotor thus, even can reach tens peaces, and unexpected startup is unavoidably according to host computer input state command motor in system operation, the motion state of parking or plugging, cause large rush of current thus, very unfavorable to control loop, very easily cause burning of power amplifier, motor rotation blockage damages, the reliability of system reduces.

At present, at home and abroad the power amplifier with prohibiting function is generally applied in existing motor driving power amplifying technique field, the general current of electric sample differential that adopts amplifies more, coordinate hardware comparison circuit acquisition logic control signal to give power amplifier and forbid end, the blockade realizing power amplifier A, B bridge PWM output signal switches.

But by the application attestation of engineering practice, there is risk in above-mentioned technology.First system peak locked rotor current occurs or in plug braking situation, the abnormal big current that produces is close to the peak current of selected power amplifier module, and puncturing easily appears in transistor; Secondly, when power amplifier protection turns off, the switching frequency of hardware logic voltage comparator circuit is too high, constantly occur opening shutoff when systems stay overcurrent, switching frequency is up to power amplifier inside triode, Darlington transistor, power tube recommended frequency more than four times, switching loss raises, local temperature rise is excessive, very easily causes triode and Darlington transistor to burn; In addition, when servo-control system is debugged, dsp processor program erase again programming download time, generally all need to disconnect power amplifier working power in advance, otherwise, the power amplifier pwm pulse input signal that during software programming, DSP exports can be uncertain out of control, and under power amplifier powers normal situation, actuating motor exists the excessive risk flying to turn.

Summary of the invention

The object of this invention is to provide a kind of power of motor Drive Protecting Circuit; fragile to solve the power amplifier that existing power amplifier adopts current of electric sample differential to control to cause, and cannot the effective switch-off power amplifier risk that cause motor to fly turn when servo control software is debugged.

Technical scheme of the present invention is: a kind of power of motor Drive Protecting Circuit, comprise servo controller, light-coupled isolation unit and Driver amplifier, the pwm signal of servo controller output accesses the input of Driver amplifier by light-coupled isolation unit, the output of power amplifier drives and connects motor, Driver amplifier is with forbidding Enable Pin, it is characterized in that, described Drive Protecting Circuit also comprises logic control element, this logic control element is used for the running status output channel power amplifier enable signal according to software in the running status of motor and servo controller, with Driver amplifier forbid that Enable Pin is connected,

When motor operates in motor drive software stop zone, logic control element exports invalid signals, and what make Driver amplifier forbids that Enable Pin is invalid, and Driver amplifier normally works;

When motor operation exceeds motor drive software stop zone, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, and turn off Driver amplifier, motor shuts down;

When the pwm signal of servo controller output is in high level or low level, namely, when in servo controller, software is in abnormal operational conditions, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, turn off Driver amplifier, motor shuts down.

It is described when motor operation exceeds motor drive software stop zone, after motor shuts down, servomotor controller output channel reset signal, logic control element exports invalid signals according to this channel reset signal, what make Driver amplifier forbids that Enable Pin is invalid, and Driver amplifier normally works.

Described logic control element comprises trigger and logical circuit, logical circuit adopts NAND Logic computing, the input of logical circuit and the passage of servo controller output put in place signal LF_LIMIT, passage puts in place signal RT_LIMIT and enable signal, to put in place the NAND operation of signal RT_LIMIT and enable signal for realizing put in place signal LF_LIMIT and enable signal and passage of passage, the output of described logical circuit is connected to trailing edge input and the zero setting input of trigger, the rising edge input of described trigger is connected with the pwm signal of servo controller output, with Driver amplifier, the output of described trigger forbids that Enable Pin is connected.

Described logical circuit comprises inverter and OR circuit, input and the passage of servo controller output of described inverter put in place signal RT_LIMIT and the enable signal of signal LF_LIMIT, passage that put in place is connected, the output of inverter is connected with the input of OR circuit, OR circuit is used for carrying out or computing anti-phase rear passage put in place signal RT_LIMIT and the enable signal of signal LF_LIMIT and enable signal and passage that put in place, and two outputs of OR circuit are connected with the trailing edge input of trigger and zero setting input.

Described logic control element also comprises the configuration circuit be connected with trigger, and this configuration circuit comprises resistance-capacitance network resistance, resistance-capacitance network electric capacity and adjustable resistance, and the resistance-capacitance network resistance of described configuration circuit is R _ext, resistance-capacitance network electric capacity is C _ext, be T by the work period of this configuration circuit institute configuration flip-flops _w=0.45Rext*Cext, and T _wbe more than or equal to the cycle T of the pwm signal of servo controller output _pWM.

The output of described trigger is by adjustable resistance ground connection, and the adjustable side of this adjustable resistance is channel function enable signal end, with Driver amplifier forbid that Enable Pin is connected, the startup of control Driver amplifier.

Described trigger is two Retargetable compiler monostable flipflop 54HCT123.

Described inverter adopts integrated circuit hex inverter 54HCT04.

Described OR circuit adopts integrated circuit or door 54HCT32.

The invention has the beneficial effects as follows: the present invention by arranging logic control element between servo controller and Driver amplifier, for the running status output channel power amplifier enable signal according to software in the running status of motor and servo controller, with Driver amplifier forbid that Enable Pin is connected, when motor operates in motor drive software stop zone, logic control element exports invalid signals, what make Driver amplifier forbids that Enable Pin is invalid, and Driver amplifier normally works; When motor operation exceeds motor drive software stop zone, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, and turn off Driver amplifier, motor shuts down; When the pwm signal of servo controller output is in high level or low level, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, and turn off Driver amplifier, motor shuts down.The present invention can significantly improve control system power amplifier safety in operation, and effectively reduces control system debugging emulation and download programming cost, improves debugging efficiency, strengthens system reliability.

Accompanying drawing explanation

Fig. 1 is the circuit theory of constitution figure of logic control element in the embodiment of the present invention;

Fig. 2 is the theory diagram of power of motor Drive Protecting Circuit in the embodiment of the present invention;

Fig. 3 is motor finite angle movement locus schematic diagram.

Embodiment

Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described.

The present invention is directed the PWM with prohibiting function can switch-off power amplifier, for can switch-off power amplifier realization able to programme is provided or inhibit signal that feedback control circuit realizes, make control system at SERVO CONTROL program fleet, dsp processor program erase again programming download time, in dsp processor debugging in-circuit emulation compilation process, motor software control start and stop, motor rotation is to mechanical position limitation distance braking, motor drive software stop zone puts in place braking, after electric machine spacing braking in the various situations such as opposite direction restarts, possess power of motor and drive start and stop protective capability, available protecting power amplifier and actuating motor.

Servo controller can control two-way and above motor simultaneously, state with the enforcement use-case that is produced as of 2 tunnel enable logic control signals below, be respectively used to produce Ch1 motor power amplifier on off control signal, Ch2 motor power amplifier on off control signal, Ch1 and Ch2 here can make a general reference 2 actuating motor power amplifier through paths of independent operation in servo-control system.Servo controller comprises 1 PMW pulse-width signal PWM_Ch1 for the signal that CH1 motor produces, 1 signal LF_LIMIT that puts in place, 1 signal RT_LIMIT that puts in place, 1 enable/reset signal EN1,1 PMW pulse-width signal PWM_Ch2 is comprised to the signal that CH2 motor produces, 1 signal UP_LIMIT that puts in place, 1 signal DOWN_LIMIT that puts in place, 1 enable/reset signal EN2.

Power of motor Drive Protecting Circuit of the present invention as shown in Figure 2, comprise servo controller, light-coupled isolation unit, logic control element and Driver amplifier, the pwm signal of servo controller output accesses the input of Driver amplifier by light-coupled isolation unit, the output of power amplifier drives and connects motor, Driver amplifier is with forbidding Enable Pin, this logic control element is used for the running status output channel power amplifier enable signal according to software in the running status of motor and servo controller, with Driver amplifier forbid that Enable Pin is connected,

When motor operates in motor drive software stop zone, logic control element exports invalid signals, and what make Driver amplifier forbids that Enable Pin is invalid, and Driver amplifier normally works;

When motor operation exceeds motor drive software stop zone, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, and turn off Driver amplifier, motor shuts down;

When the pwm signal of servo controller output is in high level or low level, namely, when in servo controller, software is in abnormal operational conditions, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, turn off Driver amplifier, motor shuts down.

This logic control element comprises trigger and logical circuit, logical circuit adopts NAND Logic computing, the input of logical circuit and the passage of servo controller output put in place signal LF_LIMIT, passage puts in place signal RT_LIMIT and enable signal, to put in place the NAND operation of signal RT_LIMIT and enable signal for realizing put in place signal LF_LIMIT and enable signal and passage of passage, the output of logical circuit is connected to trailing edge input and the zero setting input of trigger, the rising edge input of trigger is connected with the pwm signal of servo controller output, with Driver amplifier, the output of trigger forbids that Enable Pin is connected.

In this enforcement logical circuit adopt hex inverter and or door, other logical circuit realizing NAND operation be equal means replace, all in protection scope of the present invention.Trigger adopts integrated couple of Retargetable compiler monostable flipflop 54HCT123, as shown in Figure 1, D1 is for being hex inverter 54HCT04, D2 is or door 54HCT32, D3 is integrated trigger 54HCT123, the pin 1 of D1, pin 11 and pin 13 respectively with servo controller enable/reset signal EN1, the signal LF_LIMIT that puts in place is connected with the signal RT_LIMIT that puts in place, as the logic input signal of Ch1, be input to after the anti-phase computing of D1 in D2 and carry out or computing, the pin 3 of D2 is connected with the pin 2 of trigger D3, the pin 6 of D2 is connected with the pin 3 of trigger D3, the pin 1 of trigger D3 is connected with the PWM pulse-width signal PWM_Ch1 of servo controller.Namely

PWM_Ch1 gives D3_1 pin

$B\_1=\mathrm{RT}\_\mathrm{OUT}+\mathrm{EN}1\_\mathrm{OUT}=\stackrel{\‾}{\mathrm{RT}\_\mathrm{LIMIT}}+\stackrel{\‾}{\mathrm{EN}1}=\stackrel{\‾}{\mathrm{RT}\_\mathrm{LIMIT}\·\mathrm{EN}1},$ Give D3_2 pin;

$R1/=\mathrm{LF}\_\mathrm{OUT}+\mathrm{EN}1\_\mathrm{OUT}=\stackrel{\‾}{\mathrm{LF}\_\mathrm{LIMIT}}+\stackrel{\‾}{\mathrm{EN}1}=\stackrel{\‾}{\mathrm{LF}\_\mathrm{LIMIT}\·\mathrm{EN}1},$ Give D3_3 pin;

In like manner

PWM_Ch2, gives D3_9 pin;

$B\_2=\mathrm{UP}\_\mathrm{OUT}+\mathrm{EN}2\_\mathrm{OUT}=\stackrel{\‾}{\mathrm{UP}\_\mathrm{LIMIT}}+\stackrel{\‾}{\mathrm{EN}2}=\stackrel{\‾}{\mathrm{UP}\_\mathrm{LIMIT}\·\mathrm{EN}2},$ Give D3_10 pin;

$R2/=\mathrm{DOWN}\_\mathrm{OUT}+\mathrm{EN}2\_\mathrm{OUT}=\stackrel{\‾}{\mathrm{DOWN}\_\mathrm{LIMIT}}+\stackrel{\‾}{\mathrm{EN}2}=\stackrel{\‾}{\mathrm{DOWN}\_\mathrm{LIMIT}\·\mathrm{EN}2},$ Give D3_11 pin

The two Retargetable compiler monostable flipflop of 54HCT123 type, minimum trigger-pulse duration (tw1), at VCC=4.5V, 42ns, at VCC=6.0V, is 30ns.Its logic true value table is as shown in table 1, generally can switch-off power amplifier forbid that Enable Pin works when input low level, to turn off during high level, therefore by trigger output is used for can the DISABLE/ILIM/SHDN signal input control end of switch-off power amplifier.

Table 1

For ensureing that trigger activation period is more than or equal to the cycle of the pwm signal that servo controller exports, trigger D3 is also provided with configuration circuit, as shown in Figure 1, this configuration circuit is made up of external resistor-capacitor network, for CH1 Driver amplifier, its configuration circuit comprises resistance-capacitance network electric capacity C5, resistance-capacitance network resistance VR4 and adjustable resistance VR1, the output 1Q of trigger D3 is by adjustable resistance VR1 ground connection, the adjustable control end of adjustable resistance VR1 is used for the power amplifier enable signal EN_Ch1 as Ch1 passage, with CH1 Driver amplifier forbid that Enable Pin is connected, for turning off the DISABLE/ILIM/SHDN signal input control end of CH1 Driver amplifier, can switch-off power amplifier forbid that Enable Pin works when input low level, turn off during high level.The resistance-capacitance network electric capacity of this configuration circuit is C _1ext, resistance-capacitance network resistance is R _1ext, be T by the work period of this configuration circuit institute configuration flip-flops _w=0.45R _1ext* C _1ext, for coordinating servo software simulating power amplification protection turn-off function, logic control element needs adjustment resistance-capacitance network value to make the pwm signal cycle be less than or equal to T _w, TR_ now can be made to hold pwm signal trailing edge to make 54HC123 be in repeated trigger state always.

For a certain axle of the motor of the independent operating in control system; if kinematic axis is designed to finite angle; if the position position limitation protection starting point of Design of Mechanical Structure is M1 point; terminal is N1 point; during normal operation; the expection starting point of servo software design patterns is M1 ' point, and expection terminal is N1 ' point, as shown in Figure 3.If time between motor is in, the signal LF_LIMIT that puts in place is low level with the signal RT_LIMIT that puts in place, and servo-control system is in running, and the state of logic controller switches as shown in table 2.

Table 2

It is as follows that logic state switches fundamental analysis:

A) when motor normally works, LIMIT signal is low level, and EN is high level, and B_2 (B_1) and R2/ (R1/) are all high level, and the pwm signal of TR_ end input certain frequency, adjustment resistance-capacitance network value makes the pwm signal cycle be less than or equal to T _w, T _w=0.45Rext*Cext, TR_ can be made to hold pwm signal trailing edge to make 54HC123 be in repeated trigger state, and now end keeps low level, and the DISABLE terminal potential that can turn off power amplifier module is low level, about 5mV ~ 10mV, and low level, power amplifier normally works always.

B) when DSP program runs deadlock or race flies; TR_ end is high level or low level; the PWM cycle of input is greater than Tw; end exports high level; cause the DISABLE terminal potential that can turn off power amplifier module to become high level and be about 5V ± 0.05V; power amplifier module turns off and exports (such as power amplifier MAX4205 is forbidding that terminal voltage is greater than 100mV and namely turns off), rapid protection system.

C) LIMIT signal can be detected by hall device and deliver to logic controller, also can carry out position probing by servo controller software and deliver to logic controller, during system worked well, LIMIT signal is low level, software design patterns EN is high level, and B_2 (B_1) and R2/ (R1/) are all high level; When gimbal axis arrives left/right, or when up/down is spacing, certain LIMIT signal becomes high level, EN is high level, and now B_2 (B_1) and R2/ (R1/) have a signal to become low level, and end exports high level, turn off power amplifier, protection system exceeds spacing; Logic controller possesses enable reset signal interface, after framework enters protection stall, be low level by servo software control EN set, now B_2 (B_1) and R2/ (R1/) are all high level, end output low level, start power amplifier module, frame motor is driven to safe beneficial direction; Until system after the work of normal region, LIMIT reverts to low level, and servo software again reseting logic signal EN sets high, and logic controller now makes power amplifier module be in state to be protected.

In like manner, for Ch2 passage, servo-control system is in running, and the state of logic controller switches as shown in table 3, and detailed process is repeat specification no longer.

Table 3

The present invention by increasing logic control circuit on the various power amplification plate with prohibiting function, effectively raise the reliability of product, for control system even running, convenient debugging, safety test, Fast-Maintenance, all bring very significant beneficial effect, especially for the servo motion axle system of finite angle, protect at mechanical position limitation, software limit is protected, fall power by electric current loop sampling and use power amplifier, controller DSP emulation programming is without the need to disconnecting many-sided application such as amplifier power supply, all obtain good effect, the civil area such as military and The Cloud Terrace monitoring at many frameworks photoelectronic reconnaissance platform etc., application prospect is very wide.

Claims (9)

1. a power of motor Drive Protecting Circuit, comprise servo controller, light-coupled isolation unit and Driver amplifier, the pwm signal of servo controller output accesses the input of Driver amplifier by light-coupled isolation unit, the output of power amplifier drives and connects motor, Driver amplifier is with forbidding Enable Pin, it is characterized in that, described Drive Protecting Circuit also comprises logic control element, this logic control element is used for the running status output channel power amplifier enable signal according to software in the running status of motor and servo controller, with Driver amplifier forbid that Enable Pin is connected,

When motor operates in motor drive software stop zone, logic control element exports invalid signals, and what make Driver amplifier forbids that Enable Pin is invalid, and Driver amplifier normally works;

When motor operation exceeds motor drive software stop zone, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, and turn off Driver amplifier, motor shuts down;

When the pwm signal of servo controller output is in high level or low level, namely, when in servo controller, software is in abnormal operational conditions, logic control element exports useful signal, and what make Driver amplifier forbids that Enable Pin is effective, turn off Driver amplifier, motor shuts down.

2. power of motor Drive Protecting Circuit according to claim 1; it is characterized in that; it is described when motor operation exceeds motor drive software stop zone; after motor shuts down; servomotor controller output channel reset signal; logic control element exports invalid signals according to this channel reset signal, and what make Driver amplifier forbids that Enable Pin is invalid, and Driver amplifier normally works.

3. power of motor Drive Protecting Circuit according to claim 2, it is characterized in that, described logic control element comprises trigger and logical circuit, logical circuit adopts NAND Logic computing, the input of logical circuit and the passage of servo controller output put in place signal LF_LIMIT, passage puts in place signal RT_LIMIT and enable signal, to put in place the NAND operation of signal RT_LIMIT and enable signal for realizing put in place signal LF_LIMIT and enable signal and passage of passage, the output of described logical circuit is connected to trailing edge input and the zero setting input of trigger, the rising edge input of described trigger is connected with the pwm signal of servo controller output, with Driver amplifier, the output of described trigger forbids that Enable Pin is connected.

4. power of motor Drive Protecting Circuit according to claim 3, it is characterized in that, described logical circuit comprises inverter and OR circuit, the input of described inverter and the passage of servo controller output put in place signal LF_LIMIT, the passage signal RT_LIMIT that puts in place is connected with enable signal, the output of inverter is connected with the input of OR circuit, OR circuit is used for carrying out or computing anti-phase rear passage put in place signal RT_LIMIT and the enable signal of signal LF_LIMIT and enable signal and passage that put in place, two outputs of OR circuit are connected with the trailing edge input of trigger and zero setting input.

5. power of motor Drive Protecting Circuit according to claim 4; it is characterized in that; described logic control element also comprises the configuration circuit be connected with trigger, and this configuration circuit comprises resistance-capacitance network resistance, resistance-capacitance network electric capacity and adjustable resistance, and the resistance-capacitance network resistance of described configuration circuit is R _ext, resistance-capacitance network electric capacity is C _ext, be T by the work period of this configuration circuit institute configuration flip-flops _w=0.45Rext*Cext, and T _wbe more than or equal to the cycle T of the pwm signal of servo controller output _pWM.

6. power of motor Drive Protecting Circuit according to claim 5; it is characterized in that; the output of described trigger is by adjustable resistance ground connection; the adjustable side of this adjustable resistance is channel function enable signal end; with Driver amplifier forbid that Enable Pin is connected, control the startup of Driver amplifier.

7. power of motor Drive Protecting Circuit according to claim 6, is characterized in that, described trigger is two Retargetable compiler monostable flipflop 54HCT123.

8. power of motor Drive Protecting Circuit according to claim 6, is characterized in that, described inverter adopts integrated circuit hex inverter 54HCT04.

9. power of motor Drive Protecting Circuit according to claim 6, is characterized in that, described OR circuit adopts integrated circuit or door 54HCT32.