CN104485258A - Miniature determined time sequential hybrid time delay relay without biasing end - Google Patents
Miniature determined time sequential hybrid time delay relay without biasing end Download PDFInfo
- Publication number
- CN104485258A CN104485258A CN201410803257.0A CN201410803257A CN104485258A CN 104485258 A CN104485258 A CN 104485258A CN 201410803257 A CN201410803257 A CN 201410803257A CN 104485258 A CN104485258 A CN 104485258A
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- CN
- China
- Prior art keywords
- magnetic latching
- resistance
- delay circuit
- latching relay
- unijunction transistor
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/02—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
- H01H47/18—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay for introducing delay in the operation of the relay
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- Relay Circuits (AREA)
Abstract
The invention provides a miniature determined time sequential hybrid time delay relay without a biasing end. A casing is encapsulated above a base, two power supply input leading-out ends A and J are sintered and fixed on the base through glass insulators, a bottom circuit board and a top circuit board are fixed on the two power supply input leading-out ends A and J, a delay circuit is arranged on the top circuit board, and a magnetic latching relay is mounted on the bottom circuit board. The power supply input leading-out ends A and J are respectively connected with two input ends of the delay circuit, and the power supply input leading-out end A is connected with one ends of a front exciting coil and a rear exciting coil of the magnetic latching relay. The delay circuit comprises an action delay circuit and a release delay circuit, the control end of the action delay circuit is connected with the other end of the front exciting coil of the magnetic latching relay through a conducting wire, and the control end of the release delay circuit is connected with the other end of the rear exciting coil of the magnetic latching relay through a conducting wire. The miniature determined time sequential hybrid time delay relay has the advantages of small size, long service life, good convenience in production and debugging and high reliability.
Description
Technical field
The invention belongs to time-delay relay technical field, be specifically related to a kind of small-sized numerical time mixing time-delay relay without offset side.
Background technology
Time-delay relay mainly falls into 5 types delay pattern, comprises action delay, release delay, interval timing, repetitive cycling timing and numerical time.In host application, in order to avoid circuit power on and power-off time the power supply interference that produces, utilize same relay to realize action delay and release delay just particularly important.The time relay of existing similar numerical time realizes similar numerical time by software programming, this time relay being core with hybrid integrated circuit or single-chip microcomputer must add bias supply, and high to bias supply performance requirement, be not suitable for providing the main frame of bias supply to use.
Summary of the invention
The technical problem that the present invention solves: design a kind of small-sized numerical time mixing time-delay relay without offset side, substitute single-chip microcomputer with electronic devices and components and realize action delay and release delay at same relay, need not bias supply, and adopt double-layer structure design, volume is little, the life-span is long, environmental adaptability is good, reliability is high, and leak rate is :≤1 × 10
-3pa.cm
3/ s.
Technical solution of the present invention: a kind of small-sized numerical time mixing time-delay relay without offset side, comprise shell and base, shell is encapsulated in the top of base, and the upper end of shell is provided with mounting screw; It is characterized in that: described base has been sintered to fix two power supply input exits A, J by glass insulator, and two power supply input exits A, J are fixed with wiring underlayer plate and top line plate, top line plate is provided with delay circuit, and wiring underlayer plate is provided with magnetic latching relay; Described power supply input exit A, J are connected with two inputs of delay circuit respectively, and power supply input exit A is connected with the front excitation coil of magnetic latching relay and one end of rear excitation coil; Described delay circuit comprises action delay circuit and release delay circuit, and the control end of action delay circuit is connected with the other end of excitation coil before magnetic latching relay by wire I, the control end of release delay circuit is connected with the other end of excitation coil after magnetic latching relay by wire II; Described base magnetic latching relay contact exit B, C, D are sintered to fix by glass insulator, I, H, G.
Described action delay circuit is made up of unijunction transistor V1, electric capacity C1, triode U1, and electric capacity C1 is connected in parallel on the A pole of unijunction transistor V1 and K extremely goes up, and the front excitation coil of magnetic latching relay is connected between two inputs of delay circuit by triode U1; Power supply input exit A is that electric capacity C1 charges by resistance R1, resistance R2, and the A pole tension of unijunction transistor V1 is raised gradually by zero; Power supply input exit A provide reference voltage by the G pole that resistance R3, resistance R4, resistance R5 are unijunction transistor V1, when the A pole tension of unijunction transistor V1 is higher than G pole tension, A, K the two poles of the earth conducting of unijunction transistor V1, the base stage of triode U1 is driven to make triode U1 conducting by resistance R6, the front excitation coil energising of magnetic latching relay, contact conversion B, C, I, H connect, B, D, I, G disconnect, and relay realizes action delay;
Described release delay circuit is made up of unijunction transistor V2, electric capacity C2, C3, C4, controllable silicon U2, electric capacity C3 is connected in parallel on G, K the two poles of the earth of unijunction transistor V2, electric capacity C4 is connected in parallel on A, K the two poles of the earth of unijunction transistor V2, the rear excitation coil of magnetic latching relay 6 is connected on by controllable silicon U2 between two inputs of delay circuit, and the rear excitation coil of magnetic latching relay is in parallel with electric capacity C2 after connecting with controllable silicon U2; Power supply input exit A by resistance R11 be electric capacity C2, C3, C4 quick charge to assigned voltage, make the G pole tension of unijunction transistor V2 higher than A pole tension, unijunction transistor V2 and controllable silicon U2 is in off state; When power supply input exit A power-off, energized condition before magnetic latching relay keeps, electric capacity C3 is discharged by resistance R8 and R8 ', make the A pole tension of unijunction transistor V2 higher than G pole tension, the A pole of unijunction transistor V2 and the conducting of K pole, electric capacity C4 forms bleed-off circuit, controllable silicon U2 conducting is triggered by resistance R10, electric capacity C2 passes through rear excitation coil and the controllable silicon U2 repid discharge of magnetic latching relay, and the rear excitation coil of magnetic latching relay obtains electric, contact conversion B, C, I, H disconnect, B, D, I, G connect, and magnetic latching relay realizes release delay.
Described resistance R5 is parallel with thermistor RTC.
Described resistance R1, R2 are action delay regulating resistance; Resistance R8, R8 ' be release delay regulating resistance.
The advantage that the present invention compared with prior art has and effect:
1, the present invention substitutes single-chip microcomputer with electronic devices and components and realizes action delay and release delay at same relay, need not bias supply, and adopts double-layer structure design, volume is little, the life-span is long, scheduling and planning is convenient, and environmental adaptability is good, reliability is high, and leak rate is :≤1 × 10
-3pa.cm
3/ s.
2, the present invention utilizes magnetic latching relay armature after coil blackout, still can remain on feature on energized position, by delay circuit, realize action delay and release delay function respectively at the front excitation coil and rear excitation coil not controlling magnetic latching relay in the same time.When system electrification, realize action delay by the charge and discharge process of Resistor-Capacitor Unit, excitation coil before driving magnetic latching relay when the action delay time arrives; When system cut-off, magnetic latching relay is utilized to continue to maintain energized condition, by the electrical energy discharge process implementation release delay that energy storage components and parts store, when not needing bias supply, powered to excitation coil after magnetic latching relay by the electric discharge of electric capacity, realize release delay function.
3, the present invention adds temperature-compensation circuit in delay circuit, improves delay precision.
Accompanying drawing explanation
Fig. 1 is outline drawing of the present invention,
Fig. 2 is the upward view of Fig. 1,
Fig. 3 is internal structure schematic diagram of the present invention,
Fig. 4 is schematic block circuit diagram of the present invention,
Fig. 5 is electrical schematic diagram of the present invention.
Embodiment
1,2,3,4,5 a kind of embodiment of the present invention is described by reference to the accompanying drawings.
Without a small-sized numerical time mixing time-delay relay for offset side, comprise shell 1 and base 2, shell 1 is encapsulated in the top of base 2, and the upper end of shell 1 is provided with mounting screw 4; Described base 2 two power supply input exits A, J have been sintered to fix by glass insulator, and two power supply input exits A, J are fixed with wiring underlayer plate 5 and top line plate 6, top line plate 5 is provided with delay circuit 3, wiring underlayer plate 4 is provided with magnetic latching relay 6; Described power supply input exit A, J are connected with two inputs of delay circuit 3 respectively, and power supply input exit A is connected with the front excitation coil of magnetic latching relay 6 and one end of rear excitation coil; Described delay circuit 3 comprises action delay circuit and release delay circuit, and the control end of action delay circuit is connected with the other end of excitation coil before magnetic latching relay 6 by wire I 7, the control end of release delay circuit is connected with the other end of excitation coil after magnetic latching relay 6 by wire II 8; Described base 2 magnetic latching relay 6 contact exit B, C, D are sintered to fix by glass insulator, I, H, G.
Described action delay circuit is made up of unijunction transistor V1, electric capacity C1, triode U1, and electric capacity C1 is connected in parallel on the A pole of unijunction transistor V1 and K extremely goes up, and the front excitation coil of magnetic latching relay 7 is connected between two inputs of delay circuit by triode U1; Power supply input exit A is that electric capacity C1 charges by resistance R1, resistance R2, and the A pole tension of unijunction transistor V1 is raised gradually by zero; Power supply input exit A provide reference voltage by the G pole that resistance R3, resistance R4, resistance R5 are unijunction transistor V1, when the A pole tension of unijunction transistor V1 is higher than G pole tension, A, K the two poles of the earth conducting of unijunction transistor V1, the base stage of triode U1 is driven to make triode U1 conducting by resistance R6, the front excitation coil energising of magnetic latching relay 6, contact conversion B, C, I, H connect, B, D, I, G disconnect, and relay 6 realizes action delay.Described resistance R5 is parallel with thermistor RTC.Described resistance R1, R2 are action delay regulating resistance.
Described release delay circuit is made up of unijunction transistor V2, electric capacity C2, C3, C4, controllable silicon U2, electric capacity C3 is connected in parallel on G, K the two poles of the earth of unijunction transistor V2, electric capacity C4 is connected in parallel on A, K the two poles of the earth of unijunction transistor V2, the rear excitation coil of magnetic latching relay 6 is connected on by controllable silicon U2 between two inputs of delay circuit 3, and the rear excitation coil of magnetic latching relay 6 is in parallel with electric capacity C2 after connecting with controllable silicon U2; Power supply input exit A by resistance R11 be electric capacity C2, C3, C4 quick charge to assigned voltage, make the G pole tension of unijunction transistor V2 higher than A pole tension, unijunction transistor V2 and controllable silicon U2 is in off state; When power supply input exit A power-off, magnetic latching relay 6 keeps front energized condition, electric capacity C3 is discharged by resistance R8 and R8 ', make the A pole tension of unijunction transistor V2 higher than G pole tension, the A pole of unijunction transistor V2 and the conducting of K pole, electric capacity C4 forms bleed-off circuit, controllable silicon U2 conducting is triggered by resistance R10, electric capacity C2 passes through rear excitation coil and the controllable silicon U2 repid discharge of magnetic latching relay 6, and the rear excitation coil of magnetic latching relay 6 obtains electric, contact conversion B, C, I, H disconnect, B, D, I, G connect, and magnetic latching relay 6 realizes release delay.Described resistance R8, R8 ' be release delay regulating resistance.
The present invention due to the action delay time longer, the release delay time is shorter, and therefore in action delay circuit, reference voltage is chosen and adopted resistor network realization, and the resistance of resistance is subject to the impact of ambient temperature, the action delay time can be caused influenced by environmental temperature, and precision is not high.For this reason, in the resistor network of the reference voltage of action delay circuit, add thermistor, by parameter matching, make relay delay precision within certain action delay time can reach the requirement of 10%.In addition, the delay time of relay regulates simple, and only need to change suitable resistance, wherein R1, R2 are action delay regulating resistance; R8, R8 ' be release delay regulating resistance.
The present invention is the numerical time mixing time-delay relay that mechanical contact exports, load current large (5A), little (26 × 26 × 26mm of volume
3), the life-span long (28V/5A, 50000 times), environmental suitability is excellent, reliability is high.
Above-described embodiment, just preferred embodiment of the present invention, is not used for limiting the scope of the present invention, therefore all equivalent variations done with content described in the claims in the present invention, all should be included within the claims in the present invention scope.
Claims (4)
1. the small-sized numerical time mixing time-delay relay without offset side, comprise shell (1) and base (2), shell (1) is encapsulated in the top of base (2), and the upper end of shell (1) is provided with mounting screw (9); It is characterized in that: described base (2) has been sintered to fix two power supply input exits A, J by glass insulator, and two power supply input exits A, J are fixed with wiring underlayer plate (5) and top line plate (6), top line plate (5) is provided with delay circuit (3), wiring underlayer plate (4) is provided with magnetic latching relay (6); Described power supply input exit A, J are connected with two inputs of delay circuit (3) respectively, and power supply input exit A is connected with the front excitation coil of magnetic latching relay (6) and one end of rear excitation coil; Described delay circuit (3) comprises action delay circuit and release delay circuit, and the control end of action delay circuit is connected with the other end of magnetic latching relay (6) front excitation coil by wire I (7), the other end that the control end of release delay circuit passes through wire II (8) and magnetic latching relay (6) excitation coil is afterwards connected; Described base (2) magnetic latching relay (6) contact exit B, C, D are sintered to fix by glass insulator, I, H, G.
2. a kind of small-sized numerical time mixing time-delay relay without offset side according to claim 1, it is characterized in that: described action delay circuit is made up of unijunction transistor V1, electric capacity C1, triode U1, electric capacity C1 is connected in parallel on the A pole of unijunction transistor V1 and K extremely goes up, and the front excitation coil of magnetic latching relay (7) is connected between two inputs of delay circuit by triode U1; Power supply input exit A is that electric capacity C1 charges by resistance R1, resistance R2, and the A pole tension of unijunction transistor V1 is raised gradually by zero; Power supply input exit A provide reference voltage by the G pole that resistance R3, resistance R4, resistance R5 are unijunction transistor V1, when the A pole tension of unijunction transistor V1 is higher than G pole tension, A, K the two poles of the earth conducting of unijunction transistor V1, the base stage of triode U1 is driven to make triode U1 conducting by resistance R6, the front excitation coil energising of magnetic latching relay (6), contact conversion B, C, I, H connect, B, D, I, G disconnect, and relay (6) realizes action delay;
Described release delay circuit is made up of unijunction transistor V2, electric capacity C2, C3, C4, controllable silicon U2, electric capacity C3 is connected in parallel on G, K the two poles of the earth of unijunction transistor V2, electric capacity C4 is connected in parallel on A, K the two poles of the earth of unijunction transistor V2, the rear excitation coil of magnetic latching relay (6) is connected on by controllable silicon U2 between two inputs of delay circuit (3), and the rear excitation coil of magnetic latching relay (6) is in parallel with electric capacity C2 after connecting with controllable silicon U2, power supply input exit A by resistance R11 be electric capacity C2, C3, C4 quick charge to assigned voltage, make the G pole tension of unijunction transistor V2 higher than A pole tension, unijunction transistor V2 and controllable silicon U2 is in off state, when power supply input exit A power-off, energized condition before magnetic latching relay (6) keeps, electric capacity C3 is discharged by resistance R8 and R8 ', make the A pole tension of unijunction transistor V2 higher than G pole tension, the A pole of unijunction transistor V2 and the conducting of K pole, electric capacity C4 forms bleed-off circuit, controllable silicon U2 conducting is triggered by resistance R10, electric capacity C2 passes through rear excitation coil and the controllable silicon U2 repid discharge of magnetic latching relay (6), the rear excitation coil of magnetic latching relay (6) obtains electric, contact conversion B, C, I, H disconnects, B, D, I, G connects, magnetic latching relay (6) realizes release delay.
3. a kind of small-sized numerical time mixing time-delay relay without offset side according to claim 2, is characterized in that: described resistance R5 is parallel with thermistor RTC.
4. a kind of small-sized numerical time mixing time-delay relay without offset side according to Claims 2 or 3, is characterized in that: described resistance R1, R2 are action delay regulating resistance; Resistance R8, R8 ' be release delay regulating resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410803257.0A CN104485258B (en) | 2014-12-19 | 2014-12-19 | Miniature determined time sequential hybrid time delay relay without biasing end |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410803257.0A CN104485258B (en) | 2014-12-19 | 2014-12-19 | Miniature determined time sequential hybrid time delay relay without biasing end |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104485258A true CN104485258A (en) | 2015-04-01 |
| CN104485258B CN104485258B (en) | 2017-01-11 |
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ID=52759795
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410803257.0A Active CN104485258B (en) | 2014-12-19 | 2014-12-19 | Miniature determined time sequential hybrid time delay relay without biasing end |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112701009A (en) * | 2020-12-31 | 2021-04-23 | 陕西众力通用电器股份有限公司 | Nuclear-grade multi-state output and delay adjustable hybrid time relay capable of monitoring |
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|---|---|---|---|---|
| GB885308A (en) * | 1959-08-03 | 1961-12-20 | Collins Radio Co | Switching circuit |
| CH620048A5 (en) * | 1979-05-18 | 1980-10-31 | Haussener Hans Ag | Relay |
| KR890002477B1 (en) * | 1986-09-02 | 1989-07-10 | 금성기전 주식회사 | Time-delayed relay |
| CN200941365Y (en) * | 2006-04-26 | 2007-08-29 | 黄跃进 | Monostable magetic holding relay |
| CN201663106U (en) * | 2010-04-08 | 2010-12-01 | 温州科宇电器有限公司 | Time relay |
| CN103700543A (en) * | 2013-12-13 | 2014-04-02 | 陕西群力电工有限责任公司 | Small sealing release delay relay with long delay time |
| CN204348620U (en) * | 2014-12-19 | 2015-05-20 | 陕西群力电工有限责任公司 | A kind of small-sized numerical time mixing time-delay relay without offset side |
-
2014
- 2014-12-19 CN CN201410803257.0A patent/CN104485258B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB885308A (en) * | 1959-08-03 | 1961-12-20 | Collins Radio Co | Switching circuit |
| CH620048A5 (en) * | 1979-05-18 | 1980-10-31 | Haussener Hans Ag | Relay |
| KR890002477B1 (en) * | 1986-09-02 | 1989-07-10 | 금성기전 주식회사 | Time-delayed relay |
| CN200941365Y (en) * | 2006-04-26 | 2007-08-29 | 黄跃进 | Monostable magetic holding relay |
| CN201663106U (en) * | 2010-04-08 | 2010-12-01 | 温州科宇电器有限公司 | Time relay |
| CN103700543A (en) * | 2013-12-13 | 2014-04-02 | 陕西群力电工有限责任公司 | Small sealing release delay relay with long delay time |
| CN204348620U (en) * | 2014-12-19 | 2015-05-20 | 陕西群力电工有限责任公司 | A kind of small-sized numerical time mixing time-delay relay without offset side |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112701009A (en) * | 2020-12-31 | 2021-04-23 | 陕西众力通用电器股份有限公司 | Nuclear-grade multi-state output and delay adjustable hybrid time relay capable of monitoring |
| CN112701009B (en) * | 2020-12-31 | 2024-06-07 | 陕西众力通用电器股份有限公司 | Nuclear-level multi-state output and delay-adjustable hybrid time relay capable of being monitored |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104485258B (en) | 2017-01-11 |
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