CN104484308A - Control method applied to operating mode finite-state machine and computer readable medium - Google Patents

Control method applied to operating mode finite-state machine and computer readable medium Download PDF

Info

Publication number
CN104484308A
CN104484308A CN201410658016.1A CN201410658016A CN104484308A CN 104484308 A CN104484308 A CN 104484308A CN 201410658016 A CN201410658016 A CN 201410658016A CN 104484308 A CN104484308 A CN 104484308A
Authority
CN
China
Prior art keywords
state machine
port
finite state
operator scheme
wake request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410658016.1A
Other languages
Chinese (zh)
Other versions
CN104484308B (en
Inventor
何轩廷
黄亮维
苏敬尧
庄胜富
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Realtek Semiconductor Corp
Original Assignee
Realtek Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Realtek Semiconductor Corp filed Critical Realtek Semiconductor Corp
Priority to CN201410658016.1A priority Critical patent/CN104484308B/en
Publication of CN104484308A publication Critical patent/CN104484308A/en
Application granted granted Critical
Publication of CN104484308B publication Critical patent/CN104484308B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Small-Scale Networks (AREA)

Abstract

The invention discloses a control method applied to an operating mode finite-state machine. The operating mode finite-state machine is used for determining an action of a first port of a device. The control method includes controlling the operating mode finite-state machine to enter a second local state from a first local state, and controlling the first port to transmit a signal in a wake-up mode to an online partner of the first port, when the operating mode finite-state machine is in the first local state and a wake-up request bit is a first logic value.

Description

Be applied to control method and the computer-readable media of operator scheme finite state machine
Technical field
The present invention relates to finite state machine technical field, embodiment system disclosed by the present invention is relevant to finite state machine method, espespecially a kind of can operator scheme finite state machine (Operating-Mode Finite-State-Machine, the OPFSM) method compatible with the overall finite state machine of automobile-used Ethernet standard (Global Finite-State-Machine) and related computer readable media.
Background technology
Ethernet has been considered as the mainstream scheme in automobile-used network infrastructure of new generation by automobile industry now.Ethernet has higher bandwidth, can meet the application demands such as the auxiliary and information entertainment of such as emerging driving.
Automobile industry, in expansion elasticity, low cost, low-power consumption and durability etc., has relatively high requirement.Such as, in the past when depot uses as controller local area network (Controller AreaNetwork, CAN) or vehicle-mounted network communication system (FlexRay) etc. carries out communication transfer time, " operator scheme finite state machine (Operating-Mode Finite-State-Machine can be provided with in the Physical layer of each bottom product, OPFSM) ", the access control of the person that can accept top level control, the corresponding control of power-saving control or other unusual condition, and clearly define and describe bottom product and top level control person process under various conditions and corresponding behavior.
But, in automobile-used Ethernet standard (such as BR-PHY standard), only have and clearly define for " overall finite state machine (global FSM) ", therefore cannot efficient realization further operate, such as " selective wake-up (selective wakeup) ", " quick global wakes up (global wakeup) ".In view of this, in automobile-used Ethernet standard, need a kind of " the operator scheme finite state machine " that be similar in the past, the more operating function of automobile-used Ethernet standard is provided and/or improves the power consumption problem of automobile-used Ethernet standard, and then simplify upper strata use complexity, simultaneously again can be compatible with existing " overall finite state machine ".
Summary of the invention
An object of the present invention ties up in proposing a kind of reaching and the operator scheme finite state machine method of the overall finite state machine compatibility of automobile-used Ethernet standard and related computer readable media, to give a response the technical matters met with in above-mentioned known techniques.
According to an one exemplary embodiment of the present invention, disclose a kind of control method being applied to an operator scheme finite state machine, wherein this operator scheme finite state machine system behavior of one first port deciding a device, this control method includes: when the state of this operator scheme finite state machine is a first local state, and a wake request position is when being first logical value, control this operator scheme finite state machine and enter one second local state by this first local state, and control these first end oral instructions to send there is the signal that wakes form up the online buddies to this first port.
According to another one exemplary embodiment of the present invention, disclose a kind of computer-readable media, store a program code, following steps can be performed control an operator scheme finite state machine when this program code is performed by a processor, wherein this operator scheme finite state machine system behavior of one first port deciding a device, step performed by this computer-readable media includes: when the state of this operator scheme finite state machine is a first local state, and a wake request position is when being first logical value, control this operator scheme finite state machine and enter one second local state by this first local state, and control these first end oral instructions to send there is the signal that wakes form up the online buddies to this first port.
Operator scheme finite state machine of the present invention can be compatible with " the overall finite state machine " that automobile-used Ethernet standard itself defines, and some further operation mechanisms can be performed in addition, such as selective wake-up, global wake-up via start line or the global wake-up via cable.Significantly add the elasticity of system.
Implement technical scheme of the present invention, there is following beneficial effect: operator scheme finite state machine of the present invention can be compatible with " the overall finite state machine " that automobile-used Ethernet standard itself defines, and some further operation mechanisms can be performed in addition, such as selective wake-up, global wake-up via start line or the global wake-up via cable.Significantly add the elasticity of system.
Accompanying drawing explanation
Below by with reference to accompanying drawing describe the present invention particularly in conjunction with example, advantage of the present invention and implementation will be more obvious, wherein content shown in accompanying drawing is only for explanation of the present invention, and does not form restriction of going up in all senses of the present invention, in the accompanying drawings:
Fig. 1 is the schematic diagram of the embodiment of operator scheme finite state machine of the present invention;
Fig. 2 is the schematic diagram that operator scheme finite state machine of the present invention is applied in the embodiment of selective wake-up mechanism;
Fig. 3 is the schematic diagram that operator scheme finite state machine of the present invention is applied in the embodiment of the global wake-up mechanism via start line;
Fig. 4 is the schematic diagram that operator scheme finite state machine of the present invention is applied in the embodiment of the global wake-up mechanism via cable;
Fig. 5 A is the process flow diagram that the present invention is applied to an one exemplary embodiment of the control method of an operator scheme finite state machine;
Fig. 5 B is the process flow diagram that continues of Fig. 5 A;
Fig. 6 is the schematic diagram that the present invention is applied to an embodiment of a computer system.
100 operator scheme finite state machines
102 dormancy/Reset Status
104 holding states
106 general/safe condition
108 first local states
110 second local states
112 the 3rd local states
201,203,205,207,209,211 is online
202,206,206,208,210,212,216 microprocessors
214,218 ~ 234 Physical layers
500 flow processs
502 ~ 516 steps
600 computer systems
602 processors
604 machine-readable mediums
Embodiment
Some vocabulary is employed to censure specific assembly in the middle of instructions and follow-up claim.Person with usual knowledge in their respective areas should understand, and same assembly may be called with different nouns by manufacturer.This instructions and follow-up claim are not used as with the difference of title the mode distinguishing assembly, but are used as the criterion of differentiation with assembly difference functionally." comprising " mentioned in the middle of instructions and follow-up claims is in the whole text an open term, therefore should be construed to " comprise but be not limited to ".In addition, " coupling " word at this is comprise directly any and be indirectly electrically connected means.Therefore, if describe a first device in literary composition to be coupled to one second device, then represent this first device and directly can be electrically connected in this second device, or be indirectly electrically connected to this second device through other devices or connection means.
Fig. 1 is the schematic diagram of the embodiment of operator scheme finite state machine of the present invention.An operator scheme finite state machine 100 is in this embodiment be applied to one to be compatible with in the product of automobile-used Ethernet standard (such as BR-PHY standard), and this product has 5 Physical layers (i.e. 5 ports), but the present invention does not limit with this.That is, operator scheme finite state machine 100 is not also excluded in and is suitable for associated class in other identical or similar field like standard/protocol.In this embodiment, operator scheme finite state machine 100 is " the overall finite state machine " that be compatible with automobile-used Ethernet standard itself and define, specifically, in the 1st figure, show three states of " overall finite state machine ": one first global state (dormancy/Reset Status) Global_Sleep/Reset 102,1 second global state (holding state) Global_Standby 104 and one the 3rd global state (general/safe condition) Global_Normal/Safety 106 simultaneously; And three of operator scheme finite state machine 100 states, the local state Local_Normal 112 of the one first local state Local_Standby 110, the 3rd of local state Local_Reset 108,1 second.It should be noted, " overall finite state machine " that automobile-used Ethernet standard itself defines is not limited to only comprise the first above-mentioned global state Global_Sleep/Reset 102, second global state Global_Standby 104 and the 3rd global state Global_Normal/Safety 106.Only show at this and at least have relevant partial status with the present invention.
Can understand by Fig. 1, when operator scheme finite state machine 100 is when being positioned at the first local state Local_Reset 108, the state of its corresponding " overall finite state machine " can be the first global state Global_Sleep/Reset 102 or the 3rd global state Global_Normal/Safety 106; When operator scheme finite state machine 100 is when being positioned at the second local state Local_Standby 110, the state of its corresponding " overall finite state machine " can be the second global state Global_Standby 104 or the 3rd global state Global_Normal/Safety 106; When operator scheme finite state machine 100 is when being positioned at the 3rd local state Local_Normal 112, the state of its corresponding " overall finite state machine " can be only the 3rd global state Global_Normal/Safety 106.And " overall finite state machine " is compared with operator scheme finite state machine 100 and is had higher right of priority, namely when " overall finite state machine " is entered the first global state Global_Sleep/Reset 102 by control, operator scheme finite state machine 100 is just bound to enter the first local state Local_Reset 108, when " overall finite state machine " is entered the second global state Global_Standby 104 by control, operator scheme finite state machine 100 is just bound to enter the second local state Local_Standby 110, when " overall finite state machine " is entered the 3rd global state Global_Normal/Safety 106 by control, operator scheme finite state machine 100 just can voluntarily at the first local state Local_Reset 108, state is determined between second local state Local_Standby 110 and the 3rd local state Local_Normal 112, such as send Host Command (host command) via top level control unit to come at the first local state Local_Reset 108, switch between second local state Local_Standby 110 and the 3rd local state Local_Normal 112.
For the product of single one physical layer (such as single-port), operator scheme finite state machine 100 is the operation for controlling this Physical layer; And for the product of multiple Physical layer (the automobile-used Ethernet standardized product of 5 port of such as the present embodiment), then each Physical layer all needs respective operator scheme finite state machine 100 to control respective operation respectively.That is operator scheme finite state machine 100 of the present invention can be compatible with the product of single/non-single one physical layer.Further, first local state Local_Reset 108 is the battery saving mode being compatible to the first global state Global_Sleep/Reset 102, and when above-mentioned multiple Physical layer has respective operator scheme finite state machine 100 respectively, just the mechanism that subnetwork uses (partialnetwork) can be reached, namely in the automobile-used Ethernet standardized product of 5 port of the present embodiment, when the state of " overall finite state machine " is the 3rd global state Global_Normal/Safety 106, each Physical layer can control this product according to current situation, section ports is made to be positioned at the first local state Local_Reset 108, and remaining port is not positioned at the first local state Local_Reset 108.
When the state system of " the overall finite state machine " of the 5 port automobile-used Ethernet standardized product of the present embodiment is positioned at the 3rd global state Global_Normal/Safety 106, and the operator scheme finite state machine 100 of xth port is that when being positioned at the first local state Local_Reset 108, (x can be 0 ~ 4, represent the numbering of every Single port of the 5 port automobile-used Ethernet standardized product of the present embodiment), if now xth port receives " waking form (wakeup pattern; WUP) up " online from cable, i.e. WUP x=1, or a wake request position WUP/R_req of xth port x1 is become from 0, or a start line signal Lwake of the automobile-used Ethernet standardized product of 5 port of the present embodiment is set to 1, and during a default option option=1 of xth port, the respective operations pattern finite state machine 100 of xth port just can enter the second local state Local_Standby 110 from the first local state Local_Reset 108.Please note, in the nature of things, the control module on upper strata can switch between the first local state Local_Standby 110 of local state Local_Reset 108, second and the 3rd local state Local_Normal 112 by the operator scheme finite state machine 100 sending Host Command and come order xth port, but this is emphasis of the present invention not, just seldom repeats in this and subsequent paragraph.
For example, when the default option option of every Single port of the 5 port automobile-used Ethernet standardized product of the present embodiment is set as 1, as long as start line signal Lwake becomes 1 from 0, just directly can wake every Single port of the 5 port automobile-used Ethernet standardized product of the present embodiment up, therefore can reach system fast wake-up.Again, above-mentionedly wake form up and can have different forms depending on applied various criterion/specification.Such as this be automobile-used Ethernet standard work out wake form up.In addition, one of emphasis of the present invention is each port design of the 5 port automobile-used Ethernet standardized product for the present embodiment wake request position WUP/R_req x, its function system is as wake request position WUP/R_req xwhen becoming 1 from 0, if affiliated xth port is at the second local state Local_Standby 110, just can sends and wake form up its online buddies (link partner); If or affiliated xth port is at the 3rd local state Local_Normal 112, just can encode one " wake request (wakeup request; WUR) " send to its online buddies, the wake request position WUP/R_req wherein corresponding to 0th ~ 4 ports in idle code 0 ~ 4following equation (1) ~ (5) can be used respectively to represent.
WUP / R _ rec 14 = ( ( WUP 0 or WUR 0 ) * Selective 04 or ( WUP 1 or WUR 1 ) * Selective 14 or ( WUP 2 or WUR 2 ) * Selective 24 or ( WUP 3 or WUR 3 ) * Selective 34 oren _ WUP / R 4 or L wake * Lw 2 Rw 4 ) * Gate _ WUP / R 4 - - - ( 5 )
In equation (1) ~ (5), WUP x=1 or WUR x=1 represents that xth port receives from cable " waking form up " or " wake request " that online buddies sends online; And a selectivity parameter Selective xywhen=1 expression xth port receives " waking form up " or " wake request ", should propagate to y port, y port is also sent " waking form up " or " wake request " its online buddies, and a upper strata setting wake request en_WUP/R xthen fasten layer control module with set by instruction; One start line activation parameter Lw2Rw xif when representing start line (activationline) signal Lwake=1 when=1, xth port can send its online buddies " waking form up " or " wake request ".And above-mentioned equation (1) ~ (5) all can be subject to a master switch Gate_WUP/R respectively xcontrol.Wherein x=0 ~ 4, y=0 ~ 4.
When the state system of " the overall finite state machine " of the 5 port automobile-used Ethernet standardized product of the present embodiment is positioned at the 3rd global state Global_Normal/Safety 106, and the operator scheme finite state machine 100 of xth port is that when being positioned at the second local state Local_Standby 110, (x can be 0 ~ 4, represent the numbering of every Single port of the 5 port automobile-used Ethernet standardized product of the present embodiment), now xth port not yet completes online with online buddies, if a but wake request position WUP/R_req of xth port x=1, then xth port at once can send and wake form WUP up xto online buddies, reach effect of quick transmission (fast broadcast).When the second local state Local_Standby 110, if overlap joint pin (strap pin) at xth port is set to automatic mode, then xth port just can wake form WUP up sending xafterwards, automatically the 3rd local state Local_Normal 112 is entered from the second local state Local_Standby 110; If the overlap joint pin at xth port is set to non-automatic, xth port just can wake form WUP up sending xafterwards, determine whether entering the 3rd local state Local_Normal 112 from the second local state Local_Standby 110 according to Host Command.
When the state system of " the overall finite state machine " of the 5 port automobile-used Ethernet standardized product of the present embodiment is positioned at the 3rd global state Global_Normal/Safety 106, and the operator scheme finite state machine 100 of xth port is that when being positioned at the 3rd local state Local_Normal 112, (x can be 0 ~ 4, represent the numbering of every Single port of the 5 port automobile-used Ethernet standardized product of the present embodiment), represent and online buddies normally online, the biography can carrying out standard is brought drill to an end work.If a now wake request position WUP/R_req of xth port x=1, then xth port can send wake request WUR xto online buddies.Online buddies is now be positioned at standard to pass receipts pattern equally, and xth port sends wake request WUR xcan be used for requiring online buddies further this wake request pass from other port.Therefore, the master (Master)/have nothing to do from (Slave) of the initiation that wakes up of the present invention and automobile-used Ethernet standard.
Fig. 2 is the schematic diagram that operator scheme finite state machine of the present invention is applied in the embodiment of selective wake-up (selectivewakeup) mechanism.In this embodiment, aforesaid operations pattern finite state machine 100 is be applied to one to be compatible with in the system of automobile-used Ethernet standard (such as BR-PHY standard), wherein comprises the automobile-used Ethernet standard interchanger of the automobile-used Ethernet standardized product of 9 single-ports, the automobile-used Ethernet standard interchanger (switch) of 34 ports and 13 port.Under selective wake-up mechanism, in automobile-used Ethernet modular system, the selectivity parameter Selective of each finite state machine 100 can be predetermined to be 0, and each overlap joint pin all can be defaulted as non-automatic pattern, in addition, and the default option option of the operator scheme finite state machine of each Physical layer can be defaulted as 0 and master switch Gate_WUP/R can be predetermined to be 1.As a microprocessor (micro controller, μ C) 202 sense a particular condition, and when determining to wake microprocessor 204,206,208,210 and 212 up, can require that a Physical layer 222 wakes another Physical layer 214 up, and set up after one online 201, microprocessor 202 and another microprocessor 208 just can carry out friendship and hold (handshake) program to determine that next microprocessor 208 will control that port and send to online buddies and wake requirement up.After handing over and holding program, microprocessor 208 can wake Physical layer 224,226 and 228 up, and set up online 203,205 and 207 through setting Physical layer 230,232 and 234 respective wake request parameter en_WUP/R; Afterwards, similarly, microprocessor 208 and another microprocessor 216 hold program through friendship again, and determine to wake another Physical layer 218 up and set up another online 209; Afterwards, microprocessor 216 and another microprocessor 210 hold program through friendship again, and determine to wake another Physical layer 220 up and set up another online 211.
Fig. 3 is the schematic diagram that operator scheme finite state machine of the present invention is applied in the embodiment of global wake-up (the global wakeup via activation line) mechanism via start line.In this embodiment, aforesaid operations pattern finite state machine 100 is be applied to one to be compatible with in the system of automobile-used Ethernet standard (such as BR-PHY standard), wherein comprises the automobile-used Ethernet standard interchanger of the automobile-used Ethernet standardized product of 9 single-ports, the automobile-used Ethernet standard interchanger (switch) of 34 ports and 13 port.Via under the global wake-up mechanism of start line, in automobile-used Ethernet modular system, the selectivity parameter Selective of each finite state machine 100 can be predetermined to be 0, and each overlap joint pin all can be defaulted as automatic mode, in addition, the default option option of the operator scheme finite state machine of each Physical layer and master switch Gate_WUP/R can be predetermined to be 1.When arbitrary microprocessor senses is to a particular condition, and determine when waking other particular microprocessor up, directly start line signal Lwake can be set as 1, just once all can wake whole system up and need not send in addition and wake form or wake request up.
Fig. 4 is the schematic diagram that operator scheme finite state machine of the present invention is applied in the embodiment of global wake-up (the global wakeup via Ethernet cable) mechanism via cable.In this embodiment, aforesaid operations pattern finite state machine 100 is be applied to one to be compatible with in the system of automobile-used Ethernet standard (such as BR-PHY standard), wherein comprises the automobile-used Ethernet standard interchanger of the automobile-used Ethernet standardized product of 9 single-ports, the automobile-used Ethernet standard interchanger (switch) of 34 ports and 13 port.Via under the global wake-up mechanism of cable, in automobile-used Ethernet modular system, the selectivity parameter Selective of each finite state machine 100 and master switch Gate_WUP/R can be predetermined to be 1, and the default option option of the operator scheme finite state machine of each Physical layer can be defaulted as 0.As a microprocessor (microcontroller, μ C) 202 sense a particular condition, and when determining to wake microprocessor 204,206,208,210 and 212 up, can require that a Physical layer 222 wakes another Physical layer 214 up, needless to say set up online, the wake request position WUP/R_req of Physical layer 230,232 and 234 just can become 1 from 0, and therefore Physical layer 230,232 and 234 just can send at once and wake form or wake request up.And fast whole system is waken up in this way.
Fig. 5 A and Fig. 5 B is the process flow diagram that the present invention is applied to an one exemplary embodiment of the control method of an operator scheme finite state machine.If identical result can be reached substantially, the sequence of steps in accordance with flow process shown in 5A ~ 5B figure might not be needed to carry out, and 5A ~ 5B schemes shownschematically step not necessarily will carry out continuously, that is other steps also can be inserted wherein, in addition, some step in 5A ~ 5B figure also can be changed according to different embodiment or design requirement or omit it.The step being applied to the control method 500 of an operator scheme finite state machine is as follows:
S502: when an overall finite state machine of an automobile-used Ethernet standard set-up enters dormancy/replacement (sleep/reset) state, control this operator scheme finite state machine and enter one first local state;
S504: when this overall finite state machine enters one standby (standby) state, control this operator scheme finite state machine and enter one second local state;
S506: when the state of this overall finite state machine is one general/safety (normal/safety) state, and the state of this operator scheme finite state machine is this first local state, and a wake request position is when being first logical value, control this operator scheme finite state machine and enter this second local state, and control first end oral instructions and send there is the signal that wakes form up the online buddies to this first port;
S508: when the state of this operator scheme finite state machine is this second local state, and this wake request position is when changing into this first logical value from one second logical value, controls these first end oral instructions and send there is this signal waking form up this online buddies to this first port;
S510: when the state of this operator scheme finite state machine is one the 3rd local state, and this wake request position is when changing into this first logical value from this second logical value, controls these first end oral instructions and send the signal with a wake request to this online buddies of this first port;
S512: when one second port accepts of this automobile-used Ethernet standard set-up is to having this another signal waking form up or receiving the signal with this wake request, and the selectivity parameter of this first end lancet to this second port is when being set to a predetermined value, this wake request position is set as this first logical value;
S514: when a upper strata setting wake request of this first port is set as a predetermined value by a upper strata processor of this automobile-used Ethernet standard set-up, this wake request position is set as this first logical value; And
S516: when a start line signal of this automobile-used Ethernet standard set-up is a predetermined value, and when a start line activation parameter of this first port is a preset parameter value, this wake request position is set as this first logical value.
Fig. 6 is the schematic diagram of an embodiment of a computer system 600.Computer system 600 includes processor 602 and a machine-readable medium 604, for example, computer system 600 can be a personal computer, and computer-readable media 604 can be any storage device with data storing function in personal computer, such as volatile memory, non-voltile memory, hard disk, CD etc.In the present embodiment, a program code PROG is stored in computer-readable media 604, therefore, when program code PROG load by processor 602 and perform time, program code PROG can cause processor 602 to perform the step S502 ~ S516 shown in the 5th figure and control an operator scheme finite state machine, wherein this operator scheme finite state machine system behavior of one first port deciding an automobile-used Ethernet standard set-up.Should understand owing to haveing the knack of this field person the operation that processor 602 executive routine code PROG carries out easily after the content of reading above paragraph, therefore omit further description in the hope of succinctly at this.
Above-mentioned about idea of the present invention can by semiconductor realize in any integrated circuit.Such as the present invention can be realized in independent semiconductor design, or realize in ASIC(Application Specific Integrated Circuit) and/or other subsystem any.
The present invention can utilize any suitable form to realize, and comprises hardware, software, firmware or above combination in any.At least part of the present invention is optionally implemented as the computer software operated on one or more data processor and/or digital signal processor or configurable modular assembly (such as FPGA).Therefore, the assembly of embodiments of the invention and assembly realize physically, functionally and in logic in any suitable manner.In fact, function of the present invention can be implemented in single unit, a plurality of unit or the part as other functional units.
Although the present invention has combined and certain embodiments have been explanation, the particular form that the present invention is not limited thereto in instructions has been set forth.On the contrary, scope of the present invention is only subject to appended claim restriction.In addition, although inventive features may describe by tying conjunction specific embodiment, those skilled in the art is to be understood that the various features of described embodiment can combine according to the present invention.In the claims, term " comprises " existence not getting rid of other assemblies or step.
In addition, although a plurality of means, assembly or method system are listed separately, such as single unit, processor or controller should be utilized to realize.In addition, although each feature can be contained in different claims, should be advantageously combined, and comprise in different claims and do not mean that the combination of feature is infeasible and/or favourable.In addition, the feature comprised in a class claim does not mean that and is limited to this classification, but represents that this feature is equally applicable to other claim categories.
In addition, feature order in the claims does not also mean that any particular order that must perform, and in claim to a method each step order and do not mean that these steps must perform according to this order.On the contrary, these steps can be performed with any suitable order.In addition, singular reference is not got rid of multiple.Therefore, the term such as " ", " first ", " second " is not got rid of multiple.

Claims (13)

1. be applied to a control method for an operator scheme finite state machine, wherein this operator scheme finite state machine system behavior of one first port deciding a device, is characterized in that:
When the state of this operator scheme finite state machine is a first local state, and a wake request position is when being first logical value, control this operator scheme finite state machine and enter one second local state by this first local state, and control these first end oral instructions and send there is the signal that wakes form up the online buddies to this first port.
2. control method as claimed in claim 1, is characterized in that:
When the state of this operator scheme finite state machine is this second local state, and when this first logical value is changed into from one second logical value in this wake request position, control these first end oral instructions and send there is this signal waking form up this online buddies to this first port.
3. control method as claimed in claim 1, is characterized in that:
When the state of this operator scheme finite state machine is one the 3rd local state, and when this first logical value is changed into from one second logical value in this wake request position, control these first end oral instructions and send the signal with a wake request to this online buddies of this first port.
4. control method as claimed in claim 1, is characterized in that:
When one second port accepts of this device is to having another signal that this wakes form up, this wake request position is set as this first logical value.
5. control method as claimed in claim 4, is characterized in that: when this second port accepts of this device is to having another signal that this wakes form up, this wake request position is set as that the step of this first logical value includes:
When this second port accepts of this device is to having another signal that this wakes form up, and when the selectivity parameter of this first end lancet to this second port is set to a predetermined value, this wake request position is set as this first logical value.
6. control method as claimed in claim 1, is characterized in that:
When this second port accepts of this device is to the signal with a wake request, this wake request position is set as this first logical value.
7. control method as claimed in claim 6, is characterized in that: when this second port accepts of this device is to the signal with this wake request, this wake request position is set as that the step of this first logical value includes:
When this second port accepts of this device is to the signal with this wake request, and when the selectivity parameter of this second port needles to this first port is set to a preset parameter value, this wake request position is set as this first logical value.
8. control method as claimed in claim 1, is characterized in that:
When a upper strata setting wake request of this first port is set as a predetermined value by a upper strata processor of this device, this wake request position is set as this first logical value.
9. control method as claimed in claim 1, is characterized in that:
When a start line signal of this device is a predetermined value, this wake request position is set as this first logical value.
10. control method as claimed in claim 9, is characterized in that: when this start line signal of this device is for this predetermined value, this wake request position is set as that the step of this first logical value includes:
When this start line signal of this device is this predetermined value, and when a start line activation parameter of this first port is a preset parameter value, this wake request position is set as this first logical value.
11. control methods as claimed in claim 1, is characterized in that:
When an overall finite state machine of this device enters a dormancy/replacement sleep/reset state, control this operator scheme finite state machine and enter this first local state; And when this overall finite state machine enters a standby standby state, control this operator scheme finite state machine and enter this second local state.
12. control methods as claimed in claim 11, it is characterized in that: when the state of this operator scheme finite state machine is this first local state, and this wake request position is when being this first logical value, control this operator scheme finite state machine and enter this second local state, and control these first end oral instructions and send and there is this signal waking form up to the step of this online buddies of this first port include:
When the state of this overall finite state machine is one general/safe normal/safety state, and the state of this operator scheme finite state machine is this first local state, and this wake request position is when being this first logical value, control this operator scheme finite state machine and enter this second local state, and control these first end oral instructions and send there is this signal waking form up this online buddies to this first port.
13. control methods as claimed in claim 1, is characterized in that: this device system meets an automobile-used Ethernet standard.
CN201410658016.1A 2014-11-18 2014-11-18 Control method applied to operator scheme finite state machine Active CN104484308B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410658016.1A CN104484308B (en) 2014-11-18 2014-11-18 Control method applied to operator scheme finite state machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410658016.1A CN104484308B (en) 2014-11-18 2014-11-18 Control method applied to operator scheme finite state machine

Publications (2)

Publication Number Publication Date
CN104484308A true CN104484308A (en) 2015-04-01
CN104484308B CN104484308B (en) 2017-12-26

Family

ID=52758851

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410658016.1A Active CN104484308B (en) 2014-11-18 2014-11-18 Control method applied to operator scheme finite state machine

Country Status (1)

Country Link
CN (1) CN104484308B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108874382A (en) * 2017-05-15 2018-11-23 国立民用航空学院 Method and apparatus for handling code

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060218161A1 (en) * 2005-03-23 2006-09-28 Qian Zhang Systems and methods for efficiently compressing and decompressing markup language
CN1993687A (en) * 2004-08-05 2007-07-04 罗伯特·博世有限公司 Message administrator and method for controlling access to data of the message memory of a communications component
CN101187892A (en) * 2006-11-17 2008-05-28 上海高性能集成电路设计中心 Device for real-time monitoring inside of processor
CN101382978A (en) * 2008-10-30 2009-03-11 中国人民解放军国防科学技术大学 Method for early alarming by-path attack in safety chip
US20090070874A1 (en) * 2007-09-12 2009-03-12 Avaya Technology Llc Signature-Free Intrusion Detection
CN101855624A (en) * 2007-09-17 2010-10-06 苹果公司 Methods and apparatus for decreasing power consumption and bus activity
CN102402272A (en) * 2010-09-16 2012-04-04 瑞昱半导体股份有限公司 Electronic device with network connecting function and method applied to same
CN102457851A (en) * 2010-10-29 2012-05-16 瑞昱半导体股份有限公司 Network device with low power consumption and communication method thereof
CN103124947A (en) * 2010-09-29 2013-05-29 诺基亚公司 Method and apparatus for providing low cost programmable pattern recognition

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1993687A (en) * 2004-08-05 2007-07-04 罗伯特·博世有限公司 Message administrator and method for controlling access to data of the message memory of a communications component
US20060218161A1 (en) * 2005-03-23 2006-09-28 Qian Zhang Systems and methods for efficiently compressing and decompressing markup language
US7630997B2 (en) * 2005-03-23 2009-12-08 Microsoft Corporation Systems and methods for efficiently compressing and decompressing markup language
CN101187892A (en) * 2006-11-17 2008-05-28 上海高性能集成电路设计中心 Device for real-time monitoring inside of processor
US20090070874A1 (en) * 2007-09-12 2009-03-12 Avaya Technology Llc Signature-Free Intrusion Detection
CN101855624A (en) * 2007-09-17 2010-10-06 苹果公司 Methods and apparatus for decreasing power consumption and bus activity
CN101382978A (en) * 2008-10-30 2009-03-11 中国人民解放军国防科学技术大学 Method for early alarming by-path attack in safety chip
CN102402272A (en) * 2010-09-16 2012-04-04 瑞昱半导体股份有限公司 Electronic device with network connecting function and method applied to same
CN103124947A (en) * 2010-09-29 2013-05-29 诺基亚公司 Method and apparatus for providing low cost programmable pattern recognition
CN102457851A (en) * 2010-10-29 2012-05-16 瑞昱半导体股份有限公司 Network device with low power consumption and communication method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108874382A (en) * 2017-05-15 2018-11-23 国立民用航空学院 Method and apparatus for handling code

Also Published As

Publication number Publication date
CN104484308B (en) 2017-12-26

Similar Documents

Publication Publication Date Title
TWI536267B (en) Control method applied to operating-mode finite-state-machine and computer readable media
CN101458559B (en) Apparatus and method for power management control
US7254663B2 (en) Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes
CN106487721B (en) The network equipment and for the message forwarding method in the network equipment
CN110708683B (en) Train operation control method and device and computer readable medium
CN100478935C (en) PCIE channel expansion device, system and its collocation method
CN103914418A (en) Processor module, micro-server, and method of using processor module
CN102870374B (en) Load-sharing method and apparatus, and veneer,
JP5859178B1 (en) Communication apparatus and method
CN116301294B (en) System chip low-power-consumption implementation method, system chip, vehicle machine and equipment
CN109358570A (en) Support the controller and its communicating control method of a variety of bus driver communications protocol
JP2012063817A (en) Communication device
CN106874228A (en) Based on I2Communication means between the controller and communication means, multi-controller of C buses
KR20160067595A (en) Method for operating semiconductor device
CN104484308A (en) Control method applied to operating mode finite-state machine and computer readable medium
CN104597814B (en) A kind of system and method for the control system redundancy of high stability
TW201506605A (en) Receiving, at least in part, and/or issuing, at least in part, at least one packet to request change in power consumption state
US7840733B2 (en) Power optimized dynamic port association
JP2017144893A (en) Vehicle communication system
CN102801542A (en) Communication-gateway-based communication redundancy fault-tolerant system
JP2010033506A (en) Duplication system, and active system determination method in duplication system
US7900028B2 (en) Method for initializing bus device
JP5107153B2 (en) Programmable controller system
JP2008217727A (en) Method for changing data copy speed at the time of memory hot plug
JP2008311978A (en) Transit connection unit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant