CN104467766A - Reset circuit applied to radio frequency identification - Google Patents
Reset circuit applied to radio frequency identification Download PDFInfo
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- CN104467766A CN104467766A CN201410734970.4A CN201410734970A CN104467766A CN 104467766 A CN104467766 A CN 104467766A CN 201410734970 A CN201410734970 A CN 201410734970A CN 104467766 A CN104467766 A CN 104467766A
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Abstract
The embodiment of the invention discloses a reset circuit applied to radio frequency identification. The reset circuit comprises a low-drop-out linear voltage stabilizer LDO used for outputting output voltage VDD, a band-gap reference source used for outputting reference voltage VREF, a comparator used for comparing the output voltage VDD and the reference voltage, a D trigger used for delaying a signal output by the comparator according to a delay clock signal, an paraphase amplifier used for receiving the signal output by the D trigger and conducting reversed phase amplification and an NAND gate used for conducting phase and on the signal processed by the paraphase amplifier and obtaining a reset signal. According to the reset circuit, numbers are reset through the reset signal, the problem that the power consumption is excessively large or reset fails in the number reset process is solved, many intermediate states can be avoided, and the reliability of the numbers is improved.
Description
Technical field
The present invention relates to technical field of RFID, especially relate to a kind of reset circuit being applied to radio-frequency (RF) identification.
Background technology
Radio-frequency (RF) identification (Radfo Frequency Identificatiom, RFID) technology is a kind of contactless automatic identification technology, and it is by electromagnetic wave or inductance misfortune conjunction mode transmission of signal, to complete the automatic identification to destination object.Compared with other automatic identification technology such as bar code, magnetic card, Contact Type Ic Card, namely RFID technique have identifying need not manual intervention, can identify that multiple target, information storage are large, can work in the advantages such as various adverse circumstances simultaneously.Therefore, RFID technique has been widely used in the fields such as fixed capital management, production line automation, animal and vehicle identification, highway toll, gate control system, storage, commodity counterfeit prevention, airline baggage management, container management.Typical radio-frequency recognition system can be divided into label, reader and Back end data treatment system three parts.
RFID label tag is mainly divided into passive label and active label two type, the radio-frequency (RF) energy that the energy of the passive radio frequency identification label system of passive type is launched from read write line, need not built-in power, radiofrequency signal is received by antenna, the stabilized power supply REG_VDDA needed for reset circuit and digital circuit is produced through over commutation and voltage stabilizing circuit in inside, piezoelectric voltage on the REG_VDDA that the detection rectification of this reset circuit and voltage stabilizing circuit export, when REG_VDDA voltage reaches the operating voltage range of reset circuit, reset circuit produces reset signal POWER_READY and resets to digital circuit, digital circuit be initialized to determine state after export the amplitude limiter circuit that digital logic control signals controls rectification circuit in radio-frequency front-end, when extremely strong field, the electric charge that rectifier exports is discharged into ground by conducting leakage switch, the limited radio frequency front-end devices of protection voltage endurance capability is played with this, when pole feeble field is strong, turns off leakage switch to control the REG_VDDA voltage of rectification and voltage stabilizing circuit stable output, ensure that whole system has enough electric energy work.
Electrification reset module is all important module for any a chip, and the mixing of high accuracy electrification reset module logarithmic mode and digital module are by vital effect.
But in power up, piezoelectric voltage on REG_VDDA is detected by reset circuit, when REG_VDDA voltage does not reach the working range of reset circuit, digital circuit can not be reset, when reset signal not yet provides, the power supply of digital logic system is uncertain, the control signal that this digital logic system exports also is in not driven indeterminate state, the state that this indefinite state can make the leakage switch of amplitude limiter circuit be in or open or close, cause uncontrollable charge leakage, accurately cannot export effective digital logic control signals maintenance REG_VDDA voltage stabilization by control figure circuit, the efficiency of influential system rectification, namely the sensitivity under weak-field condition, more serious situation is that this indefinite state can make passive passive radio frequency tag system cannot complete electrification reset function, cause system cloud gray model unstable.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, the invention provides a kind of reset circuit being applied to radio-frequency (RF) identification, the numeral that resets is gone by reset signal, a lot of intermediateness can be avoided, when solving digital reset, the excessive or unsuccessful problem that resets of power consumption, improves the reliability of numeral.
In order to solve the problem, the present invention proposes a kind of reset circuit being applied to radio-frequency (RF) identification, described reset circuit comprises:
Low pressure difference linear voltage regulator (Low Dropout Regulator, LDO), for exporting output voltage VDD;
Band gap reference, for output reference voltage VREF;
Comparator, for carrying out voltage compare to output voltage VDD and reference voltage;
D type flip flop, for postponing the signal that described comparator exports according to delay clock signals;
Inverting amplifier, the signal exported for receiving described d type flip flop carries out negate amplification;
NAND gate, carries out and acquisition reset signal for the signal after handled by described inverting amplifier.
Preferably, described d type flip flop comprises at least three d type flip flops connected successively.
Preferably, when output voltage VDD reaches electrification reset voltage, described comparator is for exporting a reset initialize signal.
In embodiments of the present invention, go by reset signal the numeral that resets, when solving digital reset, the excessive or unsuccessful problem that resets of power consumption, can avoid a lot of intermediateness, improve the reliability of numeral; The impact on the decoding of wireless radio frequency identification mark chip receiving path, synchronous, transmission path inverse signal bit rate precision, coding, duty ratio etc. of integrated circuit fabrication process, applied environment and temperature can be solved, reduce the power consumption of label chip, improve the rate of finished products of chip.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the composition schematic diagram being applied to the reset circuit of radio-frequency (RF) identification of the embodiment of the present invention;
Fig. 2 is the waveform schematic diagram of reset circuit in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Fig. 1 is the composition schematic diagram being applied to the reset circuit of radio-frequency (RF) identification of the embodiment of the present invention, and as shown in Figure 1, this reset circuit comprises:
Low pressure difference linear voltage regulator LDO, for exporting output voltage VDD;
Band gap reference, for output reference voltage VREF;
Comparator, for carrying out voltage compare to output voltage VDD and reference voltage;
D type flip flop, for postponing the signal that comparator exports according to delay clock signals;
Inverting amplifier, the signal exported for receiving d type flip flop carries out negate amplification;
NAND gate, carries out and acquisition reset signal for the signal after handled by inverting amplifier.
In concrete enforcement, this d type flip flop comprises at least three d type flip flops connected successively, for receiving three delayed clocks, as shown in Figure 1.
When output voltage VDD reaches electrification reset voltage, comparator is for exporting a reset initialize signal.
Fig. 2 shows the schematic diagram of waveform in the embodiment of the present invention.In implementation process, the access of power supply is risen by the output voltage VDD of LDO, the dividing potential drop of VDD and VREF is compared, when VDD reach electrification reset voltage (
) time, comparator exports a reset initialize signal, because this signal is unfavorable for digital processing, the power consumption excessive or problem such as unsuccessful that resets when can cause digital reset, so add latter half of reset signal process, comparator is exported and is undertaken postponing (generally wanting more than 3 clocks) by d type flip flop, then use inverting amplifier (inverter) negate, then export the reset signal of carrying out with obtaining an impulse form with comparator (NAND gate).
In embodiments of the present invention, go by reset signal the numeral that resets, when solving digital reset, the excessive or unsuccessful problem that resets of power consumption, can avoid a lot of intermediateness, improve the reliability of numeral; The impact on the decoding of wireless radio frequency identification mark chip receiving path, synchronous, transmission path inverse signal bit rate precision, coding, duty ratio etc. of integrated circuit fabrication process, applied environment and temperature can be solved, reduce the power consumption of label chip, improve the rate of finished products of chip.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment is that the hardware that can carry out instruction relevant by program has come, this program can be stored in a computer-readable recording medium, storage medium can comprise: read-only memory (ROM, Read OnlyMemory), random access memory (RAM, Random Access Memory), disk or CD etc.
In addition, above the reset circuit being applied to radio-frequency (RF) identification that the embodiment of the present invention provides is described in detail, apply specific case herein to set forth principle of the present invention and execution mode, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (3)
1. be applied to a reset circuit for radio-frequency (RF) identification, it is characterized in that, described reset circuit comprises:
Low pressure difference linear voltage regulator LDO, for exporting output voltage VDD;
Band gap reference, for output reference voltage VREF;
Comparator, for carrying out voltage compare to output voltage VDD and reference voltage;
D type flip flop, for postponing the signal that described comparator exports according to delay clock signals;
Inverting amplifier, the signal exported for receiving described d type flip flop carries out negate amplification;
NAND gate, carries out and acquisition reset signal for the signal after handled by described inverting amplifier.
2. be applied to the reset circuit of radio-frequency (RF) identification as claimed in claim 1, it is characterized in that, described d type flip flop comprises at least three d type flip flops connected successively.
3. be applied to the reset circuit of radio-frequency (RF) identification as claimed in claim 1, it is characterized in that, when output voltage VDD reaches electrification reset voltage, described comparator is for exporting a reset initialize signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410734970.4A CN104467766A (en) | 2014-12-05 | 2014-12-05 | Reset circuit applied to radio frequency identification |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410734970.4A CN104467766A (en) | 2014-12-05 | 2014-12-05 | Reset circuit applied to radio frequency identification |
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| Publication Number | Publication Date |
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| CN104467766A true CN104467766A (en) | 2015-03-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410734970.4A Pending CN104467766A (en) | 2014-12-05 | 2014-12-05 | Reset circuit applied to radio frequency identification |
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| CN (1) | CN104467766A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108008179A (en) * | 2017-11-30 | 2018-05-08 | 无锡中微爱芯电子有限公司 | A kind of built-in MCU can switching at runtime voltage detecting point low-voltage detection circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070159217A1 (en) * | 2006-01-09 | 2007-07-12 | Johnny Chan | Power down detection circuit |
| CN101882864A (en) * | 2010-06-25 | 2010-11-10 | 杭州矽力杰半导体技术有限公司 | Electrifying startup circuit and electrifying startup method thereof |
| CN101938269A (en) * | 2009-06-30 | 2011-01-05 | 瑞昱半导体股份有限公司 | Starting-up reset circuit |
| CN103095265A (en) * | 2012-11-13 | 2013-05-08 | 长沙景嘉微电子股份有限公司 | Automatic reset detection circuit for power up and power failure |
-
2014
- 2014-12-05 CN CN201410734970.4A patent/CN104467766A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070159217A1 (en) * | 2006-01-09 | 2007-07-12 | Johnny Chan | Power down detection circuit |
| CN101938269A (en) * | 2009-06-30 | 2011-01-05 | 瑞昱半导体股份有限公司 | Starting-up reset circuit |
| CN101882864A (en) * | 2010-06-25 | 2010-11-10 | 杭州矽力杰半导体技术有限公司 | Electrifying startup circuit and electrifying startup method thereof |
| CN103095265A (en) * | 2012-11-13 | 2013-05-08 | 长沙景嘉微电子股份有限公司 | Automatic reset detection circuit for power up and power failure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108008179A (en) * | 2017-11-30 | 2018-05-08 | 无锡中微爱芯电子有限公司 | A kind of built-in MCU can switching at runtime voltage detecting point low-voltage detection circuit |
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Application publication date: 20150325 |