CN104464599B - Drive circuit, driving method and display device - Google Patents
Drive circuit, driving method and display device Download PDFInfo
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- CN104464599B CN104464599B CN201410821766.6A CN201410821766A CN104464599B CN 104464599 B CN104464599 B CN 104464599B CN 201410821766 A CN201410821766 A CN 201410821766A CN 104464599 B CN104464599 B CN 104464599B
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Abstract
The invention discloses a kind of drive circuit, driving method and display device, by scanning odd level shift register and even level shift register respectively, and, when driving odd level shift register and even level shift register respectively to the signal of respective pixel input opposed polarity, as it can be seen that when scanning a frame picture, the signal inversion that need to be only inputted to pixel is once, the power consumption being greatly reduced during driving, improves the service life of display device power supply；And, drive circuit provided by the invention, all shift registers are divided into two groups and are arranged on display area both sides, and the shift register group of both sides includes the shift register of at least one odd level shift register and at least one even level, therefore, avoid the occurrence of during driving, the shift register group of both sides only has one group of work, and another group of situation for treating to work again after the completion of another group, realize visual homogeneity.
Description
Technical field
The present invention relates to display technology field, more specifically, is related to a kind of drive circuit, driving method and display dress
Put.
Background technology
The type of drive of existing display device includes：Frame reversion (Frame Inversion) mode, line reversion (Line
Inversion) mode and dot inversion (Dot Inversion) mode, wherein, use dot inversion to be filled for the display of type of drive
Put, improve the phenomenon of cross-talk, improve display effect.But existing dot inversion mode power consumption is big, display is shortened
The service life of installation's power source.
The content of the invention
In view of this, the present invention provides a kind of drive circuit, driving method and display device, display device are anti-using point
Turn type of drive, on the basis of it ensure that display effect height, greatly reduce the power consumption during driving, improve display dress
Put the service life of power supply.
To achieve the above object, technical solution provided by the invention is as follows：
A kind of drive circuit, applied to display device, the display device includes display area and positioned at display area two
The non-display area of side, includes pel array, the pel array includes the first row pixel to Nth row positioned at the display area
To m column pixel, N and M are the integer not less than 4 for pixel and first row pixel, and the drive circuit is used to drive the picture
Pixel array, the drive circuit include：
First order shift register is corresponding respectively to drive the first row pixel to Nth row picture to N grades of shift registers
Element, the first order shift register to N grades of shift registers include the first shift register group and the second shift register
Group, and the first shift register group and the second shift register group are located at the non-display area of the display device both sides respectively
Domain, the first shift register group and the second shift register group include at least one odd level shift register and extremely
The shift register of a few even level；
Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, own
It is connected step by step between even level shift register.
Correspondingly, present invention also offers a kind of driving method, applied to drive circuit, the drive circuit is applied to aobvious
Showing device, the display device includes display area and the non-display area positioned at display area both sides, positioned at the viewing area
Domain includes pel array, and the pel array includes the first row pixel to nth row of pixels and first row pixel to m column pixel, N
It is the integer not less than 4 with M, the drive circuit is used to drive the pel array, and the drive circuit includes：
First order shift register is corresponding respectively to drive the first row pixel to Nth row picture to N grades of shift registers
Element, the first order shift register to N grades of shift registers include the first shift register group and the second shift register
Group, and the first shift register group and the second shift register group are located at the non-display area of the display device both sides respectively
Domain, the first shift register group and the second shift register group include at least one odd level shift register and extremely
A few even level shift register；
Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, own
It is connected step by step between even level shift register, the driving method includes：
Before scanning during a frame picture：
All odd level shift LDs in the first order shift register to N grades of shift registers are scanned step by step
Device, while the first data-signal is inputted to odd column pixel, dual sequence pixel inputs the second data-signal, wherein, described the
The opposite polarity of the polarity of one data-signal and the second data-signal；
After all odd level shift registers are scanned, all even level shift registers are scanned step by step, at the same it is right
The odd column pixel inputs second data-signal, and first data-signal is inputted to the even column pixels；
After scanning during a frame picture：
After the former frame picture is scanned, all odd level shift registers are scanned step by step, while to described strange
Ordered series of numbers pixel inputs second data-signal, and first data-signal is inputted to the even column pixels；
After all odd level shift registers are scanned, all even level shift registers are scanned step by step, at the same it is right
The odd column pixel inputs the first data-signal, and the second data-signal is inputted to the even column pixels.
Correspondingly, present invention also offers a kind of display device, including above-mentioned drive circuit.
Compared to the prior art, at least specific advantages below of technical solution provided by the invention：
A kind of drive circuit, driving method and display device provided by the invention, drive circuit include first order displacement and post
Storage is corresponding respectively to drive the first row pixel to nth row of pixels, the first order displacement to post to N grades of shift registers
Storage to N grades of shift registers include the first shift register group and the second shift register group, and first displacement is posted
Storage group and the second shift register group are located at the non-display area of the display device both sides, first shift LD respectively
Device group and the second shift register group include the displacement of at least one odd level shift register and at least one even level
Register；Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, own
It is connected step by step between even level shift register.When being driven to drive circuit, before scanning during a frame picture：Sweep step by step
All odd level shift registers in the first order shift register to N grades of shift registers are retouched, while to odd column
Pixel inputs the first data-signal, and dual sequence pixel inputs the second data-signal, wherein, the polarity of first data-signal
With the opposite polarity of the second data-signal；After all odd level shift registers are scanned, all even levels are scanned step by step
Shift register, while second data-signal is inputted to the odd column pixel, to described in even column pixels input
First data-signal；After scanning during a frame picture：After the former frame picture is scanned, all odd levels are scanned step by step
Shift register, while second data-signal is inputted to the odd column pixel, to described in even column pixels input
First data-signal；After all odd level shift registers are scanned, all even level shift registers are scanned step by step, together
When to the odd column pixel input the first data-signal, to the even column pixels input the second data-signal.
As shown in the above, technical solution provided by the invention, by scanning odd level shift register and idol respectively
Several levels shift register, and, when driving odd level shift register and even level shift register respectively to respective pixel
Input opposed polarity signal, it is seen then that when scan a frame picture, only need to pixel input signal inversion once, pole
The big power consumption reduced during driving, improves the service life of display device power supply；Moreover, driving provided by the invention
All shift registers are divided into two groups and are arranged on display area both sides by circuit, and the shift register group of both sides includes
The shift register of at least one odd level shift register and at least one even level, therefore, avoids the occurrence of in driving process
In, the shift register groups of both sides only has one group of work, and another group of situation for treating to work again after the completion of another group, improves and regards
Homogeneity in feel.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of structure distribution schematic diagram of display device provided by the embodiments of the present application；
Fig. 2 is a kind of structure diagram of drive circuit provided by the embodiments of the present application；
Fig. 3 a are the structure diagram of another drive circuit provided by the embodiments of the present application；
Fig. 3 b are the structure diagram of another drive circuit provided by the embodiments of the present application；
Fig. 4 a are a kind of sequence diagram provided by the embodiments of the present application；
Fig. 4 b are a kind of signal polarity distribution map of former frame picture provided by the embodiments of the present application；
Fig. 4 c are a kind of signal polarity distribution map of a later frame picture provided by the embodiments of the present application.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without making creative work
Embodiment, belongs to the scope of protection of the invention.
As described in background, the type of drive of existing display device includes：Frame inversion mode, line inversion mode and
Dot inversion mode, wherein, using the display device of dot inversion type of drive, the phenomenon of cross-talk is improved, improves display
Effect.But existing dot inversion mode power consumption is big, the service life of display device power supply is shortened.
Based on this, a kind of drive circuit provided by the embodiments of the present application, applied to display device, with reference to Fig. 1 to Fig. 4 c institutes
Show, driving circuit structure provided by the embodiments of the present application is described in detail.
Drive circuit provided by the embodiments of the present application, applied to display device, refering to what is shown in Fig. 1, being the embodiment of the present application
A kind of structure distribution schematic diagram of the display device provided, display device include display area A and positioned at display area A both sides
Non-display area B, display area A include pel array, and pel array includes the first row pixel to nth row of pixels and first row picture
Plain P1 is to the integer that m column pixel Pm, N and M are not less than 4.Non-display area B is provided with drive circuit VSR, the driving
Circuit VSR is used to drive pel array.Wherein, the first row pixel to nth row of pixels is connected respectively first grid polar curve G1 extremely
N gate lines G n, and, first row pixel P1 to m column pixel Pm is connected respectively the first data cable S1 to m data cables
Sm, wherein, the signal input part of first grid polar curve G1 to N gate lines Gs n are respectively connected to the first displacement in drive circuit VSR
Register to N shift registers signal output part, and then, by shift register drive respective pixel open line by line, and
Pixel input data signal by data cable to opening afterwards.
Wherein, refering to what is shown in Fig. 2, being a kind of structure diagram of drive circuit provided by the embodiments of the present application, driving electricity
Road includes：
First order shift register SR1 to N grades shift register SRn, it is corresponding respectively to drive the first row pixel to Nth row
Pixel, first order shift register SR1 to N grades shift register SRn include the first shift register group 100 and the second displacement
Register group 200, and the first shift register group 100 and the second shift register group 200 are respectively positioned at display device both sides
Non-display area B, the first shift register group 100 and the second shift register group 200 include at least one odd level and move
The shift register of bit register and at least one even level；
Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, own
It is connected step by step between even level shift register.
Specifically, it is same as the prior art, when shift register provided by the embodiments of the present application needs to receive one few
Clock signal, corresponding scanning signal is exported to be controlled to shift register, this embodiment of the present application is not made unnecessary superfluous
State.
As shown in the above, technical solution provided by the embodiments of the present application is needed first order shift register to N
Level shift register is divided into two groups, it is preferred that along first order shift register to the direction of N grades of shift registers, per two-stage
Shift register is one group, and multigroup shift register alternately belongs to the first shift register group and the second shift register
Group；In addition, in the application other embodiment, can also be otherwise to first order shift register to N grades of displacements
Register is grouped, such as alternately belongs to the first shift register group and the second shift unit group etc. per three-level shift register,
This is not specifically limited.
For the drive circuit that apparent explanation the application provides, the application is using the quantity of shift register as 8
Illustrate, i.e., drive circuit includes first order shift register to the 8th grade of shift register.Wherein,
It is the structure diagram of another drive circuit provided by the embodiments of the present application with reference to shown in figure 3a, wherein, IN is
Input terminal, OUT are output terminal, and drive circuit includes first order shift register SR1 to the 8th grades of shift register SR8, and edge
The direction of first order shift register SR1 to the 8th grades of shift register SR8, alternately belongs to the first shifting per two-stage shift register
100 and second shift register group 200 of bit register group, the first shift register group 100 and the second shift register group 200 are divided
The non-display area B of display area A both sides is not arranged at.All odd level shift registers of any one shift register group
In, the output terminal of previous stage shift register is connected to the input terminal of rear stage shift register；Specifically, with reference to figure 3a institutes
Show, the odd level shift register in the first shift register group 100 has first order shift register SR1 and level V displacement
Register SR5, and the input terminal of first order shift register SR1 connects corresponding open signal, first order shift register SR1
Output terminal be connected to the input terminal of level V shift register SR5；And the odd level in the second shift register group 200 moves
Bit register has third level shift register SR3 and the 7th grade of shift register SR7, and third level shift register SR3's is defeated
Enter end and connect corresponding open signal, and the output terminal of third level shift register SR3 is connected to the 7th grade of shift register SR7
Input terminal；
And for even level shift register, in all even level shift registers of any one shift register group,
The output terminal of previous stage shift register is connected to the input terminal of rear stage shift register.That is, with reference to shown in figure 3a, first
Even level shift register in shift register group 100 includes second level shift register SR2 and the 6th grade of shift register
SR6, and the input terminal of second level shift register SR2 connects corresponding open signal, the output of second level shift register SR2
End is connected to the input terminal of the 6th grade of shift register SR6；And the even level shift LD in the second shift register group 200
Device includes fourth stage shift register SR4 and the 8th grade of shift register SR8, and the input terminal of fourth stage shift register SR4
Corresponding open signal is connected, the output terminal of fourth stage shift register SR4 is connected to the input of the 8th grade of shift register SR8
End；
The drive circuit provided is corresponded to for Fig. 3 a, is moved during drive circuit works, it is necessary to scan the first order step by step
Bit register, third level shift register, level V shift register and the 7th grade of shift register, then scan step by step again
Two level shift register, fourth stage shift register, the 6th grade of shift register and the 8th grade of shift register, to ensure one
When in frame picture scanning process to pel array input data signal, the data-signal polarity of data cable input is only occurred once
Saltus step.
In fig. 3 a in corresponding drive circuit, its scanning for even level shift register will be shifted along the second level and posted
Storage is to the direction of the 8th grade of shift register.In addition, by the change of the structure connection relation to drive circuit, sweeping step by step
After having retouched odd level shift register, it can also be swept step by step along the 8th grade of shift register to the direction of second level shift register
Retouch even level shift register.It is the structure of another drive circuit provided by the embodiments of the present application with specific reference to shown in Fig. 3 b
For schematic diagram, it is necessary to illustrate, the driving circuit section provided with Fig. 3 a of the drive circuit provided in the application Fig. 3 b is identical,
Difference exists：The drive circuit that the application Fig. 3 b are provided, in all even level shift LDs of any one shift register group
In device, the output terminal of rear stage shift register is connected to the input terminal of previous stage shift register；Specifically, with reference to figure 3b institutes
Show, the even level shift register in the first shift register group 100 includes second level shift register SR2 and the 6th grade of shifting
Bit register SR6, and the output terminal of the 6th grade of shift register SR6 is connected to the input terminal of second level shift register SR2；And
Even level shift register in the second shift register group 200 includes fourth stage shift register SR4 and the 8th grade of displacement
Register SR8, and the output terminal of the 8th grade of shift register SR8 is connected to the input terminal of second level shift register SR2；This Shen
Please the drive circuits that provide of Fig. 3 b, it is necessary to scan first order shift register, the third level step by step during drive circuit works
Shift register, level V shift register and the 7th grade of shift register, then again step by step scan the 8th grade of shift register,
6th grade of shift register, fourth stage shift register and second level shift register, to ensure in a frame picture scanning process
In to pel array input data signal when, to data cable input data-signal polarity a saltus step only occurs.
Further, in any one shift register group, the output terminal of last odd level shift register is connected to most
The input terminal of latter even level shift register, i.e. when all even level shift registers of any one shift register group
In, when the output terminal of rear stage shift register is connected to the input terminal of previous stage shift register, in each shift register
In group, the output terminal of last odd level shift register is connected to the input terminal of last even level shift register；Specifically
, with reference to shown in figure 3b, in the first shift register group 100, last odd level shift register is posted for level V displacement
Storage SR5, and last even level shift register is the 6th grade of shift register SR6, and level V shift register SR5
Output terminal is connected to the input terminal of the 6th grade of shift register SR6；And in the second shift register group 200, last odd number
Level shift register is the 7th grade of shift register SR7, and last even level shift register is the 8th grade of shift register
SR8, and the output terminal of the 7th grade of shift register SR7 is connected to the input terminal of the 8th grade of shift register SR8, in any one shifting
, can be by the output of last odd level shift register after odd level shift register is scanned in bit register group
Input signal of the signal as last even level shift register, is posted with opening even level displacement in respective shift register group
The scanning of storage.
The drive circuit provided with above-described embodiment has correspondingly, the embodiment of the present application additionally provides a kind of driving method
Body, with reference to shown in Fig. 4 a to Fig. 4 c, driving method provided by the embodiments of the present application is described in detail, wherein, Fig. 4 a
For a kind of sequence diagram provided by the embodiments of the present application, Fig. 4 b are a kind of pickup electrode of former frame picture provided by the embodiments of the present application
Property distribution map, Fig. 4 c are a kind of signal polarity distribution map of a later frame picture provided by the embodiments of the present application.
Wherein, with reference to shown in figure 4b or Fig. 4 c, drive circuit is applied to display device, and display device includes display area A
With the non-display area B positioned at display area A both sides, include pel array positioned at display area A, pel array includes the first row
Pixel is used for nth row of pixels and first row pixel P1 to the integer that m column pixel Pm, N and M are not less than 4, drive circuit
Pel array is driven, drive circuit includes：
First order shift register SR1 to N grades shift register SRn, it is corresponding respectively to drive the first row pixel to Nth row
Pixel, first order shift register SR1 to N grades shift register SRn include the first shift register group 100 and the second displacement
Register group 200, and the first shift register group 100 and the second shift register group 200 are respectively positioned at display device both sides
Non-display area B, the first shift register group 100 and the second shift register group 200 include at least one odd level and move
The shift register of bit register and at least one even level；
Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, own
It is connected step by step between even level shift register；Wherein, the first row pixel to nth row of pixels is connected respectively first grid polar curve
G1 to N gate lines G n, and, first row pixel P1 to m column pixel Pm is connected respectively the first data cable S1 to m numbers
According to line Sm, by data cable to pixel input data signal, wherein, the signal input of first grid polar curve G1 to N gate lines Gs n
End is respectively connected in drive circuit VSR the first shift register to the signal output part of N shift registers.Carried with reference to Fig. 4 a
The sequence diagram of confession, wherein, using N as even number, M is odd number, and, using the polarity of the first data line signal as just, the second data are believed
Number polarity to illustrate exemplified by negative, and Si signals are expressed as odd data line in Fig. 4 a, and Sj signals are expressed as even data
Line, wherein, driving method provided by the embodiments of the present application includes：
Shown in corresponding reference chart 4b, before scanning during a frame picture Frame1：
With reference to shown in figure 4a, scan step by step all in first order shift register SR1 to N grades shift register SRn
Odd level shift register, while the first data-signal is inputted to odd column pixel, dual sequence pixel inputs the second data letter
Number, wherein, the opposite polarity of the polarity of the first data-signal and the second data-signal；
After all odd level shift registers are scanned, all even level shift registers are scanned step by step, at the same it is right
Odd column pixel inputs the second data-signal, and dual sequence pixel inputs the first data-signal；
After scanning during a frame picture Frame2：
With reference to shown in figure 4b, after former frame picture is scanned, all odd level shift registers are scanned step by step, at the same time
The second data-signal is inputted to odd column pixel, dual sequence pixel inputs the first data-signal；
After all odd level shift registers are scanned, all even level shift registers are scanned step by step, at the same it is right
Odd column pixel inputs the first data-signal, and dual sequence pixel inputs the second data-signal.
It is to scan the second level step by step in the scan mode for even level shift register according to sequence diagram in Fig. 4 a
Shift register, fourth stage shift register to N grades of shift registers, i.e., driving method provided by the embodiments of the present application are right
The scan method of even level shift register can be along minimum even level shift register to maximum even level shift register
Direction, scans even level shift register, is then for the structure of drive circuit step by step：In the institute of any one shift register group
Have in odd level shift register, the output terminal of previous stage shift register is connected to the input terminal of rear stage shift register；
Wherein, in all even level shift registers of any one shift register group, previous stage shift register it is defeated
Outlet is connected to the input terminal of rear stage shift register, then scanning even level shift register includes step by step：
Along minimum even level shift register to the direction of maximum even level shift register, even level displacement is scanned step by step
Register.
In addition, the driving method that the application provides, the scan mode of antithesis several levels shift register can also be even along maximum
Several levels shift register scans even level shift register, then for driving step by step to the direction of minimum even level shift register
The structure of dynamic circuit is：In all odd level shift registers of any one shift register group, previous stage shift register
Output terminal is connected to the input terminal of rear stage shift register；
Wherein, in all even level shift registers in any one shift register group, previous stage shift register
Output terminal be connected to the input terminal of rear stage shift register, alternatively, in any one shift register group, last odd number
The output terminal of level shift register is connected to the input terminal of last even level shift register, then scans even level displacement step by step
Register includes：
Along maximum even level shift register to the direction of minimum even level shift register, even level displacement is scanned step by step
Register.
It should be noted that for the scan mode of above two antithesis several levels shift register, the embodiment of the present application is not
Concrete restriction is done, it is necessary to according to the drive circuit of actual fabrication, to be chosen to type of drive.
Correspondingly, the embodiment of the present application additionally provides a kind of display device, display device includes drive circuit, wherein, drive
The drive circuit that dynamic circuit provides for above-mentioned any one embodiment.
A kind of drive circuit, driving method and display device provided by the embodiments of the present application, drive circuit include the first order
Shift register is corresponding respectively to drive the first row pixel to nth row of pixels, the first order to N grades of shift registers
Shift register to N grades of shift registers include the first shift register group and the second shift register group, and described first
Shift register group and the second shift register group are located at the non-display area of the display device both sides respectively, and described first moves
Bit register group and the second shift register group include at least one odd level shift register and at least one even level
Shift register；Wherein, it is connected step by step between all odd level shift registers in any one shift register group, with
And it is connected step by step between all even level shift registers.When being driven to drive circuit, a frame picture before scanning
When：All odd level shift registers in the first order shift register to N grades of shift registers are scanned step by step, at the same time
The first data-signal is inputted to odd column pixel, dual sequence pixel inputs the second data-signal, wherein, the first data letter
Number polarity and the second data-signal opposite polarity；After all odd level shift registers are scanned, institute is scanned step by step
There is even level shift register, while second data-signal is inputted to the odd column pixel, to the even column pixels
Input first data-signal；After scanning during a frame picture：After the former frame picture is scanned, institute is scanned step by step
There is odd level shift register, while second data-signal is inputted to the odd column pixel, to the even column pixels
Input first data-signal；After all odd level shift registers are scanned, all even level displacements are scanned step by step
Register, while the first data-signal is inputted to the odd column pixel, the second data-signal is inputted to the even column pixels.
As shown in the above, technical solution provided by the embodiments of the present application, by scanning odd level shift LD respectively
Device and even level shift register, and, when driving odd level shift register and even level shift register respectively to right
Answer the signal of pixel input opposed polarity, it is seen then that, only need to be to the signal inversion one of pixel input when scanning a frame picture
Power consumption that is secondary, being greatly reduced during driving, improves the service life of display device power supply；Moreover, the application is implemented
All shift registers are divided into two groups and are arranged on display area both sides, and the shift LD of both sides by the drive circuit that example provides
Device group includes the shift register of at least one odd level shift register and at least one even level, therefore, avoids out
Now during driving, the shift register group of both sides only has one group of work, and another group is treated what is worked again after the completion of another group
Situation, improves visual homogeneity.
Claims (10)
1. a kind of drive circuit, applied to display device, it is characterised in that the display device includes display area and positioned at aobvious
Show the non-display area of region both sides, the display area includes pel array, and the pel array includes the first row pixel extremely
To m column pixel, N and M are the integer not less than 4 for nth row of pixels and first row pixel, and the drive circuit is used to drive institute
Pel array is stated, the drive circuit includes：
First order shift register is corresponding respectively to drive the first row pixel to nth row of pixels to N grades of shift registers,
The first order shift register to N grades of shift registers include the first shift register group and the second shift register group,
And the first shift register group and the second shift register group are located at the non-display area of the display device both sides respectively,
The first shift register group and the second shift register group include at least one odd level shift register and at least
The shift register of one even level；
Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, all even numbers
Level shift register between be connected step by step, alternately to the first order shift register into N grade shift registers it is all very
Several levels shift register and all even level shift registers scan respectively, and, posted driving the odd level displacement respectively
To the signal of respective pixel input opposed polarity when storage and the even level shift register.
2. drive circuit according to claim 1, it is characterised in that along the first order shift register to N grades shifting
The direction of bit register, alternately belongs to the first shift register group for one group per two-stage shift register and the second displacement is posted
Storage group.
3. drive circuit according to claim 1, it is characterised in that all odd levels of any one shift register group move
In bit register, the output terminal of previous stage shift register is connected to the input terminal of rear stage shift register.
4. drive circuit according to claim 3, it is characterised in that all even levels of any one shift register group move
In bit register, the output terminal of previous stage shift register is connected to the input terminal of rear stage shift register.
5. drive circuit according to claim 3, it is characterised in that all even levels of any one shift register group move
In bit register, the output terminal of rear stage shift register is connected to the input terminal of previous stage shift register.
6. drive circuit according to claim 5, it is characterised in that in any one shift register group, last odd number
The output terminal of level shift register is connected to the input terminal of last even level shift register.
7. a kind of driving method, applied to drive circuit, the drive circuit is applied to display device, it is characterised in that described
Display device includes display area and the non-display area positioned at display area both sides, includes pixel battle array positioned at the display area
Row, the pel array include the first row pixel to nth row of pixels and first row pixel to m column pixel, and N and M are not small
In 4 integer, the drive circuit is used to drive the pel array, and the drive circuit includes：
First order shift register is corresponding respectively to drive the first row pixel to nth row of pixels to N grades of shift registers,
The first order shift register to N grades of shift registers include the first shift register group and the second shift register group,
And the first shift register group and the second shift register group are located at the non-display area of the display device both sides respectively,
The first shift register group and the second shift register group include at least one odd level shift register and at least
One even level shift register；
Wherein, it is connected step by step between all odd level shift registers in any one shift register group, and, all even numbers
It is connected step by step between level shift register, the driving method includes：
Before scanning during a frame picture：
All odd level shift registers in the first order shift register to N grades of shift registers are scanned step by step, together
When to odd column pixel input the first data-signal, dual sequence pixel input the second data-signal, wherein, first data
The opposite polarity of the polarity of signal and the second data-signal；
After all odd level shift registers are scanned, all even level shift registers are scanned step by step, while to described
Odd column pixel inputs second data-signal, and first data-signal is inputted to the even column pixels；
After scanning during a frame picture：
After the former frame picture is scanned, all odd level shift registers are scanned step by step, while to the odd column
Pixel inputs second data-signal, and first data-signal is inputted to the even column pixels；
After all odd level shift registers are scanned, all even level shift registers are scanned step by step, while to described
Odd column pixel inputs the first data-signal, and the second data-signal is inputted to the even column pixels.
8. driving method according to claim 7, it is characterised in that all odd levels of any one shift register group move
In bit register, the output terminal of previous stage shift register is connected to the input terminal of rear stage shift register；
Wherein, in all even level shift registers of any one shift register group, the output terminal of previous stage shift register
The input terminal of rear stage shift register is connected to, then the even level shift register of scanning step by step includes：
Along minimum even level shift register to the direction of maximum even level shift register, even level shift LD is scanned step by step
Device.
9. driving method according to claim 7, it is characterised in that all odd levels of any one shift register group move
In bit register, the output terminal of previous stage shift register is connected to the input terminal of rear stage shift register；
Wherein, in all even level shift registers in any one shift register group, previous stage shift register it is defeated
Outlet is connected to the input terminal of rear stage shift register, alternatively, in any one shift register group, last odd level moves
The output terminal of bit register is connected to the input terminal of last even level shift register, then described to scan even level displacement step by step
Register includes：
Along maximum even level shift register to the direction of minimum even level shift register, even level shift LD is scanned step by step
Device.
10. a kind of display device, it is characterised in that including the drive circuit described in claim 1~6 any one.
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| CN106504696B (en) * | 2016-12-29 | 2018-12-14 | 上海天马有机发光显示技术有限公司 | Display panel and display device comprising it |
| CN107633813B (en) * | 2017-09-15 | 2019-08-27 | 上海天马有机发光显示技术有限公司 | A kind of electroluminescence display panel, its driving method and display device |
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