CN104461395A - Novel computer memory system and computer system - Google Patents
Novel computer memory system and computer system Download PDFInfo
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- CN104461395A CN104461395A CN201410776291.3A CN201410776291A CN104461395A CN 104461395 A CN104461395 A CN 104461395A CN 201410776291 A CN201410776291 A CN 201410776291A CN 104461395 A CN104461395 A CN 104461395A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
Abstract
The invention discloses a novel computer memory system and a computer system. A cache module is used for dynamically storing frequently-used data in a main memory module, the main memory module is used for dynamically storing frequently-used data in a secondary main memory module which is used for dynamically storing frequently-used data in an external memory module, and the system reads data of the cache module, the main memory module, the secondary main memory module and the external memory module sequentially from high priority to low priority. By adoption of the novel computer memory system and the computer system, performance of the whole memory system can be improved while speed of the whole memory system can be increased, and the problem of contradiction between capacity and speed of the main memory module in the prior art is solved. In addition, if a nonvolatile memory medium storage operating system is adopted for the secondary main memory module, reading efficiency of the operating system can be improved, and the secondary main memory module which is arranged additionally is low in cost. Moreover, the memory system is higher in flexibility and expandability without increasing load of a memory system processor, and memory performance is improved.
Description
Technical field
The present invention relates to a kind of novel computer storage system and computer system, more specifically, the invention still further relates to a kind of stagewise computer memory system.
Background technology
In general, the memory device of stagewise computing machine generally comprises cache module, main memory module and outer storing module tertiary structure, wherein cache module mainly refers to level cache, the L2 cache of CPU, three grades of buffer memorys are also provided with for high-end computer, main memory module (MainMemory) is exactly the memory modules often said, outer storing module (Auxiliary Memory) generally comprises other peripheral storage devices.According to probability statistics, within the time of 90%, CPU only conducts interviews to the storage content of lO%, in order to improve speed, increase capacity, reduce costs, all extensively adopt multi-level memory construction in current all kinds of computing machine, the management of the data transmission simultaneously in storage system between each level is also that layering is carried out.Under this hierarchy, memory device is generally divided into three grades, i.e. cache module, main memory module, outer storing module, and the priority level that its CPU accesses reduces successively.Meanwhile, the access speed of each memory device and price are also reduce successively, and storage appearance is dizzy to be raised successively; Data transmission is generally divided into two-stage, namely between cache module and main memory module, and between main memory module and outer storing module.Its effect of cache module is mainly in order to mate the high-speed computation of CPU, to cpu cache instruction and data, its frequency of operation is frequently same or frequency division with CPU, cache module frequency in the popular sunlight PC in present market is all generally more than 2GHz, memory capacity is very little generally maximumly only has several MByte, expensive; Its Main Function of main memory module is used to deposit program that is that computing machine is performing or that often use and data, and CPU can directly conduct interviews to it, and its frequency is lower than cache module, current trend configuration one.As be between 600MHz to 1GHz, its memory capacity cache module that compares is comparatively large, and generally have hundreds of MByte to 1GByte, price is all one's life lower relative to cache module, but is also costly; Its fundamental purpose of outer storing module is used as a large amount of data to store, and its frequency is general very low, and memory capacity is very large, and price is relative also very cheap.
Along with the development of computer hardware technique, the processing speed of CPU is more and more faster, also increasing to the requirement of data volume, simultaneously external memory module memory device capacity also increases people gradually, therefore to the speed of main memory module and the requirement of memory capacity also more and more higher.But jumbo main memory module is also unpractical, first the price of main memory module is relatively also very expensive, and secondly Large Copacity main memory module is also very high to technological requirement, is difficult to realize.Therefore two kinds of ways addressed this problem have been there are in prior art: virtual main memory module and expansion main memory module.Adopt virtual main memory module to realize the memory capacity of main memory module, this method is generally applied in the situation of hard disk as outer storing module, marks one piece of region, as virtual main memory block region, some data be of little use is placed on here.But, the interface frequency of general hard disk is lower, speed is very slow, general interface bandwidth can only reach about lOOMByte/s, particularly in random reading process, speed can be slower, so when main memory module needs to read and write the data in virtual main memory module, will become the bottleneck of storage system to the read-write of hard disk.This storage organization, as hard disk needs to serve as multiple role in outer storing module, when main memory module needs the data volume safeguarded to exceed its memory capacity, the disposal route of system is that the data that a part in main memory module is of little use are placed in the virtual main memory module of peripheral hardware hard disk, in other words namely hard disk is used as part main memory module to use, at this moment, hard disk is outer storing module and the expansion of main memory module, but, hard disk bandwidth generally can only reach about 133MByte/s, when the data that main memory module needs degree of using to intend in main memory module, just need to read in hard disk, and then pass to CPU, in this process, the interface rate of hard disk can become the bottleneck of whole storage system, therefore the speed of whole transmission can reduce, particularly under needs carry out random read-write situation to hard disk, bandwidth can drop to only has several MByte/s, this will reduce the utilization factor of CPU greatly, waste a lot of time.Although therefore this method is suitable principle add main memory module stores capacity, its cost sacrifices the transfer rate of main memory module to cache module, significantly reduces the utilization factor of CPU.Expand main memory module mainly using external flash memory another storage space as main memory module, to expand the capacity of main memory module.Such as, in the operating system Vista of new generation that recently Microsoft issues, have the function that is new, ReadyBoost accelerating system performance, its mainly using external flash memory as expansion main memory module, increase the capacity of main memory module.Although so do the capacity that can increase main memory module, increase system hosts module to a certain extent, but, Vista system realizes this purpose by the flash memory of circumscribed USB interface, and the interface rate of USB is very low, only has 480Mbps, bandwidth between main memory module and CPU, therefore, this way also can only be the not enough situation of suitable improvement main memory module volume, and can not solve the essential problem of storage organization operation bottleneck.
Summary of the invention
The technical matters that the present invention solves proposes a kind of stagewise computer memory system, effectively solves the technical bottleneck to main memory module speed and capacity requirement in existing storage system.
For solving the problem, technical scheme of the present invention is: a kind of novel computer storage system and computer system, described computer memory system comprises: cache module, main memory module, secondary main memory module, outer storing module, power supply, relay protector, USB interface, and described cache module is used for the frequently-used data in dynamic memory main memory module; Described main memory module is used for the frequently-used data in dynamic memory secondary main memory module, described secondary main memory module is used for the frequently-used data in the outer storing module of dynamic memory, and system reads data according to cache module, main memory module, secondary main memory module, outer storing module priority order from high to low.
Further, described computer memory system carries out addressing according to cache module, main memory module, secondary main memory module, outer storing module priority order from high to low, the data stored in cache module, main memory module are directly read by system, and the data retransmission stored in secondary main memory module, outer storing module is read to main memory module indirectly by system.
Further, while the data retransmission stored in described outer storing module to main memory module, these data are forwarded to secondary main memory module and carry out dynamic memory; While the data retransmission stored in described secondary main memory module to main memory module, main memory module is by these data of dynamic memory.
Further, the data that are of little use be eliminated in dynamic memory main memory module are gone back in described secondary main memory module.
Further, described secondary main memory module adopts non-volatile memory medium, and its data message stored also comprises computer operating system.
Further, described secondary main memory model calling is on the South Bridge chip or north bridge chips of computer system.
Further, described secondary main memory module comprises: equipment interface, controller and storage medium, equipment interface is connected with South Bridge chip or north bridge chips, the control signal that controller receiving equipment interface is sent also controls storage medium, and to the look-at-me of equipment interface feedback store medium.
Further, described secondary main memory module is connected on described South Bridge chip by any one interface in PCI Express interface, scsi interface, pci interface or PCI-X interface.
Further, described secondary main memory module is connected on the north bridge chips of computer system by PCl Express interface.
Further, described secondary main memory module is also as the auxiliary storage module of display card.
Further, described USB interface can connect movable storage device.
Further, relay protector comprises for receiving (the device of time multiplier value; For utilizing received time multiplier value to calculate the device with the inverse finite time dependence of exponential function, wherein dependence defines the relation between the excitation level of the input signal of described relay and the running time of described relay.
the advantage that the present invention has and good effect are:
The present invention adopts the memory module of four layers to compare one deck and secondary main memory module many than present storage system, outer storing module about 10% frequently-used data be placed in secondary main memory module, secondary storage unit about 10% frequently-used data be placed in main memory module, 10% frequently-used data of main memory module is placed in cache module.Because secondary main memory module is as an independently equipment, be used for depositing the frequently-used data of outer storing module, on the bandwidth of its interface bandwidth storing module outside, read-write speed is greater than the read-write speed of outer storing module, particularly in random read-write situation, the bandwidth under outer storing module same case can be far longer than.Under this new storage system, when main memory module is when reading information in secondary main memory module, efficiency will efficiency under original system, increase substantially the utilization rate of CPU, simultaneously, most contents in main memory module can be placed in secondary main memory module, can save a lot of valuable main memory module volume.Therefore this new storage system can better divide the function of memory device more clear, contributes to the performance and the speed that improve whole storage system, solves the capacity of main memory module and the contradictory problems of speed in prior art.The secondary main memory module that the present invention increases adopts non-volatile memory medium, the information that part main memory module needs to retain can be preserved when power down, simultaneously, because its non-volatile characteristic can divide segment space, operating system is placed on here, used as the system principal columns of a hall, so both can crouch and improve the efficiency that operating system reads, the role of outer storing module can have been become a pluggable peripheral hardware easily as mobile storage again.Because the price of secondary main memory module is well below main memory Module Price on cost, have price much the same with outer storing module, therefore the capacity of memory module at different levels can be arranged to proper ratio flexibly, to improve the read-write speed storing data.
Accompanying drawing explanation
Fig. 1 is storage system hierarchical structure schematic diagram of the present invention:
Fig. 2 is storage system preferred embodiment memory module device structure schematic diagram of the present invention:
Fig. 3 is secondary main memory modular structure schematic diagram in storage system of the present invention;
Fig. 4 is memory system architecture schematic diagram of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
By reference to the accompanying drawings present case is described, the embodiment of the present invention realizes like this, a kind of novel computer storage system and computer system, described computer memory system comprises: cache module, main memory module, secondary main memory module, outer storing module, power supply, relay protector, USB interface, and described cache module is used for the frequently-used data in dynamic memory main memory module; Described main memory module is used for the frequently-used data in dynamic memory secondary main memory module, described secondary main memory module is used for the frequently-used data in the outer storing module of dynamic memory, and system reads data according to cache module, main memory module, secondary main memory module, outer storing module priority order from high to low.
Be the hierarchical structure schematic diagram of computer memory system of the present invention as shown in Figure 1, total is pyramid distribution, and from top to bottom, the speed of storer reduces gradually, and memory capacity raises gradually, and price reduces gradually.Wherein cache module is in whole storage system, and speed is the fastest, and it is mainly used to or frequency division work frequently same with CPU, and data conventional in main memory module are stored in this; Its layer of structure of main memory module is only second to cache module, and it directly can carry out the transmission of data or cache instruction with CPU, speed is a little less than cache module; The position of secondary main memory module in storage organization is between main memory module and outer storing module, and secondary main memory module mainly stores the frequently-used data in outer storing module.Its existence can save storage space for main memory module on the one hand, on the other hand, the speed of whole memory system data read-write can also be improved, improve the utilization factor of CPU, simultaneously, no longer allow outer storing module serve as the role of expansion main memory module, effectively solve the bottleneck problem occurred in storage system.In general, whole storage organization can be summarized as: the frequently-used data of about the lO% in outer storing module deposits in secondary main memory module, the frequently-used data of about the l0% in secondary main memory module deposits in main memory module, and about the I0% frequently-used data in main memory module deposits in cache module.Relay protector comprises for receiving (the device of time multiplier value; For utilizing received time multiplier value to calculate the device with the inverse finite time dependence of exponential function, wherein dependence defines the relation between the excitation level of the input signal of described relay and the running time of described relay.
As shown in Figure 2 schematic diagram is set for storage system preferred embodiment memory module equipment of the present invention, present chipset feature bus only has South Bridge chip and north bridge chips, generally no longer other Peripheral Interface access bus.Structure on north bridge chips is relatively simple, mainly be connected to central processing unit, it is computing and the command center of whole PC, be used for controlling the operation of whole PC, wherein the level cache of CPU is integrated in cpu chip, L2 cache has some manufacturer's ways to be integrated in CPU, also has some to be external in CPU, secondly, be connected to main memory module, its Main Function is for CPU provides data, under current storage organization, when user sends single job request, first CPU can find and say mark data in cache module and main memory module, if can not find, just can search in peripheral storage device, when finding data, first data are read in main memory module, then go out main memory module and provide data to CPU, the fundamental purpose of main memory module is exactly the bottleneck in order to cushioned periphery memory device effectively produces in data transmission procedure, reduce the stand-by period that CPU is in operation, thus improve the utilization factor of CPU, also having its Main Function of video card interface 3 to be for video card provides interface, if external liquid crystal or digital indicator, is DVO interface, or with the interface of high-speed PCI Exprcss 16 speed interface as external video card.The Circumscribed structure of South Bridge chip is more complex by contrast, a lot of Peripheral Interface is all under being connected on south bridge, comprising USB interface (USB (universal serial bus)), the ata interface of conventional hard disk or SATA interface, Ethernet interface (Ethernet interface), pci interface Il or PCI-X or PCI Express interface etc.
As shown in Figure 2, secondary main memory module involved in the present invention can be connected on South Bridge chip outward, also can be connected on north bridge chips outward.When being connected on South Bridge chip outside secondary main memory module, secondary main memory module 9 can be connected on South Bridge chip by any one interface in PCIExpress interface, scsi interface, pci interface or PCI-X interface.Be connected on the north bridge chips of computer system by PCIExpress interface when being connected on north bridge chips outside secondary main memory module.When secondary main memory module is connected to north bridge chips by PClExpress interface, can also use as the auxiliary storage module of display card.
Be secondary main memory functions of modules schematic diagram involved in the present invention as shown in Figure 3, as in figure, 2-1 is depicted as equipment interface, this interface adopts high-speed interface.When it is connected with South Bridge chip, adopt any one interface in PCI-Express interface, scsi interface, pci interface or PCI-X interface: when it is connected with north bridge chips, adopt PCI Express interface., interface bandwidth is generally in one of existing peripheral storage device bandwidth.In figure, 2-2 is depicted as the interface controller of equipment, comprising MCU (micro treatment module) and Firmware (firmware).In figure, 2-3 is depicted as the memory medium controller in equipment, and its Main Function is that the instruction of sending according to interface controller controls storage medium, meanwhile, produces look-at-me feed back to interface controller according to the state of storage medium.In figure, 2-4 is the bottom structure storage medium of memory device, and its Main Function stores data.
Be memory system architecture schematic diagram of the present invention as shown in Figure 4, when CPU carries out addressing to cache module, if data can be found, then cache module sent instructions, meanwhile, read data; If can not hit data, then to main memory module address, if hit, then CPU sends instructions to main memory module, reads data, and meanwhile, these also data can be flagged as and operated recently, deposit people's cache module; If can not hit, then to secondary main memory module address, if hit, CPU sends instruction to it, data is read in main memory module, then by main memory module, data is read in CPU; If can not hit, then externally storing module addressing, if hit, CPU sends instruction to it, data is read in main memory module, and meanwhile, these data will be flagged as and operate recently, and stored in secondary storage module, then, main memory module passes to CPU data.In addition the data be of little use in main memory module can also be dynamically adjusted stored in secondary main memory module, and the data that are of little use in secondary main memory module are dynamically adapted in outer storing module.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. novel computer storage system and a computer system, computer memory system comprises: cache module, main memory module, secondary main memory module, outer storing module, power supply, relay protector, USB interface;
Cache module, for the frequently-used data in dynamic memory main memory module;
Main memory module, for the frequently-used data in dynamic memory secondary main memory module;
Secondary main memory module, is used for the frequently-used data in the outer storing module of dynamic memory with main memory model calling;
Power supply, with cache module, main memory module, secondary main memory module, external memory model calling, for providing stable power supply;
Relay protector, is connected with power supply, for ensureing that power supply works normally;
Outer storing module, with main memory module, secondary main memory model calling, for realizing the connection of external unit;
USB interface, with external memory model calling, for realizing the connection with USB device.
2. novel computer storage system according to claim 1 and computer system, it is characterized in that, computer memory system carries out addressing according to cache module, main memory module, secondary main memory module, outer storing module priority order from high to low, the data stored in cache module, main memory module are directly read by system, and the data retransmission stored in secondary main memory module, outer storing module is read to main memory module indirectly by system.
3. novel computer storage system according to claim 2 and computer system, is characterized in that, while the data retransmission stored in outer storing module to main memory module, these data are forwarded to secondary main memory module and carry out dynamic memory; While the data retransmission stored in secondary main memory module to main memory module, main memory module is by these data of dynamic memory.
4. novel computer storage system according to claim 2 and computer system, is characterized in that, goes back the data that are of little use be eliminated in dynamic memory main memory module in secondary main memory module.
5. the novel computer storage system according to any one of claim 1-4 and computer system, is characterized in that, secondary main memory module adopts non-volatile memory medium, and the data message of storage also comprises computer operating system.
6. the novel computer storage system according to any one of claim 1-4 and computer system, is characterized in that, described secondary main memory model calling is on the South Bridge chip or north bridge chips of computer system.
7. novel computer storage system according to claim 6 and computer system, it is characterized in that, described secondary main memory module comprises: equipment interface, controller and storage medium, equipment interface is connected with South Bridge chip or north bridge chips, the control signal that controller receiving equipment interface is sent also controls storage medium, and to the look-at-me of equipment interface feedback store medium.
8. novel computer storage system according to claim 7 and computer system, it is characterized in that, described secondary main memory module is connected on described South Bridge chip by any one interface in PCI Express interface, scsi interface, pci interface or PCI-X interface;
Secondary main memory module is connected on the north bridge chips of computer system by PCl Express interface;
Secondary main memory module is also as the auxiliary storage module of display card;
USB interface connects movable storage device.
9. novel computer storage system according to claim 1 and computer system, is characterized in that, relay protector comprises for receiving (the device of time multiplier value; For utilizing received time multiplier value to calculate the device with the inverse finite time dependence of exponential function, wherein dependence defines the relation between the excitation level of the input signal of described relay and the running time of described relay.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101034375A (en) * | 2007-02-12 | 2007-09-12 | 忆正存储技术(深圳)有限公司 | Computer memory system |
| US20080098242A1 (en) * | 2006-10-19 | 2008-04-24 | Peterson Milford J | System and Method of Power Management for Computer Processor Systems |
| CN102684154A (en) * | 2011-03-15 | 2012-09-19 | Abb技术有限公司 | Otection relay |
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- 2014-12-15 CN CN201410776291.3A patent/CN104461395A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080098242A1 (en) * | 2006-10-19 | 2008-04-24 | Peterson Milford J | System and Method of Power Management for Computer Processor Systems |
| CN101034375A (en) * | 2007-02-12 | 2007-09-12 | 忆正存储技术(深圳)有限公司 | Computer memory system |
| CN102684154A (en) * | 2011-03-15 | 2012-09-19 | Abb技术有限公司 | Otection relay |
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Application publication date: 20150325 |