CN104378894B - LED dimming driving circuits and its output current control circuit and bypass composite device - Google Patents
LED dimming driving circuits and its output current control circuit and bypass composite device Download PDFInfo
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- CN104378894B CN104378894B CN201410776959.4A CN201410776959A CN104378894B CN 104378894 B CN104378894 B CN 104378894B CN 201410776959 A CN201410776959 A CN 201410776959A CN 104378894 B CN104378894 B CN 104378894B
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Abstract
The present invention provides a kind of LED dimming driving circuits and its output current control circuit and bypass composite device, and the device includes：FET, its drain electrode connection high voltage input terminal；Bypass common circuit, according to dim signal and the supply voltage of power end, control the working condition of FET, the bypass impedance between the source electrode and ground of FET is adjusted according to by-passing signal, according to dim signal and supply voltage control start and/or the course of work in the charged state of power end.With startup and power supply circuit be integrated in same composite device traditional bypass circuit by the present invention, is conducive to peripheral circuits, reduces whole machine cost.
Description
Technical field
The present invention relates to LED dimming driving circuits, more particularly to a kind of bypass composite device for control unit and
Output current control circuit comprising the device, the LED dimming driving circuits comprising the output current control circuit.
Background technology
With reference to Fig. 1, traditional is mainly included by the LED drive circuit with light modulator of alternating current input power supplying：Light modulation
Device 101, rectification circuit 102, input filter capacitor C1, bypass circuit 103, diode D2, output current control circuit 105, work(
Rate transmission circuit 106 and LED string.Output current control circuit 105 includes starting and power supply circuit 1051, Power Control electricity
Road 1052, dim signal produces circuit 1053 and by-passing signal to produce circuit 1054.Bypass circuit 103 further includes resistance
R1, electric capacity C2, metal-oxide-semiconductor M1, voltage-stabiliser tube D1 and bypass impedance control circuit 104.
Wherein, dim signal produces the dimming state that circuit 1053 is provided according to light modulator 101 to produce dim signal, bypass
Signal generating circuit 1054 is used to produce by-passing signal, and the by-passing signal is used for controlling bypass circuit 103.Bypass circuit 103 is
Light modulator 101 provides a circuit pathways, to ensure the normal work of light modulator 101.Typically side is controlled with input ac voltage
The impedance of road circuit 103, when AC-input voltage is near zero passage, bypass circuit 103 is in the conduction state, now, light modulator
101, rectification circuit 102 and bypass circuit 103 constitute current loop, and the electric current that light modulator 101 has setting flows through, to light modulator
101 power supplies, thus avoid the need for extra dimmer powered loop.Startup and power supply electricity in output current control circuit 105
Road 1051 is used for quick startup output current control circuit 105, generally uses the depletion type MOS tube M2 of N-type and is quickly opened to provide
It is dynamic, realize high voltage startup function.In the standby state, depletion type MOS tube M2 is also used for maintaining the power supply of electric capacity C3, defeated to ensure
Go out normal power supply and the work of current control circuit 105, realize high voltage supply function.
But, the traditional circuit described in Fig. 1 has that element is more, circuit structure is complicated.
The content of the invention
The problem to be solved in the present invention is to provide a kind of LED dimming driving circuits and its output current control circuit and bypass
Composite device, traditional bypass circuit is integrated in same composite device with startup and/or power supply circuit, is conducive to simplifying outer
Circuit is enclosed, whole machine cost is reduced.
In order to solve the above technical problems, the invention provides one kind bypass composite device, including：
FET, its drain electrode connection high voltage input terminal；
Bypass common circuit, receives the grid of dim signal and by-passing signal, connection power end and the FET
And source electrode, the working condition of the supply voltage control FET according to the dim signal and the power end, root
The bypass impedance between the source electrode and ground of the FET is adjusted according to the by-passing signal, according to the dim signal and institute
State supply voltage control start and/or the course of work in the charged state of the power end.
According to one embodiment of present invention, the high voltage input terminal the FET conducting in the state of via institute
State field-effect transistor and bypass common circuit is formed and the bypass path between ground.
According to one embodiment of present invention, the high voltage input terminal the FET conducting in the state of via institute
State field-effect transistor and bypass common circuit is formed and the charging path between the power end.
According to one embodiment of present invention, the bypass common circuit is according to the dim signal and the supply voltage
Control starts the charged state with power end described in the course of work.
According to one embodiment of present invention, the bypass common circuit is according to the dim signal and the supply voltage
The charged state of power end described in the control course of work.
According to one embodiment of present invention, the bypass common circuit is according to the dim signal and the supply voltage
The charged state of power end described in control start-up course.
According to one embodiment of present invention, the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charge control letter are produced according to the supply voltage and dim signal
Number, the grid voltage is transmitted to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, institute
State the power charging circuit source electrode of FET described on or off and electricity under the control of the charging control signal
Charging path between source；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to described
By-passing signal determines the bypass impedance of the bypass path.
According to one embodiment of present invention, the bypass control circuit includes one or more impedance paths, the resistance
Anti- path includes：
Switch, its first end connects the source electrode of the FET；
Impedance, its first end connects the second end of the switch, its second end ground connection；
Wherein, the turn-on and turn-off of the switch are controlled by the by-passing signal.
According to one embodiment of present invention, the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
First switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its second end connects the power end,
Its control end connects the drain electrode of the metal-oxide-semiconductor；
First resistor, its first end connects the first end of the first switch pipe, and its second end connects the first switch
The control end of pipe.
According to one embodiment of present invention, the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
Second switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its control end connects the metal-oxide-semiconductor
Drain electrode；
3rd switching tube, its first end connects the control end of the second switch pipe, and its control end connection described second is opened
Close the second end of pipe；
Second resistance, its first end connects the first end of the second switch pipe, and its second end connects the second switch
The control end of pipe；
3rd resistor, its first end connects the control end of the 3rd switching tube, its second end connection the 3rd switch
Second end of pipe；
Anti-discharge diode, its anode connects the second end of the 3rd switching tube, and its negative electrode connects the power end.
According to one embodiment of present invention, the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charge control letter are produced according to the supply voltage and dim signal
Number, the grid voltage is transmitted to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, institute
State the power charging circuit source electrode of FET described on or off and electricity under the control of the charging control signal
Charging path between source；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to described
By-passing signal determines the bypass impedance of the bypass path；
Wherein, the gate voltage control circuit includes：
First switch, its first end connects the grid of the FET, and its second end is via the 4th resistance eutral grounding；
Second switch, its first end connects the grid of the FET, and its second end receives grid bootstrap voltage mode, described
Grid bootstrap voltage mode is equal to the source voltage and default reference voltage sum of the depletion field effect transistor；
3rd switch, its first end connects the grid of the FET, and its second end is connected to institute via the 5th resistance
State the source electrode of FET；
Wherein, the turn-on and turn-off of the first switch, second switch and the 3rd switch are by the supply voltage and light modulation
Signal is controlled.
According to one embodiment of present invention, the gate voltage control circuit also includes grid boostrap circuit, for producing
The life grid bootstrap voltage mode, the grid boostrap circuit includes：
4th switch, its first end connects the grid of the FET；
5th switch, its first end receives the reference voltage；
Electric capacity, the second end of its first end connection the 4th switch and the second end of the 5th switch；
6th switch, its first end connects the second end of the electric capacity, its second end ground connection；
7th switch, its first end connects the second end of the electric capacity, and its second end connects the source electrode of the FET.
According to one embodiment of present invention, before described device starts, the 3rd switch conduction, the FET
Grid is connected to the source electrode of the FET via the 5th resistance, and the FET is turned on and with the first conductive energy
Power；After described device starts, when the dim signal indicates to connect the bypass path between the source electrode and ground of the FET,
The second switch conducting, the grid of the FET receives the grid bootstrap voltage mode, the FET conducting and tool
There is the second conductive capability, second conductive capability is higher than first conductive capability.
According to one embodiment of present invention, the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charge control letter are produced according to the supply voltage and dim signal
Number, the grid voltage is transmitted to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, institute
State the power charging circuit source electrode of FET described on or off and electricity under the control of the charging control signal
Charging path between source；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to described
By-passing signal determines the bypass impedance of the bypass path；
Wherein, in start-up course, the gate voltage control circuit controls the FET conducting, and controls described
Power charging circuit is turned on, and the high voltage input terminal is filled via the FET and power charging circuit to the power end
Electricity, when the supply voltage of the power end reaches the first setting value, the power charging circuit disconnects, and stops to the power supply
Charge at end；In the course of the work, when the supply voltage drops to the second setting value, the gate voltage control circuit according to
The dim signal controls the FET conducting, and controls the power charging circuit to turn on, the high voltage input terminal warp
The power end is charged by the FET and power charging circuit, is set when the supply voltage of the power end reaches the 3rd
During definite value, the power charging circuit disconnects, and stops charging the power end.
According to one embodiment of present invention, the 3rd setting value between second setting value and the first setting value it
Between.
According to one embodiment of present invention, the power end is configured to be connected with the first end of power supply capacitor, the confession
The second end ground connection of electric capacity.
According to one embodiment of present invention, the FET is depletion field effect transistor.
According to one embodiment of present invention, the FET is enhanced FET or depletion field effect transistor.
According to one embodiment of present invention, the FET is depletion field effect transistor.
In order to solve the above problems, present invention also offers a kind of output current control circuit, including：
Bypass composite device, the bypass composite device includes：
FET, its drain electrode connection high voltage input terminal；
Bypass common circuit, receives the grid of dim signal and by-passing signal, connection power end and the FET
And source electrode, the working condition of the supply voltage control FET according to the dim signal and the power end, root
The bypass impedance between the source electrode and ground of the FET is adjusted according to the by-passing signal, according to the dim signal and institute
State supply voltage control start and/or the course of work in the charged state of the power end；
Dim signal produces circuit, for the dimming state of detection control unit producing the dim signal；
Power control circuit, produces the control for regulating load electric current or bearing power to believe according to the dim signal
Number.
According to one embodiment of present invention, the high voltage input terminal the FET conducting in the state of via institute
State field-effect transistor and bypass common circuit is formed and the bypass path between ground.
According to one embodiment of present invention, the high voltage input terminal the FET conducting in the state of via institute
State field-effect transistor and bypass common circuit is formed and the charging path between the power end.
According to one embodiment of present invention, the bypass common circuit is according to the dim signal and the supply voltage
Control starts the charged state with power end described in the course of work.
According to one embodiment of present invention, the bypass common circuit is according to the dim signal and the supply voltage
The charged state of power end described in the control course of work.
According to one embodiment of present invention, the bypass common circuit is according to the dim signal and the supply voltage
The charged state of power end described in control start-up course.
According to one embodiment of present invention, the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charge control letter are produced according to the supply voltage and dim signal
Number, the grid voltage is transmitted to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, institute
State the power charging circuit source electrode of FET described on or off and electricity under the control of the charging control signal
Charging path between source；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to described
By-passing signal determines the bypass impedance of the bypass path.
According to one embodiment of present invention, the bypass control circuit includes one or more impedance paths, the resistance
Anti- path includes：
Switch, its first end connects the source electrode of the FET；
Impedance, its first end connects the second end of the switch, its second end ground connection；
Wherein, the turn-on and turn-off of the switch are controlled by the by-passing signal.
According to one embodiment of present invention, the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
First switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its second end connects the power end,
Its control end connects the drain electrode of the metal-oxide-semiconductor；
First resistor, its first end connects the first end of the first switch pipe, and its second end connects the first switch
The control end of pipe.
According to one embodiment of present invention, the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
Second switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its control end connects the metal-oxide-semiconductor
Drain electrode；
3rd switching tube, its first end connects the control end of the second switch pipe, and its control end connection described second is opened
Close the second end of pipe；
Second resistance, its first end connects the first end of the second switch pipe, and its second end connects the second switch
The control end of pipe；
3rd resistor, its first end connects the control end of the 3rd switching tube, its second end connection the 3rd switch
Second end of pipe；
Anti-discharge diode, its anode connects the second end of the 3rd switching tube, and its negative electrode connects the power end.
According to one embodiment of present invention, the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charge control letter are produced according to the supply voltage and dim signal
Number, the grid voltage is transmitted to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, institute
State the power charging circuit source electrode of FET described on or off and electricity under the control of the charging control signal
Charging path between source；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to described
By-passing signal determines the bypass impedance of the bypass path；
Wherein, the gate voltage control circuit includes：
First switch, its first end connects the grid of the FET, and its second end is via the 4th resistance eutral grounding；
Second switch, its first end connects the grid of the FET, and its second end receives grid bootstrap voltage mode, described
Grid bootstrap voltage mode is equal to the source voltage and default reference voltage sum of the depletion field effect transistor；
3rd switch, its first end connects the grid of the FET, and its second end is connected to institute via the 5th resistance
State the source electrode of FET；
Wherein, the turn-on and turn-off of the first switch, second switch and the 3rd switch are by the supply voltage and light modulation
Signal is controlled.
According to one embodiment of present invention, the gate voltage control circuit also includes grid boostrap circuit, for producing
The life grid bootstrap voltage mode, the grid boostrap circuit includes：
4th switch, its first end connects the grid of the FET；
5th switch, its first end receives the reference voltage；
Electric capacity, the second end of its first end connection the 4th switch and the second end of the 5th switch；
6th switch, its first end connects the second end of the electric capacity, its second end ground connection；
7th switch, its first end connects the second end of the electric capacity, and its second end connects the source electrode of the FET.
According to one embodiment of present invention, before the output current control circuit starts, the 3rd switch conduction, institute
The grid for stating FET is connected to the source electrode of the FET, the FET conducting and tool via the 5th resistance
There is the first conductive capability；After the output current control circuit starts, the dim signal indicates to connect the FET
During bypass path between source electrode and ground, the second switch conducting, the grid of the FET receives the grid bootstrapping
Voltage, the FET is turned on and with the second conductive capability, and second conductive capability is higher than first conductive capability.
According to one embodiment of present invention, the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charge control letter are produced according to the supply voltage and dim signal
Number, the grid voltage is transmitted to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, institute
State the power charging circuit source electrode of FET described on or off and electricity under the control of the charging control signal
Charging path between source；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to described
By-passing signal determines the bypass impedance of the bypass path；
Wherein, in start-up course, the gate voltage control circuit controls the FET conducting, and controls described
Power charging circuit is turned on, and the high voltage input terminal is filled via the FET and power charging circuit to the power end
Electricity, when the supply voltage of the power end reaches the first setting value, the power charging circuit disconnects, and stops to the power supply
Charge at end；In the course of the work, when the supply voltage drops to the second setting value, the gate voltage control circuit according to
The dim signal controls the FET conducting, and controls the power charging circuit to turn on, the high voltage input terminal warp
The power end is charged by the FET and power charging circuit, is set when the supply voltage of the power end reaches the 3rd
During definite value, the power charging circuit disconnects, and stops charging the power end.
According to one embodiment of present invention, the 3rd setting value between second setting value and the first setting value it
Between.
According to one embodiment of present invention, the power end is configured to be connected with the first end of power supply capacitor, the confession
The second end ground connection of electric capacity.
According to one embodiment of present invention, the output current control circuit also includes：By-passing signal produces circuit, rings
Should be in the Preset Time after the Preset Time before ac input signal zero passage to zero passage, the by-passing signal produces circuit to produce institute
State by-passing signal.
According to one embodiment of present invention, the FET is depletion field effect transistor.
According to one embodiment of present invention, the FET is enhanced FET or depletion field effect transistor.
According to one embodiment of present invention, the FET is depletion field effect transistor.
In order to solve the above problems, present invention also offers a kind of LED dimming driving circuits, including described in any of the above-described
Output current control circuit.
According to one embodiment of present invention, the LED dimming driving circuits also include：
Alternating current input power supplying, there is exchange input first end to be input into the second end with the second end of input, the exchange is exchanged for it
Ground connection；
Control unit, its input connection exchange input first end；
Rectification circuit, its input first end connects the output end of described control unit, and its second end of input connection exchange is defeated
Enter the second end, its output first end connects the high voltage input terminal；
Input filter capacitor, its first end connects the output first end of the rectification circuit, and the connection of its second end is described whole
The end of output second of current circuit is simultaneously grounded；
Diode, its anode connects the output plus terminal of the rectification circuit；
Power transfer circuitry, its first input end connects the negative electrode of the diode, and its second input connects the work(
The output end of rate control circuit, its output end is used to connect load.
According to one embodiment of present invention, the alternating current input power supplying, control unit, FET and bypass shares electricity
A galvanic circle is formed in the state of FET conducting described in road, the galvanic circle is used to power described control unit；Institute
Galvanic circle is stated to be disconnected in the state of FET shut-off.
According to one embodiment of present invention, described control unit is light modulator.
Compared with prior art, the present invention has advantages below：
The bypass composite device of the embodiment of the present invention is by the bypass circuit in traditional circuit and starts and/or power supply circuit collection
Into together, share same FET to provide the charging in bypass path and startup and/or the course of work to power end
Path, is conducive to peripheral circuits, and circuit is simple and is easily achieved, and advantageously reduces whole machine cost, reduces the area of PCB,
It is also beneficial to the miniaturization of product.
Brief description of the drawings
Fig. 1 is a kind of electrical block diagram of LED dimming driving circuits in the prior art；
Fig. 2 is the electrical block diagram of LED dimming driving circuits according to a first embodiment of the present invention；
Fig. 3 is the electrical block diagram of bypass composite device according to a first embodiment of the present invention；
Fig. 4 A are that the by-passing signal of bypass composite device according to a first embodiment of the present invention produces time diagram；
Fig. 4 B are that the circuit structure of the bypass control circuit in bypass composite device according to a first embodiment of the present invention shows
It is intended to；
Fig. 5 A are a kind of circuit knots of the power charging circuit in bypass composite device according to a first embodiment of the present invention
Structure schematic diagram；
Fig. 5 B are another circuits of the power charging circuit in bypass composite device according to a first embodiment of the present invention
Structural representation；
Fig. 6 is the circuit structure of the gate voltage control circuit in bypass composite device according to a first embodiment of the present invention
Schematic diagram；
Fig. 7 A are that the circuit structure of the grid boostrap circuit in bypass composite device according to a first embodiment of the present invention shows
It is intended to；
Fig. 7 B are the equivalent circuit structure schematic diagrames in the first state of grid boostrap circuit shown in Fig. 7 A；
Fig. 7 C are the equivalent circuit structure schematic diagrames in the second condition of grid boostrap circuit shown in Fig. 7 A；
Fig. 8 is the electrical block diagram of LED dimming driving circuits according to a second embodiment of the present invention；
Fig. 9 is the electrical block diagram of LED dimming driving circuits according to a third embodiment of the present invention.
Specific embodiment
With reference to specific embodiments and the drawings, the invention will be further described, but should not limit guarantor of the invention with this
Shield scope.
First embodiment
With reference to Fig. 2, the LED dimming driving circuits of first embodiment mainly include：Control unit 101, rectification circuit 102,
Input filter capacitor C1, diode D2, power supply capacitor C3, output current control circuit 105 and power transfer circuitry 106.Its
In, power transfer circuitry 106 is connected with LED string 107, is powered with to LED string 107.Control unit 101 can be light modulation
Device, control panel etc., illustrate in the present embodiment by taking light modulator as an example.
Furthermore, the input connection exchange input positive terminal of light modulator 101；The input positive terminal of rectification circuit 102 connects
The output end of light modulator 101 is connect, the input negative terminal connection of rectification circuit 102 exchanges input negative terminal, and the output of rectification circuit 102 is just
End connection high voltage input terminal；The first end of input filter capacitor C1 connects the output plus terminal of rectification circuit 102, input filter capacitor
The output negative terminal of the second end connection rectification circuit 102 of C1 is simultaneously grounded；The anode of diode D2 connects the output of rectification circuit 102
Anode；Output current control circuit 105 has high voltage input terminal, power end Vcc and output end, high voltage input terminal connection rectification
The output plus terminal of circuit 102, the first end of power end Vcc connection power supply capacitors C3, the second end ground connection of power supply capacitor C3；Work(
The negative electrode of the first input end connection diode D2 of rate transmission circuit 106, its second input connection output current control circuit
105 output end, its output end connection load 107, the load 107 can be LED string.
Supply voltage on output capacitance C3 is used to be powered to output current control circuit 105.
Output current control circuit 105 can include that bypass composite device, power control circuit 1052, dim signal are produced
Circuit 1053 and by-passing signal produce circuit 1054.Wherein, bypass composite device can include depletion field effect transistor M2 with
And bypass common circuit 1051.
Depletion field effect transistor M2 drain electrode connection high voltage input terminal, namely rectification circuit 102 output plus terminal, depletion type
Grid and source electrode the connection bypass common circuit 1051 of FET M2.
Bypass common circuit 1051 is integrated with startup, power supply and bypass functionality.Specifically, bypass common circuit 1051 connects
Dim signal and by-passing signal are received, the grid and source electrode of power end Vcc and depletion field effect transistor M2 is connected, is believed according to light modulation
Number and power end Vcc supply voltage, the working condition of control depletion field effect transistor M2 exhausts according to by-passing signal regulation
Bypass impedance between the source electrode and ground of type FET M2, starts and worked according to dim signal and supply voltage control
The charged state (namely charged state of power supply capacitor C3) of power end Vcc in journey.The source electrode of depletion field effect transistor M2 and ground
Between bypass impedance refer between the source electrode and ground of depletion field effect transistor M2 bypass path (or referred to as electric current lead to
Road) impedance.
Wherein, when depletion field effect transistor M2 is turned on, the output plus terminal of rectification circuit 102 is via depletion field effect transistor M2
The bypass path to ground is formed with bypass common circuit 1051, and the output plus terminal of rectification circuit 102 is via depletion type field-effect
Pipe M2 and bypass common circuit 1051 form the charging path charged to power end.
Herein, " startup " refer to bypass composite device, output current control circuit 105 and whole LED light modulations and drive
Opening process on dynamic circuit during electricity；" work " refers to bypass composite device, output current control circuit 105 and whole
LED dimming driving circuits provide the state of normal function after starting.In startup and the course of work, each circuit module is required for
Power supply, namely bypass common circuit 1051 charges to power end Vcc so that accumulation has enough electric charges on power end Vcc
Energy is provided with to circuit.
Light modulator 101 is used to provide dimming state, and dim signal produces circuit 1053 for detecting the dimming state, to produce
Raw dim signal.Dim signal generation circuit 1053 can be powered by power end Vcc.
Power control circuit 1052 can be powered by power end Vcc, and the electricity of LED string 107 is adjusted according to the dim signal
Stream or power.Power control circuit 1052 generally can be that constant current control circuit controls electricity but it is also possible to be firm power
Road.
Power transfer circuitry 106 can be various transformer configurations, for example, can be step-down (BUCK) topological structure, lifting
Pressure (BUCK-BOOST) topological structure, flyback (FLYBACK) topological structure, normal shock (Forward) topological structure, half-bridge (Half-
Bridge) topological structure, full-bridge (Full-bridge) topological structure, recommends (any one of Push-pull topological structures.
Diode D2 keeps apart common circuit 1051 is bypassed with power transfer circuitry 106, and electricity is shared to prevent from bypassing
Influencing each other between road 1051 and power transfer circuitry 106.
With reference to Fig. 3, Fig. 3 shows the detailed construction of the bypass composite device in the present embodiment, wherein, bypass common circuit
1051 can include：Power supply (Vcc) charging circuit 201, bypass control circuit 202 and gate voltage control circuit 203.
Wherein, gate voltage control circuit 203 produces grid voltage according to the supply voltage and dim signal of power end Vcc
Vg and charging control signal, grid voltage Vg transmit the grid to depletion field effect transistor M2 to control depletion field effect transistor M2
Turn-on and turn-off；The source electrode of the first end connection depletion field effect transistor M2 of Vcc charging circuits 201, its second end is via electricity
Source Vcc is connected to power supply capacitor C3, and its control end receives charging control signal, and Vcc charging circuits 201 are in charging control signal
Control under on or off depletion field effect transistor M2 source electrode and power end Vcc between charging path；Bypass Control electricity
Road 202 is used to provide the bypass path between the source electrode and ground of depletion field effect transistor M2, and is adjusted by this according to by-passing signal
The bypass impedance of road path.The bypass path provides current path for light modulator, it is ensured that the normal work of light modulator.
Still further, VCC charging circuits 201 and gate voltage control circuit 203 cooperate, and are used to realize to supplying
The control of the charging process of electric capacity C3, it is quick to be charged to power supply capacitor C3 before circuit start, in the standby state, to confession
Electric capacity C3 powers so that the supply voltage at its two ends is maintained at appropriate scope.
More specifically, during circuit start, the control depletion field effect transistor of gate voltage control circuit 203 M2
Grid voltage Vg and source voltage Vs it is essentially identical so that depletion field effect transistor M2 is turned on, and VCC charging circuits 201 turn on,
Power supply capacitor C3 is charged.When the supply voltage on power supply capacitor C3 reaches the first setting value, VCC charging circuits 201 disconnect,
Stopping is charged through depletion field effect transistor M2 from high voltage input terminal to power supply capacitor C3.For preferably switching off depletion type
Effect pipe M2, the grid voltage Vg of depletion field effect transistor M2 can be set to, compared with low potential, be exhausted to effectively turn off
Type FET M2.In the course of the work under (such as holding state), due to the inner member of output current control circuit 105 consumption
Electricity, the supply voltage in power supply capacitor can be reduced gradually, when the supply voltage on power supply capacitor C3 drops to the second setting value, knot
Close the working condition (namely combining dim signal) of light modulator, the regulation depletion field effect transistor of gate voltage control circuit 203 M2
Grid voltage Vg, to cause that depletion field effect transistor M2 is turned on, while control VCC charging circuits 201 to turn on, with to power supply electricity
Hold C3 to charge.When the supply voltage on power supply capacitor C3 is increased to three setting values, VCC charging circuits 201 disconnect, and it is right to stop
Power supply capacitor C3 charges.
Used as a preferred embodiment, the 3rd setting value is more than the second setting value and less than the first setting value, to cause
Supply voltage during startup is slightly larger than supply voltage during normal work, it is ensured that circuit quickly starts.
Bypass control circuit 202 receives dim signal, according to the dim signal of input, regulation depletion field effect transistor M2's
Bypass impedance between source electrode and ground.For example, bypass control circuit 202 can be according to the given bypass resistance of dim signal selection
It is anti-, the by-pass current of setting is provided to light modulator.
The grid voltage Vg of the control depletion field effect transistor of gate voltage control circuit 203 M2, in order to control depletion type
FET M2's effectively switches off and on.
The generation sequential of by-passing signal is shown with reference to Fig. 4 A and Fig. 4 B, Fig. 4 A, Fig. 4 B show the Bypass Control in Fig. 3
A kind of structure of circuit 202.The bypass control circuit 202 include switch S1 and switch S2, switch S1 and switch S2 respectively with resistance
Anti- 1 and impedance 2 connect, form two impedance paths, two one end of impedance path are connected with depletion field effect transistor M2 source electrodes,
The other end is grounded.The turn-on and turn-off of switch S1 and switch S2 are controlled by by-passing signal K1 and K2.In ac input signal VAC mistakes
Zero nearby (for example, the Preset Time after Preset Time to zero passage before zero passage), and by-passing signal produces circuit to produce bypass letter
Number K1, K2, switch S1 and switch S2 in control bypass control circuit 202.It is light modulation when bypass control circuit 202 is turned on
Device provides bypass path, realizes the power supply of light modulator.
Furthermore, when S1 conductings, switch S2 shut-offs is switched, only impedance 1 accesses depletion field effect transistor M2 source electrodes
Path between ground；When S1 shut-offs, switch S2 conductings is switched, only impedance 2 accesses depletion field effect transistor M2 source electrodes with ground
Between path；When switch S1 conductings, switch S2 are also switched on, impedance 1 and the in parallel of impedance 2 access depletion field effect transistor M2
Path between source electrode and ground；When S1 shut-offs, switch S2 shut-offs is switched, impedance 1 and impedance 2 are all off, namely depletion type
Path between FET M2 source electrodes and ground disconnects.Hereby it is achieved that many between depletion field effect transistor M2 source electrodes and ground
Plant impedance.
Additionally, when the bypass condition for needing is more, it is possible to use the impedance path of other quantity is realized.For example, can be with
Using 1,3,4 impedance path of parallel connection, the impedance in each impedance path can be with identical, it is also possible to different.
With reference to Fig. 5 A, Fig. 5 A show a kind of circuit structure of the VCC charging circuits 201 in Fig. 3, mainly include：Counnter attack
String diode D3, its anode connects the source electrode Vs of depletion field effect transistor；Metal-oxide-semiconductor M3, its grid receives charging control signal, its
Source ground；Switching tube npn1, the negative electrode of the anti-diode D3 that plays a reversed role of its first end connection, its second end connection power end Vcc, its
The drain electrode of control end connection metal-oxide-semiconductor M3；Resistance R3, the first end of its first end connecting valve pipe npn1, its second end connection is opened
Close the control end of pipe npn1.
In example shown in Fig. 5 A, metal-oxide-semiconductor M3 can be NMOS tube, and switching tube npn1 can be NPN type triode.Its
In, used as first end, used as the second end, base stage is used as control end for emitter stage for the colelctor electrode of NPN type triode.Certainly, switching tube
Npn1 can also use nmos pass transistor.
Switching tube npn1 is used to prevent electric current from moving back to depletion type field-effect by the grid of power end Vcc and metal-oxide-semiconductor M3
The source electrode Vs of pipe.So that metal-oxide-semiconductor M3 is as NMOS tube as an example, when charging control signal is logic high, then NMOS tube M3 conductings, open
Close pipe npn1 shut-offs；When charging control signal is logic low, then NMOS tube M3 shut-offs, switching tube npn1 conductings are normally filled
Electricity, the size of charging current is determined by the multiplication factor of resistance R3 and switching tube npn1.In order to improve charging current, switching tube
Npn1 can be realized using Darlington transistor.
With reference to Fig. 5 B, Fig. 5 B show another circuit structure of the VCC charging circuits 201 in Fig. 3, mainly include：It is anti-
Play a reversed role diode D3, and its anode connects the source electrode Vs of depletion field effect transistor；Metal-oxide-semiconductor M3, its grid receives charging control signal,
Its source ground；Switching tube npn2, the negative electrode of the anti-diode D3 that plays a reversed role of its first end connection, its control end connection metal-oxide-semiconductor M3's
Drain electrode；Switching tube npn3, the control end of its first end connecting valve pipe npn2, the second of its control end connecting valve pipe npn2
End；Resistance R3, the first end of its first end connecting valve pipe npn2, the control end of its second end connecting valve pipe npn2；Resistance
R4, the control end of its first end connecting valve pipe npn3, second end of its second end connecting valve pipe npn3；Anti-discharge diode
D4, second end of its anode connecting valve pipe npn3, its negative electrode connection power end Vcc.
Similarly, metal-oxide-semiconductor M3 can be NMOS tube, and switching tube npn2 and switching tube npn3 can be NPN type triode.Its
In, used as first end, used as the second end, base stage is used as control end for emitter stage for the colelctor electrode of NPN type triode.Certainly, switching tube
Npn2 and switching tube npn3 can also use nmos pass transistor.
In VCC charging circuits shown in Fig. 5 B, size of current is controlled using npn3 and resistance R4.When charging current increases
When, the voltage on resistance R4 is raised so that switching tube npn3 is turned on, and limits the further increase of electric current on resistance R4.Work as MOS
When pipe M3 pipes are turned on, the base stage of switching tube npn2 is drop-down, and the base-collector junction (bc knots) of switching tube npn3 can be turned on, electric current
To be drained on metal-oxide-semiconductor M3 through the base-collector junction (bc knots) of resistance R4, switching tube npn3 from power end Vcc, power supply can be caused
The invalid electric discharge of electric capacity C3 (referring to Fig. 3), and anti-discharge diode D4 can effectively prevent the generation of such case.
With reference to Fig. 6, Fig. 6 shows a kind of circuit structure of the gate voltage control circuit 203 in Fig. 3, mainly includes：Open
S3 is closed, its first end connects the grid of depletion field effect transistor, and its second end is grounded via resistance R5；Switch S4, its first end
The grid of depletion field effect transistor is connected, its second end receives grid bootstrap voltage mode, and the grid bootstrap voltage mode is equal to depletion type
The source voltage Vs of effect pipe and default reference voltage Vref sum；Switch S5, its first end connection depletion field effect transistor
Grid, its second end is connected to the source electrode of depletion field effect transistor via resistance R6；Wherein, switch S3, switch S4 and switch
The turn-on and turn-off of S5 are directly or indirectly controlled by supply voltage and dim signal.By switching S3, switch S4 and switch S5
In different turn-on and turn-off states so that grid voltage Vg can be equal to corresponding voltage.
Furthermore, when switch S3 is turned on, the grid voltage Vg of depletion field effect transistor M2 is grounded via resistance R5, makes
Obtain depletion field effect transistor M2 shut-offs.Wherein, resistance R5 could be arranged to 0.
With reference to Fig. 3 and Fig. 6, before the startup of output current control circuit 105, switch S5 conductings, depletion field effect transistor M2
Grid the source electrode of depletion field effect transistor M2 is connected to by resistance R6 so that depletion field effect transistor M2 is turned on, and now, is led
The conductive capability of logical depletion field effect transistor M2 is relatively weak.
After the startup of output current control circuit 105, gate voltage control circuit 203 receives dim signal, when the light modulation
When semaphore request connects bypass path, in order to reduce the conducting resistance of depletion field effect transistor M2, switch S4 conductings, depletion type
The grid of effect pipe M2 receives grid bootstrap voltage mode, that is, the grid voltage Vg of depletion field effect transistor M2 is equal to source voltage
Vs adds default reference voltage Vref, to improve the conductive capability of depletion field effect transistor M2.
Exceed the supply voltage of output current control circuit 105 due to the magnitude of voltage of grid bootstrap voltage mode Vs+Vref, because
This is, it is necessary to grid boostrap circuit realizes the lifting of voltage.
A kind of grid boostrap circuit is shown with reference to Fig. 7 A~Fig. 7 C, Fig. 7 A, Fig. 7 B and Fig. 7 C respectively illustrate Fig. 7 A and exists
Equivalent circuit under different conditions.The grid boostrap circuit includes：Switch S6, its first end connects the grid of depletion field effect transistor
Pole is receiving grid voltage Vg；Switch S7, its first end receives reference voltage Vref；Electric capacity C4, its first end connecting valve S6
The second end and switch S7 the second end；Switch S8, second end of its first end connection electric capacity C4, its second end ground connection；Switch
S9, second end of its first end connection electric capacity C4, its second end connects the source electrode of depletion field effect transistor to receive source voltage
Vs。
Bootstrap process mainly includes two states：First state, switch S7 and switch S8 conductings, switch S6 and switch S9 are closed
It is disconnected, electric capacity C4 two ends be connected respectively to and reference voltage Vref, now the voltage at electric capacity C4 two ends be charged to reference voltage
Vref, as shown in Figure 7 B；Second state, switch S7 and switch S8 shut-offs, switch S6 and switch S9 conductings, electric capacity C4 two ends difference
The source electrode and grid of depletion field effect transistor M2 are connected to, now the grid voltage Vg of depletion field effect transistor M2 is source voltage
Vs adds reference voltage Vref, it is achieved thereby that bootstrapping function, reduces the conducting resistance of depletion field effect transistor M2, Ke Yiti
For larger electric current to bypass control circuit 202.
Second embodiment
With reference to Fig. 8, Fig. 8 shows the LED dimming driving circuits of second embodiment, its overall structure and shown in Fig. 2 first
Embodiment is essentially identical, and its difference is, in second embodiment, the bypass common circuit 1051 in bypass composite device is only integrated
There are bypass and function of supplying power, start-up circuit 801 is independently of bypass composite device and output current control circuit 105, field-effect
Pipe M2 can be enhanced FET or depletion field effect transistor.
Furthermore, in the circuit course of work, when FET M2 is turned on, ac input signal VAC is via field
Effect pipe M2 and bypass common circuit 1051 form the charging path to power end Vcc, that is, bypass common circuit 1051 only exists
The charged state of power end Vcc is controlled in the circuit course of work.And in start-up course, power supply is realized by start-up circuit 801
Hold the charging of Vcc.For example, start-up circuit 801 can realize quick startup using high-voltage starting circuit, or can also use
Resistance starting carrys out reduces cost.
The internal structure for bypassing common circuit 1051 is identical with first embodiment, repeats no more here.Shared for bypass
The operation principle of circuit 1051, except no longer being charged to power end Vcc on startup, other are also identical with first embodiment.
3rd embodiment
With reference to Fig. 9, Fig. 9 shows the LED dimming driving circuits of 3rd embodiment, its overall structure and shown in Fig. 2 first
Embodiment is essentially identical, and its difference is, in 3rd embodiment, the bypass common circuit 1051 in bypass composite device is only integrated
There are bypass and startup function, power supply circuit 901 is independently of bypass composite device and output current control circuit 105, field-effect
Pipe M2 remains as depletion field effect transistor.
Furthermore, during circuit start, FET M2 conductings, ac input signal VAC is via field-effect
Pipe M2 and bypass common circuit 1051 form the charging path to power end Vcc, that is, bypass common circuit 1051 is only in circuit
The charged state of power end Vcc is controlled in start-up course.And in the circuit course of work, power supply is realized by power supply circuit 901
Hold the charging of Vcc.Power supply circuit 901 can use any appropriate power supply circuit construction in the prior art.
The internal structure for bypassing common circuit 1051 is identical with first embodiment, repeats no more here.Shared for bypass
The operation principle of circuit 1051, except no longer being charged to power end Vcc when circuit works, other also with first embodiment phase
Together.
To sum up, bypass composite device is present embodiments provided, in the LED drive circuit with light modulator, by bypass circuit
Integrated with startup, power supply circuit, the composite device can either realize high-voltage high-speed startup function, and standby shape can be realized again
The power supply of output current control circuit under state, additionally it is possible to realize the bypass circuit function under normal operating conditions and holding state,
The normal work of light modulator can be ensured.
The above, is only presently preferred embodiments of the present invention, and any formal limitation is not made to the present invention.Cause
This, every content without departing from technical solution of the present invention, simply according to technical spirit of the invention to made for any of the above embodiments
Any simple modification, equivalent conversion, are still within the scope of the technical scheme of the invention.
Claims (43)
1. it is a kind of to bypass composite device, it is characterised in that including：
FET, its drain electrode connection high voltage input terminal；
Bypass common circuit, receives grid and the source of dim signal and by-passing signal, connection power end and the FET
Pole, the supply voltage according to the dim signal and the power end controls the working condition of the FET, according to institute
The bypass impedance that by-passing signal is adjusted between the source electrode and ground of the FET is stated, according to the dim signal and the electricity
To the charged state of the power end in source voltage control start-up course and/or in the course of work.
2. device according to claim 1, it is characterised in that the shape that the high voltage input terminal is turned in the FET
Formed and the bypass path between ground via the FET and bypass common circuit under state.
3. device according to claim 1, it is characterised in that the shape that the high voltage input terminal is turned in the FET
Formed and the charging path between the power end via the FET and bypass common circuit under state.
4. device according to claim 1, it is characterised in that the bypass common circuit is according to the dim signal and institute
State the charged state of power end described in supply voltage control startup and the course of work.
5. device according to claim 1, it is characterised in that the bypass common circuit is according to the dim signal and institute
State the charged state of power end described in the supply voltage control course of work.
6. device according to claim 1, it is characterised in that the bypass common circuit is according to the dim signal and institute
State the charged state of power end described in supply voltage control start-up course.
7. device according to any one of claim 1 to 6, it is characterised in that the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charging control signal, institute are produced according to the supply voltage and dim signal
Grid voltage is stated to transmit to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, the electricity
Source the charging circuit source electrode of FET described on or off and power end under the control of the charging control signal
Between charging path；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to the bypass
Signal determines the bypass impedance of the bypass path.
8. device according to claim 7, it is characterised in that the bypass control circuit is logical including one or more impedances
Road, the impedance path includes：
Switch, its first end connects the source electrode of the FET；
Impedance, its first end connects the second end of the switch, its second end ground connection；
Wherein, the turn-on and turn-off of the switch are controlled by the by-passing signal.
9. device according to claim 7, it is characterised in that the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
First switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its second end connects the power end, its control
End processed connects the drain electrode of the metal-oxide-semiconductor；
First resistor, its first end connects the first end of the first switch pipe, and its second end connects the first switch pipe
Control end.
10. device according to claim 7, it is characterised in that the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
Second switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its control end connects the leakage of the metal-oxide-semiconductor
Pole；
3rd switching tube, its first end connects the control end of the second switch pipe, and its control end connects the second switch pipe
The second end；
Second resistance, its first end connects the first end of the second switch pipe, and its second end connects the second switch pipe
Control end；
3rd resistor, its first end connects the control end of the 3rd switching tube, and its second end connects the 3rd switching tube
Second end；
Anti-discharge diode, its anode connects the second end of the 3rd switching tube, and its negative electrode connects the power end.
11. devices according to claim 4, it is characterised in that the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charging control signal, institute are produced according to the supply voltage and dim signal
Grid voltage is stated to transmit to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, the electricity
Source the charging circuit source electrode of FET described on or off and power end under the control of the charging control signal
Between charging path；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to the bypass
Signal determines the bypass impedance of the bypass path；
Wherein, the gate voltage control circuit includes：
First switch, its first end connects the grid of the FET, and its second end is via the 4th resistance eutral grounding；
Second switch, its first end connects the grid of the FET, and its second end receives grid bootstrap voltage mode, the grid
Bootstrap voltage mode is equal to the source voltage and default reference voltage sum of the FET；
3rd switch, its first end connects the grid of the FET, and its second end is connected to the field via the 5th resistance
The source electrode of effect pipe；
Wherein, the turn-on and turn-off of the first switch, second switch and the 3rd switch are by the supply voltage and dim signal
Control.
12. devices according to claim 11, it is characterised in that the gate voltage control circuit is also booted including grid
Circuit, for producing the grid bootstrap voltage mode, the grid boostrap circuit to include：
4th switch, its first end connects the grid of the FET；
5th switch, its first end receives the reference voltage；
Electric capacity, the second end of its first end connection the 4th switch and the second end of the 5th switch；
6th switch, its first end connects the second end of the electric capacity, its second end ground connection；
7th switch, its first end connects the second end of the electric capacity, and its second end connects the source electrode of the FET.
13. devices according to claim 11, it is characterised in that before described device starts, the 3rd switch conduction, institute
The grid for stating FET is connected to the source electrode of the FET, the FET conducting and tool via the 5th resistance
There is the first conductive capability；After described device starts, the dim signal is indicated between the source electrode and ground of the connection FET
Bypass path when, second switch conducting, the grid of the FET receives the grid bootstrap voltage mode, the field effect
Should pipe conducting and with the second conductive capability, second conductive capability is higher than first conductive capability.
14. device according to any one of claim 4,11-13, it is characterised in that the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charging control signal, institute are produced according to the supply voltage and dim signal
Grid voltage is stated to transmit to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, the electricity
Source the charging circuit source electrode of FET described on or off and power end under the control of the charging control signal
Between charging path；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to the bypass
Signal determines the bypass impedance of the bypass path；
Wherein, in start-up course, the gate voltage control circuit controls the FET conducting, and controls the power supply
Charging circuit is turned on, and the high voltage input terminal charges via the FET and power charging circuit to the power end, when
When the supply voltage of the power end reaches the first setting value, the power charging circuit is disconnected, and stopping is filled to the power end
Electricity；In the course of the work, when the supply voltage drops to the second setting value, the gate voltage control circuit is according to
Dim signal controls the FET conducting, and controls the power charging circuit to turn on, and the high voltage input terminal is via institute
State FET and power charging circuit to charge the power end, when the supply voltage of the power end reaches the 3rd setting value
When, the power charging circuit disconnects, and stops charging the power end.
15. devices according to claim 14, it is characterised in that the 3rd setting value between second setting value and
Between first setting value.
16. devices according to claim 1, it is characterised in that the power end is configured to the first end with power supply capacitor
Connection, the second end ground connection of the power supply capacitor.
17. devices according to claim 4, it is characterised in that the FET is depletion field effect transistor.
18. devices according to claim 5, it is characterised in that the FET is enhanced FET or exhausts
Type FET.
19. devices according to claim 6, it is characterised in that the FET is depletion field effect transistor.
A kind of 20. output current control circuits, it is characterised in that including：
Bypass composite device, the bypass composite device includes：
FET, its drain electrode connection high voltage input terminal；
Bypass common circuit, receives grid and the source of dim signal and by-passing signal, connection power end and the FET
Pole, the supply voltage according to the dim signal and the power end controls the working condition of the FET, according to institute
The bypass impedance that by-passing signal is adjusted between the source electrode and ground of the FET is stated, according to the dim signal and the electricity
To the charged state of the power end in source voltage control start-up course and/or in the course of work；
Dim signal produces circuit, for the dimming state of detection control unit producing the dim signal；
Power control circuit, the control signal for regulating load electric current or bearing power is produced according to the dim signal.
21. output current control circuits according to claim 20, it is characterised in that the high voltage input terminal is in the field
Formed and the bypass path between ground via the FET and bypass common circuit in the state of the conducting of effect pipe.
22. output current control circuits according to claim 20, it is characterised in that the high voltage input terminal is in the field
Charging in the state of the conducting of effect pipe between the FET and the formation of bypass common circuit and the power end is led to
Road.
23. output current control circuits according to claim 20, it is characterised in that the bypass common circuit is according to institute
State the charged state of power end described in dim signal and supply voltage control startup and the course of work.
24. output current control circuits according to claim 20, it is characterised in that the bypass common circuit is according to institute
State the charged state of power end described in dim signal and the supply voltage control course of work.
25. output current control circuits according to claim 20, it is characterised in that the bypass common circuit is according to institute
State the charged state of power end described in dim signal and supply voltage control start-up course.
26. output current control circuit according to any one in claim 20 to 25, it is characterised in that the bypass
Common circuit includes：
Gate voltage control circuit, grid voltage and charging control signal, institute are produced according to the supply voltage and dim signal
Grid voltage is stated to transmit to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, the electricity
Source the charging circuit source electrode of FET described on or off and power end under the control of the charging control signal
Between charging path；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to the bypass
Signal determines the bypass impedance of the bypass path.
27. output current control circuits according to claim 26, it is characterised in that the bypass control circuit includes one
Individual or multiple impedance paths, the impedance path includes：
Switch, its first end connects the source electrode of the FET；
Impedance, its first end connects the second end of the switch, its second end ground connection；
Wherein, the turn-on and turn-off of the switch are controlled by the by-passing signal.
28. output current control circuits according to claim 26, it is characterised in that the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
First switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its second end connects the power end, its control
End processed connects the drain electrode of the metal-oxide-semiconductor；
First resistor, its first end connects the first end of the first switch pipe, and its second end connects the first switch pipe
Control end.
29. output current control circuits according to claim 26, it is characterised in that the power charging circuit includes：
Anti- diode of playing a reversed role, its anode connects the source electrode of the FET；
Metal-oxide-semiconductor, its grid receives the charging control signal, its source ground；
Second switch pipe, the negative electrode of its first end connection anti-diode of playing a reversed role, its control end connects the leakage of the metal-oxide-semiconductor
Pole；
3rd switching tube, its first end connects the control end of the second switch pipe, and its control end connects the second switch pipe
The second end；
Second resistance, its first end connects the first end of the second switch pipe, and its second end connects the second switch pipe
Control end；
3rd resistor, its first end connects the control end of the 3rd switching tube, and its second end connects the 3rd switching tube
Second end；
Anti-discharge diode, its anode connects the second end of the 3rd switching tube, and its negative electrode connects the power end.
30. output current control circuits according to claim 23, it is characterised in that the bypass common circuit includes：
Gate voltage control circuit, grid voltage and charging control signal, institute are produced according to the supply voltage and dim signal
Grid voltage is stated to transmit to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, the electricity
Source the charging circuit source electrode of FET described on or off and power end under the control of the charging control signal
Between charging path；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to the bypass
Signal determines the bypass impedance of the bypass path；
Wherein, the gate voltage control circuit includes：
First switch, its first end connects the grid of the FET, and its second end is via the 4th resistance eutral grounding；
Second switch, its first end connects the grid of the FET, and its second end receives grid bootstrap voltage mode, the grid
Bootstrap voltage mode is equal to the source voltage and default reference voltage sum of the FET；
3rd switch, its first end connects the grid of the FET, and its second end is connected to the field via the 5th resistance
The source electrode of effect pipe；
Wherein, the turn-on and turn-off of the first switch, second switch and the 3rd switch are by the supply voltage and dim signal
Control.
31. output current control circuits according to claim 30, it is characterised in that the gate voltage control circuit is also
Including grid boostrap circuit, for producing the grid bootstrap voltage mode, the grid boostrap circuit to include：
4th switch, its first end connects the grid of the FET；
5th switch, its first end receives the reference voltage；
Electric capacity, the second end of its first end connection the 4th switch and the second end of the 5th switch；
6th switch, its first end connects the second end of the electric capacity, its second end ground connection；
7th switch, its first end connects the second end of the electric capacity, and its second end connects the source electrode of the FET.
32. output current control circuits according to claim 30, it is characterised in that the output current control circuit is opened
Before dynamic, the 3rd switch conduction, the grid of the FET is connected to the FET via the 5th resistance
Source electrode, the FET is turned on and with the first conductive capability；After the output current control circuit starts, the light modulation letter
When number indicating to connect the bypass path between the source electrode and ground of the FET, the second switch conducting, the field-effect
The grid of pipe receives the grid bootstrap voltage mode, and the FET is turned on and with the second conductive capability, and described second is conductive
Ability is higher than first conductive capability.
33. output current control circuit according to any one of claim 23,30-32, it is characterised in that the bypass
Common circuit includes：
Gate voltage control circuit, grid voltage and charging control signal, institute are produced according to the supply voltage and dim signal
Grid voltage is stated to transmit to the grid of the FET；
Power charging circuit, its first end connects the source electrode of the FET, and its second end connects the power end, the electricity
Source the charging circuit source electrode of FET described on or off and power end under the control of the charging control signal
Between charging path；
Bypass control circuit, for the bypass path between the source electrode and ground that provide the FET, and according to the bypass
Signal determines the bypass impedance of the bypass path；
Wherein, in start-up course, the gate voltage control circuit controls the FET conducting, and controls the power supply
Charging circuit is turned on, and the high voltage input terminal charges via the FET and power charging circuit to the power end, when
When the supply voltage of the power end reaches the first setting value, the power charging circuit is disconnected, and stopping is filled to the power end
Electricity；In the course of the work, when the supply voltage drops to the second setting value, the gate voltage control circuit is according to
Dim signal controls the FET conducting, and controls the power charging circuit to turn on, and the high voltage input terminal is via institute
State FET and power charging circuit to charge the power end, when the supply voltage of the power end reaches the 3rd setting value
When, the power charging circuit disconnects, and stops charging the power end.
34. output current control circuits according to claim 33, it is characterised in that the 3rd setting value is between described
Between second setting value and the first setting value.
35. output current control circuits according to claim 20, it is characterised in that the power end is configured to and power supply
The first end connection of electric capacity, the second end ground connection of the power supply capacitor.
36. output current control circuit according to any one of claim 20 to 25,30 to 32 and 35, its feature exists
In also including：By-passing signal produce circuit, in response to the Preset Time before ac input signal zero passage to zero passage after it is default when
Between, the by-passing signal produces circuit to produce the by-passing signal.
37. output current control circuits according to claim 23, it is characterised in that the FET is depletion type
Effect pipe.
38. output current control circuits according to claim 24, it is characterised in that the FET is enhanced field
Effect pipe or depletion field effect transistor.
39. output current control circuits according to claim 25, it is characterised in that the FET is depletion type
Effect pipe.
40. a kind of LED dimming driving circuits, it is characterised in that including the output electricity any one of claim 20 to 29
Flow control circuit.
41. LED dimming driving circuits according to claim 40, it is characterised in that also include：
Alternating current input power supplying, it has exchange input first end and exchanges the second end of input；Control unit, its input connection is handed over
Stream input first end；
Rectification circuit, its input first end connects the output end of described control unit, its second end of input connection exchange input the
Two ends, its output first end connects the high voltage input terminal；
Input filter capacitor, its first end connects the output first end of the rectification circuit, and its second end connects the rectified current
The end of output second on road is simultaneously grounded；
Diode, its anode connects the output first end of the rectification circuit；
Power transfer circuitry, its first input end connects the negative electrode of the diode, and its second input connects the power control
The output end of circuit processed, its output end is used to connect load.
42. LED dimming driving circuits according to claim 41, it is characterised in that the alternating current input power supplying, control are single
Unit, FET and bypass common circuit form a galvanic circle in the state of FET conducting, the galvanic circle
For being powered to described control unit；The galvanic circle disconnects in the state of FET shut-off.
The 43. LED dimming driving circuits according to claim 41 or 42, it is characterised in that described control unit is light modulation
Device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410776959.4A CN104378894B (en) | 2014-12-15 | 2014-12-15 | LED dimming driving circuits and its output current control circuit and bypass composite device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410776959.4A CN104378894B (en) | 2014-12-15 | 2014-12-15 | LED dimming driving circuits and its output current control circuit and bypass composite device |
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| CN104378894A CN104378894A (en) | 2015-02-25 |
| CN104378894B true CN104378894B (en) | 2017-06-16 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1338813A (en) * | 2000-08-15 | 2002-03-06 | 株式会社村田制作所 | High voltage power supply with light emitting discharge tube for protection circuit and fault protecting circuits |
| CN102461017A (en) * | 2009-05-08 | 2012-05-16 | 三星电子株式会社 | Apparatus and method for support of dimming in visible light communication |
| CN203896560U (en) * | 2014-05-29 | 2014-10-22 | 横店集团得邦照明股份有限公司 | LED illumination control circuit used for realizing light and color simultaneous adjustment by silicon controlled rectifier light modulator |
| CN204335061U (en) * | 2014-12-15 | 2015-05-13 | 杭州士兰微电子股份有限公司 | LED dimming driving circuit and output current control circuit thereof and bypass composite device |
-
2014
- 2014-12-15 CN CN201410776959.4A patent/CN104378894B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1338813A (en) * | 2000-08-15 | 2002-03-06 | 株式会社村田制作所 | High voltage power supply with light emitting discharge tube for protection circuit and fault protecting circuits |
| CN102461017A (en) * | 2009-05-08 | 2012-05-16 | 三星电子株式会社 | Apparatus and method for support of dimming in visible light communication |
| CN203896560U (en) * | 2014-05-29 | 2014-10-22 | 横店集团得邦照明股份有限公司 | LED illumination control circuit used for realizing light and color simultaneous adjustment by silicon controlled rectifier light modulator |
| CN204335061U (en) * | 2014-12-15 | 2015-05-13 | 杭州士兰微电子股份有限公司 | LED dimming driving circuit and output current control circuit thereof and bypass composite device |
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| Publication number | Publication date |
|---|---|
| CN104378894A (en) | 2015-02-25 |
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