CN104377977A - Three-level converter and control method thereof - Google Patents

Abstract

Disclosed are a three-level converter and a control method thereof. The three-level converter comprises four legs connected in parallel and a capacitance circuit in parallel connection with the legs. Four phase wires a, b, c and n are led out from the four legs, respectively. A neutral wire is led out from a midpoint of the capacitance circuit. The capacitance circuit comprises a first capacitor and a second capacitor serially connected and then parallelly connected to two ends of a direct current busbar. Each leg comprises a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, each of which is reversely parallelly connected with a diode; the first switch tube, the second switch tube and the third switch tube are connected in series and are then connected in parallel at two ends of the direct current busbar; one phase wire is led out from between the second and third switch tubes; one end of the fourth switch tube is connected between the first and second switch tubes; the other end of the fourth switch is connected between the first and second capacitors. The three-level converter has the advantages that complex coordinate transformation in PARK transformation or CLARK transformation is avoided, vectors are processed by making direct use of space geometry, the modulating process is simple and easy to understand and has clear physical meanings.

Description

A kind of three-level inverter and control method thereof

Technical field

The present invention relates to a kind of inverter, specifically a kind of three-level inverter and control method thereof.

Background technology

Inverter structure type conventional at present has three kinds: full-bridge tandem type, striding capacitance type and diode clamp formula.For the inverter of same level, full-bridge cascade type DC-to-AC converter does not need clamping diode and striding capacitance, but needs many DC source; Striding capacitance type inverter needs the striding capacitance of respective numbers; Diode clamp formula inverter needs certain clamping diode.

In the pulse-width modulation method of inverter, conventional has sinusoidal pulse width modulation method (SPWM), space vector modulating method (SVPWM) two kinds.The advantage of SPWM method is its simple principle and good control, adjusting function, and can play the multiple effects such as harmonic carcellation, adjustment and regulated output voltage, but the voltage utilization of DC terminal power supply is low.SVPWM method is from motor angle, and target is how to make motor obtain the circular rotating field of constant amplitude.It is that the desirable magnetic flux circle of alternating current motor is benchmark when powering with three-phase symmetrical sine voltage, go to approach basic circle magnetic flux with the actual magnetic flux that the switching mode that inverter is different produces, the result compared by them determines that the switch of semiconductor device turns on and off, and forms PWM waveform.Due to it, inverter and motor are regarded as an entirety to process, the model obtained seems very simple, and be convenient to the real-time control of microcomputer, and it is little to have torque pulsation, noise is low, and therefore the advantage that voltage utilization is high is widely used at present.Mainly utilize PARK conversion or CLARK conversion at present by three-phase voltage from abc coordinate system transformation to α β o coordinate system, but conversion process needs a large amount of computational process, also have the three-dimensional space vector modulation method based on abc coordinate system (not carrying out coordinate transform), but its whole process neither be readily appreciated that.

Summary of the invention

For the deficiencies in the prior art, the invention provides a kind of three-level inverter and control method thereof, provide not only a kind of novel three-level inverter, and provide a kind of three-dimensional space vector modulation algorithm of fairly simple, easy understand.

The present invention solves the technical scheme that its technical problem takes: a kind of three-level inverter, it is characterized in that, the condenser network comprising 4 brachium pontis be connected in parallel and be connected in parallel with 4 brachium pontis, from 4 brachium pontis, draw a, b, c and n tetra-phase lines respectively, draw the neutral line from the mid point of condenser network; Described condenser network comprises the first electric capacity and the second electric capacity, the two ends of DC bus are connected in parallel on after described first electric capacity and the second capacitances in series, described brachium pontis comprises the first switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube, the two ends of DC bus are connected in parallel on after the series connection of the first described switching tube, second switch pipe and the 3rd switching tube, phase line is drawn in the middle of second switch pipe and the 3rd switching tube, one end of described 4th switching tube is connected between the first switching tube and second switch pipe, and the other end is connected between the first electric capacity and the second electric capacity; The first described switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube be inverse parallel diode respectively.

An inductance is provided with in described a, b, c and n tetra-phase lines.

Described switching tube comprises igbt transistor.

The electric capacity of described first electric capacity and the second electric capacity is equal.

Present invention also offers a kind of control method of three-level inverter, it is characterized in that, the first electric capacity in described condenser network is equal with the capacitance voltage of the second electric capacity; Described control method comprises the following steps:

Given reference voltage;

16 road pulse-width modulation waveforms are produced by three-dimensional space vector modulation method;

The 16 road pulse-width modulation waveforms produced are utilized to control opening and turning off the waveform exporting and need to obtain of brachium pontis switching tube.

Described three-dimensional space vector modulation method comprises the following steps:

Three level four bridge legs inversion system is carried out unified Modeling, forms three-dimensional space vectors coordinate system;

Given reference voltage is normalized, and the amount after normalized is rounded;

Judge which space tetrahedron the voltage after processing is positioned at by space geometry relation;

The corresponding tetrahedral vector in space is utilized to carry out synthesized reference vector.

The forming process of described three-dimensional space vectors coordinate system is as follows:

The switch function of each brachium pontis is defined as such as formula shown in (1):

$g_m=\left\{\begin{array}{c}1,S_{m1}=S_{m2}=1\\ 0,S_{m2}=S_{m4}=1\\ -1,S_{m3}=1\end{array}\right.---\left(1\right)$

Wherein, m=a, b, c, n, switching tube state is 1 expression opening state;

First switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube are divided into two groups, and 4 switching tubes of each brachium pontis have 4 kinds of compound modes, and form 4 vectors, then this three level four-leg inverter has 256 switching values;

64 different switching vector selectors are obtained after Redundanter schalter amount in 256 switching values being removed;

By origin of coordinates translation, allow all vectors all move in positive direction, then switching vector selector forms three large cubes at three dimensions, and three large cubes spatially Zhang Chengyi space dodecahedron;

Each large cube can be subdivided into 8 small cubes, remove two small cubes overlapped, comprise 22 complete small cubes altogether, the number of vertex that removing cube shares, 22 complete small cubes have 64 independently summits, respectively corresponding 64 different on off states;

Each small cubes is divided into 6 tetrahedrons of corresponding reference vector position in tetrahedron respectively by cubical three diagonal planes, all vectors after being normalized reference vector will drop on dodecahedral inside, space;

Adopt the vector corresponding to corresponding tetrahedron 4 summits to carry out the synthesis of reference vector, the building-up process of described reference vector is after the switching vector selector determining reference vector and the action time of compute switch vector.

Describedly determine that the process of the switching vector selector of reference vector comprises the following steps:

The formula of definition to reference voltage normalized, as shown in Equation 2:

$v_{\mathrm{in}}=\frac{v_{\mathrm{rin}}}{v_{\mathrm{dc}}}---\left(2\right)$

Wherein, i=a, b, c;

Given three-phase reference voltage Vref, utilize normaliztion constant Vdc/n with reference to vector normalize to-(n-1) ..., (n-1) scope, again the reference voltage vector after normalization to be moved in positive direction to simplify control procedure, obtain vector V _an, V _bnand V _cn;

The apex coordinate of the small cubes pointed by through type 3 computing reference vector:

$\left\{\begin{array}{c}a=\mathrm{int\; eger}\left(v_{\mathrm{ran}}\right)\\ b=\mathrm{int\; eger}\left(v_{\mathrm{rbn}}\right)\\ c=\mathrm{int\; eger}\left(v_{\mathrm{rcn}}\right)\end{array}\right.---\left(3\right)$

Wherein, v _ran, v _rbn, v _rcnfor reference vector;

Coordinate (a, b, c) is the origin of the small cubes reference frame that reference vector points to;

Carry out tetrahedral judgement work, thus determine the switching vector selector of reference vector.

Carry out reference vector normalized and after obtaining the coordinate of reference vector, described tetrahedral deterministic process comprises the following steps:

(1) if v _rbn≤ v _rcn+ b-c, proceeds to step (2), otherwise proceeds to step (4);

(2) if v _ran>=v _rcn+ a-c, then reference vector drops in tetrahedron I, otherwise proceeds to step (3);

(3) if v _rbn≤ v _ran+ b-a, then reference vector drops in tetrahedron II, otherwise reference vector drops in tetrahedron III;

(4) if v _ran>=v _rcn+ a-c, then reference vector drops in tetrahedron IV, otherwise proceeds to step (5);

(5) if v _rbn>=v _ran+ b-a, then reference vector drops in tetrahedron V, otherwise reference vector drops in tetrahedron VI.

Through type action time of described switching vector selector 4 calculates:

$\left\{\begin{array}{c}{v}_{\mathrm{ran}}={s_{\mathrm{an}}}^1{d}_1+{s_{\mathrm{an}}}^2{d}_2+{s_{\mathrm{an}}}^3{d}_3+{s_{\mathrm{an}}}^4{d}_4\\ v_{\mathrm{rbn}}={s_{\mathrm{bn}}}^1{d}_1+{s_{\mathrm{bn}}}^2{d}_2+{s_{\mathrm{bn}}}^3{d}_3+{s_{\mathrm{bn}}}^4{d}_4\\ v_{\mathrm{rcn}}={s_{\mathrm{cn}}}^1{d}_1+{s_{\mathrm{cn}}}^2{d}_2+{s_{\mathrm{cn}}}^3{d}_3+{s_{\mathrm{cn}}}^4{d}_4\\ d_1+d_2+d_3+d_4=1\end{array}\right.---\left(4\right)$

In formula, (s _an ¹, s _bn ¹, s _cn ¹), (s _an ², s _bn ², s _cn ²), (s _an ³, s _bn ³, s _cn ³), (s _an ⁴, s _bn ⁴, s _cn ⁴) be respectively the tetrahedron top coordinate of synthesized reference vector;

Then be respectively d the action time of 4 switching vector selectors ₁t _m, d ₂t _m, d ₃t _m, d ₄t _m, wherein, T _mfor the systematic sampling time.

The invention has the beneficial effects as follows: the invention provides a kind of asymmetric three level four-leg inverter and three-dimensional space vector modulation method, the asymmetric four-leg inverter of its three level have employed 16 IGBT device with anti-also diode, each brachium pontis adopts dissymmetrical structure, form with the anti-and IGBT device of diode by 4, its modulator approach is mainly space geometry and gains knowledge, comprise the judgement of vector space positions, the selection of vector and the calculating of action time, the selection of switching mode, present invention, avoiding the complicated coordinate transform of PARK conversion or CLARK conversion, space geometry knowledge is directly utilized to be processed by vector, whole modulated process is simple, and easy understand, physical meaning is clear and definite.

Accompanying drawing explanation

Fig. 1 is the structural representation of three-level inverter of the present invention;

Fig. 2 is the flow chart of control method of the present invention;

Fig. 3 (a)-Fig. 3 (d) is the switching mode figure of single brachium pontis of the present invention;

Fig. 4 is the dodecahedral schematic diagram in space of the present invention;

Fig. 5 is the three-dimensional space vectors figure of three-level inverter of the present invention;

Fig. 6 is the medium and small cubical division schematic diagram of space of the present invention dodecahedron;

Fig. 7 (a)-Fig. 7 (f) is each tetrahedral schematic diagram rear for small cubes divides;

Fig. 8 is the origin figure of the present invention one reference vector place small cubes;

Fig. 9 is the flow chart of tetrahedral deterministic process of the present invention.

Embodiment

For clearly demonstrating the technical characterstic of this programme, below by embodiment, and in conjunction with its accompanying drawing, the present invention will be described in detail.Disclosing hereafter provides many different embodiments or example is used for realizing different structure of the present invention.Of the present invention open in order to simplify, hereinafter the parts of specific examples and setting are described.In addition, the present invention can in different example repeat reference numerals and/or letter.This repetition is to simplify and clearly object, itself does not indicate the relation between discussed various embodiment and/or setting.It should be noted that parts illustrated in the accompanying drawings are not necessarily drawn in proportion.Present invention omits the description of known assemblies and treatment technology and process to avoid unnecessarily limiting the present invention.

As shown in Figure 1, a kind of three-level inverter of the present invention, the condenser network that it comprises 4 brachium pontis be connected in parallel and is connected in parallel with 4 brachium pontis, draws a, b, c and n tetra-phase lines respectively from 4 brachium pontis, draws the neutral line from the mid point of condenser network; Described condenser network comprises the first electric capacity and the second electric capacity, the two ends of DC bus are connected in parallel on after described first electric capacity and the second capacitances in series, described brachium pontis comprises the first switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube, the two ends of DC bus are connected in parallel on after the series connection of the first described switching tube, second switch pipe and the 3rd switching tube, phase line is drawn in the middle of second switch pipe and the 3rd switching tube, one end of described 4th switching tube is connected between the first switching tube and second switch pipe, and the other end is connected between the first electric capacity and the second electric capacity; The first described switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube be inverse parallel diode respectively; An inductance is provided with in described a, b, c and n tetra-phase lines.Wherein, described switching tube comprises igbt transistor, and the electric capacity of described first electric capacity and the second electric capacity is equal.

As shown in Figure 2, the control method of a kind of three-level inverter of the present invention, it comprises the following steps:

Given reference voltage;

16 road pulse-width modulation waveforms are produced by three-dimensional space vector modulation method;

Utilize the 16 road pulse-width modulation waveforms produced to control opening and turning off the waveform exporting and need to obtain of brachium pontis switching tube, thus DC source is converted into the alternating current source needed for load.

According to the on off state of switching tube, switch function as shown in Equation 1 can be defined:

$g_m=\left\{\begin{array}{c}1,S_{m1}=S_{m2}=1\\ 0,S_{m2}=S_{m4}=1\\ -1,S_{m3}=1\end{array}\right.---\left(1\right)$

Wherein, m=a, b, c, n, switching tube state is 1 expression opening state.

When DC capacitor voltage is equal, two groups of switching tubes of every phase brachium pontis have four kinds of different combinations, can form four vectors, as shown in Fig. 3 (a) to Fig. 3 (d).Remove redundant vectors, then every phase brachium pontis has three different vectors, corresponding to three different level Vc, and 0 ,-Vc.Four-leg inverter has 4 ⁴=256 switching vector selectors, through normalized, and press the mould progress row classification of vector, can obtain 10 kinds of different switching vector selectors, relevant vector form and quantity as shown in table 1 below.

Table 1 asymmetric four-bridge arm tri-level switching vector selector type list

And containing a large amount of Redundanter schalter vector in these 256 vectors, the great majority when modulating in them can substitute, this depends primarily on the change of switching frequency, adopts the principle of the change minimum of its state during each switching over.After removing redundant vectors, 64 different switching vector selectors can be obtained, its vector form and quantity as shown in table 2.

Table 2 asymmetric four-bridge arm tri-level switching vector selector type list

In order to shortcut calculation, by origin of coordinates translation, all vectors are allowed all to move in positive direction; As shown in Figure 4, three-phase four-bridge arm tri-level switching vector selector forms three large cubes at three dimensions, three large cubes spatially Zhang Chengyi space dodecahedron.As shown in Figure 5, each large cube can be subdivided into 8 small cubes, contained by the large cube of formation three-dimensional dodecahydrogon, the quantity of small cubes is determined by inverter level number, a small cubes is only had for two-level inverter, then there are 8 small cubes for three-level inverter, then have 27 small cubes for four electrical level inverters.In the diagram, remove two small cubes overlapped, comprise 22 complete small cubes altogether.The number of vertex that removing cube shares, 22 complete small cubes have 64 independently summits, respectively corresponding 64 different on off states.

After reference vector normalized, all vectors will drop on dodecahedral inside, like this, for any such reference vector, always can find out four (or three) vectors to synthesize this reference vector.As shown in Figure 6, each small cubes can be divided into 6 tetrahedrons (tetrahedron I-VI) by cubical three diagonal planes, corresponding reference vector is in which tetrahedral position respectively, and tetrahedron I-VI is as shown in Fig. 7 (a)-Fig. 7 (f).Each tetrahedral subregion and coordinate are indicated in Figure 5.When reference voltage vector falls within certain tetrahedron, then can synthesize the reference vector of needs with the vector corresponding to this tetrahedron 4 summits.

Spatially Vector Modulation principle, in each sampling period, by selecting the combination of suitable switching vector selector, make the output of inverter in weber meaning with given reference vector equivalence.For this reason, the synthesis of reference vector can be divided into two main steps: first determine switching vector selector; Then the action time of each switching vector selector is calculated.

Table look-up in Conventional spatial Vector Modulation algorithm and the computing of trigonometric function, have employed a kind of based on the three-dimensional space vector modulation algorithm under abc coordinate system.First with reference to voltage normalized, to the formula of reference voltage normalized as shown in Equation 2:

$v_{\mathrm{in}}=\frac{v_{\mathrm{rin}}}{v_{\mathrm{dc}}}---\left(2\right)$

Wherein, i=a, b, c.

Given three-phase reference voltage Vref, utilize DC terminal voltage to be normalized, normalization is only decided by the level number n DC terminal voltage value Vdc of multi-electrical level inverter, utilizes normaliztion constant Vdc/n to normalize to {-(n-1) with reference to vector, ..., (n-1) } scope.Again the reference voltage vector after normalization to be moved in positive direction to simplify control procedure, now obtain vector V _an, V _bnand V _cn.

The apex coordinate of the small cubes then pointed by computing reference vector.For the specific reference vector v of under three phase coordinate systems _ran, v _rbn, v _rcn, its apex coordinate can be determined by the integer part of the reference vector after normalization, and computing formula is:

$\left\{\begin{array}{c}a=\mathrm{int\; eger}\left(v_{\mathrm{ran}}\right)\\ b=\mathrm{int\; eger}\left(v_{\mathrm{rbn}}\right)\\ c=\mathrm{int\; eger}\left(v_{\mathrm{rcn}}\right)\end{array}\right.---\left(3\right)$

As shown in Figure 8, coordinate (a, b, c) is the origin of the small cubes reference frame that reference vector points to.When reference voltage is known, namely the small cubes coordinate at reference vector place uniquely determines, and then carries out tetrahedral judgement work.

Tetrahedral judgement flow process as shown in Figure 9.Carry out reference vector normalized and after obtaining the coordinate of reference vector, then carry out judgement tetrahedron by following steps: (1) is if v _rbn≤ v _rcn+ b-c, proceeds to step (2), otherwise proceeds to step (4); (2) if v _ran>=v _rcn+ a-c, then reference vector drops in tetrahedron I, otherwise proceeds to step (3); (3) if v _rbn≤ v _ran+ b-a, then reference vector drops in tetrahedron II, otherwise reference vector drops in tetrahedron III; (4) if v _ran>=v _rcn+ a-c, then reference vector drops in tetrahedron IV, otherwise proceeds to step (5); (5) if v _rbn>=v _ran+ b-a, then reference vector drops in tetrahedron V, otherwise reference vector drops in tetrahedron VI.

After the switching vector selector needed for synthesized reference vector is determined, then can calculate the action time of each switching vector selector according to the principle that volt-second characteristic meaning is equal.If the tetrahedron top coordinate of note synthesized reference vector is respectively (s _an ¹, s _bn ¹, s _cn ¹), (s _an ², s _bn ², s _cn ²), (s _an ³, s _bn ³, s _cn ³), (s _an ⁴, s _bn ⁴, s _cn ⁴) be then respectively d the action time of four switching vector selectors ₁t _m, d ₂t _m, d ₃t _m, d ₄t _m, wherein, T _mfor the systematic sampling time.Can arrange according to the principle that weber meaning is equal and write out following equation:

$\left\{\begin{array}{c}{v}_{\mathrm{ran}}={s_{\mathrm{an}}}^1{d}_1+{s_{\mathrm{an}}}^2{d}_2+{s_{\mathrm{an}}}^3{d}_3+{s_{\mathrm{an}}}^4{d}_4\\ v_{\mathrm{rbn}}={s_{\mathrm{bn}}}^1{d}_1+{s_{\mathrm{bn}}}^2{d}_2+{s_{\mathrm{bn}}}^3{d}_3+{s_{\mathrm{bn}}}^4{d}_4\\ v_{\mathrm{rcn}}={s_{\mathrm{cn}}}^1{d}_1+{s_{\mathrm{cn}}}^2{d}_2+{s_{\mathrm{cn}}}^3{d}_3+{s_{\mathrm{cn}}}^4{d}_4\\ d_1+d_2+d_3+d_4=1\end{array}\right.---\left(4\right)$

As can be seen from above equation group, the calculating of switching vector selector action time seems very simple, only needs to separate quaternary linear function group, is easily realized by DSP.The action time of each corresponding switching vector selector can be solved rapidly by above formula.

Validity of the present invention is verified by experiment, can not only track reference voltage preferably, and meets international requirement.

The above is the preferred embodiment of the present invention, and for those skilled in the art, under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications are also regarded as protection scope of the present invention.

Claims (10)

1. a three-level inverter, is characterized in that, the condenser network comprising 4 brachium pontis be connected in parallel and be connected in parallel with 4 brachium pontis, draws a, b, c and n tetra-phase lines from 4 brachium pontis respectively, draws the neutral line from the mid point of condenser network; Described condenser network comprises the first electric capacity and the second electric capacity, the two ends of DC bus are connected in parallel on after described first electric capacity and the second capacitances in series, described brachium pontis comprises the first switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube, the two ends of DC bus are connected in parallel on after the series connection of the first described switching tube, second switch pipe and the 3rd switching tube, phase line is drawn in the middle of second switch pipe and the 3rd switching tube, one end of described 4th switching tube is connected between the first switching tube and second switch pipe, and the other end is connected between the first electric capacity and the second electric capacity; The first described switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube be inverse parallel diode respectively.

2. a kind of three-level inverter according to claim 1, is characterized in that, is provided with an inductance in described a, b, c and n tetra-phase lines.

3. a kind of three-level inverter according to claim 1, is characterized in that, described switching tube comprises igbt transistor.

4. a kind of three-level inverter according to claim 1, is characterized in that, the electric capacity of described first electric capacity and the second electric capacity is equal.

5. the control method of a kind of three-level inverter described in the claims, is characterized in that, the first electric capacity in described condenser network is equal with the capacitance voltage of the second electric capacity; Described control method comprises the following steps:

Given reference voltage;

16 road pulse-width modulation waveforms are produced by three-dimensional space vector modulation method;

The 16 road pulse-width modulation waveforms produced are utilized to control opening and turning off the waveform exporting and need to obtain of brachium pontis switching tube.

6. the control method of a kind of three-level inverter according to claim 5, is characterized in that, described three-dimensional space vector modulation method comprises the following steps:

Three level four bridge legs inversion system is carried out unified Modeling, forms three-dimensional space vectors coordinate system;

Given reference voltage is normalized, and the amount after normalized is rounded;

Judge which space tetrahedron the voltage after processing is positioned at by space geometry relation;

The corresponding tetrahedral vector in space is utilized to carry out synthesized reference vector.

7. the control method of a kind of three-level inverter according to claim 6, is characterized in that, the forming process of described three-dimensional space vectors coordinate system is as follows:

The switch function of each brachium pontis is defined as such as formula shown in (1):

$g_m=\left\{\begin{array}{c}1,S_{m1}=S_{m2}=1\\ 0,S_{m2}=S_{m4}=1\\ -1,S_{m3}=1\end{array}\right.---\left(1\right)$

Wherein, m=a, b, c, n, switching tube state is 1 expression opening state;

First switching tube, second switch pipe, the 3rd switching tube and the 4th switching tube are divided into two groups, and 4 switching tubes of each brachium pontis have 4 kinds of compound modes, and form 4 vectors, then this three level four-leg inverter has 256 switching values;

64 different switching vector selectors are obtained after Redundanter schalter amount in 256 switching values being removed;

By origin of coordinates translation, allow all vectors all move in positive direction, then switching vector selector forms three large cubes at three dimensions, and three large cubes spatially Zhang Chengyi space dodecahedron;

Each large cube can be subdivided into 8 small cubes, remove two small cubes overlapped, comprise 22 complete small cubes altogether, the number of vertex that removing cube shares, 22 complete small cubes have 64 independently summits, respectively corresponding 64 different on off states;

Each small cubes is divided into 6 tetrahedrons of corresponding reference vector position in tetrahedron respectively by cubical three diagonal planes, all vectors after being normalized reference vector will drop on dodecahedral inside, space;

Adopt the vector corresponding to corresponding tetrahedron 4 summits to carry out the synthesis of reference vector, the building-up process of described reference vector is after the switching vector selector determining reference vector and the action time of compute switch vector.

8. the control method of a kind of three-level inverter according to claim 7, is characterized in that, describedly determines that the process of the switching vector selector of reference vector comprises the following steps:

The formula of definition to reference voltage normalized, as shown in Equation 2:

$v_{\mathrm{in}}=\frac{v_{\mathrm{rin}}}{v_{\mathrm{dc}}}---\left(2\right)$

Wherein, i=a, b, c;

Given three-phase reference voltage Vref, utilize normaliztion constant Vdc/n with reference to vector normalize to-(n-1) ..., (n-1) scope, again the reference voltage vector after normalization to be moved in positive direction to simplify control procedure, obtain vector V _an, V _bnand V _cn;

The apex coordinate of the small cubes pointed by through type 3 computing reference vector:

$\left\{\begin{array}{c}a=\mathrm{integer}\left(v_{\mathrm{ran}}\right)\\ b=\mathrm{integer}\left(v_{\mathrm{rbn}}\right)\\ c=\mathrm{integer}\left(v_{\mathrm{rcn}}\right)\end{array}\right.---\left(3\right)$

Wherein, v _ran, v _rbn, v _rcnfor reference vector;

Coordinate (a, b, c) is the origin of the small cubes reference frame that reference vector points to;

Carry out tetrahedral judgement work, thus determine the switching vector selector of reference vector.

9. the control method of a kind of three-level inverter according to claim 8, is characterized in that, carries out reference vector normalized and after obtaining the coordinate of reference vector, described tetrahedral deterministic process comprises the following steps:

(1) if v _rbn≤ v _rcn+ b-c, proceeds to step (2), otherwise proceeds to step (4);

(2) if v _ran>=v _rcn+ a-c, then reference vector drops in tetrahedron I, otherwise proceeds to step (3);

(3) if v _rbn≤ v _ran+ b-a, then reference vector drops in tetrahedron II, otherwise reference vector drops in tetrahedron III;

(4) if v _ran>=v _rcn+ a-c, then reference vector drops in tetrahedron IV, otherwise proceeds to step (5);

(5) if v _rbn>=v _ran+ b-a, then reference vector drops in tetrahedron V, otherwise reference vector drops in tetrahedron VI.

10. the control method of a kind of three-level inverter according to claim 7, is characterized in that, through type action time of described switching vector selector 4 calculates:

$\left\{\begin{array}{c}{v}_{\mathrm{ran}}={s_{\mathrm{an}}}^1{d}_1+{s_{\mathrm{an}}}^2{d}_2+{s_{\mathrm{an}}}^3{d}_3+{s_{\mathrm{an}}}^4{d}_4\\ v_{\mathrm{rbn}}={s_{\mathrm{bn}}}^1{d}_1+{s_{\mathrm{bn}}}^2{d}_2+{s_{\mathrm{bn}}}^3{d}_3+{s_{\mathrm{bn}}}^4{d}_4\\ v_{\mathrm{rcn}}={s_{\mathrm{cn}}}^1{d}_1+{s_{\mathrm{cn}}}^2{d}_2+{s_{\mathrm{cn}}}^3{d}_3+{s_{\mathrm{cn}}}^4{d}_4\\ d_1+d_2+d_3+d_4=1\end{array}\right.---\left(4\right)$

In formula, (s _an ¹, s _bn ¹, s _cn ¹), (s _an ², s _bn ², s _cn ²), (s _an ³, s _bn ³, s _cn ³), (s _an ⁴, s _bn ⁴, s _cn ⁴) be respectively the tetrahedron top coordinate of synthesized reference vector;

Then be respectively d the action time of 4 switching vector selectors ₁t _m, d ₂t _m, d ₃t _m, d ₄t _m, wherein, T _mfor the systematic sampling time.