CN104281243A - Processor of radio-frequency remote equipment and processor resetting method - Google Patents

Processor of radio-frequency remote equipment and processor resetting method Download PDF

Info

Publication number
CN104281243A
CN104281243A CN201410515635.5A CN201410515635A CN104281243A CN 104281243 A CN104281243 A CN 104281243A CN 201410515635 A CN201410515635 A CN 201410515635A CN 104281243 A CN104281243 A CN 104281243A
Authority
CN
China
Prior art keywords
kernel
rru
row control
bbu
control kernel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410515635.5A
Other languages
Chinese (zh)
Other versions
CN104281243B (en
Inventor
王文冬
周应学
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Datang Mobile Communications Equipment Co Ltd
Original Assignee
Datang Mobile Communications Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Datang Mobile Communications Equipment Co Ltd filed Critical Datang Mobile Communications Equipment Co Ltd
Priority to CN201410515635.5A priority Critical patent/CN104281243B/en
Publication of CN104281243A publication Critical patent/CN104281243A/en
Application granted granted Critical
Publication of CN104281243B publication Critical patent/CN104281243B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24Resetting means
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W24/00Supervisory, monitoring or testing arrangements
    • H04W24/04Arrangements for maintaining operational condition

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention provides a processor of radio-frequency remote equipment and a processor resetting method. The processor of an RRU (radio remote unit) is provided with N kernels, wherein N is a positive integer larger than or equal to 2, and the N kernels include a process control kernel and at least one algorithm task kernel. The processor resetting method includes that when the circumstance that the flow control kernel does not survive is monitored by the algorithm task kernels, the algorithm task kernels take over a peripheral on chip of the processor of the RRU for service data transmission between the RRU and a BBU (base band unit), wherein the peripheral on chip is used for service data transmission between the RRU and the BBU; when the flow control kernel survives after resetting starting due to software abnormality, the flow control kernel takes over the peripheral on chip from the algorithm task kernels for service data transmission between the RRU and the BBU. By the processor and the processor resetting method, interruption of normal transmission of service data between the RRU and the BBU due to the fact that the flow control kernel does not survive is avoided, and normal transmission of the service data between the RRU and the BBU is guaranteed.

Description

A kind of processor of RF remote equipment and processor reset method
Technical field
The present invention relates to communication technical field, particularly relate to a kind of processor and processor reset method of RF remote equipment.
Background technology
TD SDMA (Time Division-Synchronous Code Division Multiple Access, TD-SCDMA)/time-division Long Term Evolution (Time Division Long Term Evolution, TD-LTE) base station equipment (Node B) is distributed base station equipment, it is by Base Band Unit equipment (Building Base band Unit, BBU), RF remote equipment (Radio Remote Unit, RRU) form, be a kind of can flexible distributed formula install base station combination, wherein RRU is connected with BBU by Ir interface, as shown in Figure 1.
Many master slave modes such as Ir interface supports Y-connection, chain connects, annular connection, a BBU can be connected with multiple RRU, in practical application, the quantity of RRU is much larger than the quantity of BBU, along with the extensive commercialization of TD-LTE, the quantity of outfield RRU device will roll up, and this has higher requirement to the long-time failure-free operation of RRU.
Because the quantity of RRU is large, occur that the probability of software anomaly is also relatively high.After software anomaly, RRU cannot normally run, and need to adopt the means resetted to recover normal and run, RRU resets to the normal duration run generally all needs a few minutes, has a strong impact on the perception of user.
The software of RRU mainly completes the function of the periodic calibration of mutual, the RRU of RRU and BBU.Wherein, the mutual of RRU and BBU mainly comprises detection in place, the inquiry of parameter, configuration.When BBU configures constant, the periodic calibration of RRU, be mainly used to ensure when outside environmental change (mainly temperature), the performance index of RRU meet the demands.The outside environmental elements such as temperature do not have significant change in the short time, cycle of periodic calibration generally be 1 hour even longer, the time that RRU resets, much smaller than the cycle of periodic calibration, can think unchanged in the performance index of RRU in the so short time that reset.
Between RRU and BBU, the transmission of business datum itself does not need software to participate in.The transmission of RRU business datum and receiving cable as shown in Figure 2, are completed by field programmable gate array (Field-Programmable Gate Array, FPGA) and RRU hardware.Wherein, FPGA comprises excuse FPGA and intermediate frequency FPGA, the transmission of business datum is responsible for by digital to analog converter (Digital to Analog Converter, DAC), power amplifier (Power Amplifier, PA) and IL interface antenna etc.; The reception of business datum is responsible for by analog to digital converter (Analog to Digital Converter, ADC), low noise amplifier (Low Noise Amplifier, LNA) and IL interface antenna etc.
If in the process that RRU resets because of software anomaly, the configuration of FPGA and RRU hardware can be kept constant, the mutual maintenance of RRU and BBU is normal, and the business data transmission between RRU and BBU just can keep normal.
When existing RRU resets, not only reset to processor, FPGA, RRU hardware also can carry out reloading and initialization, and RRU will disconnect the connection with main website, and business data transmission is interrupted.
Further, due to RRU reset after restart work to RRU, to load through FPGA, the series of steps such as hardware initialization, equipment self-inspection, calibrate, RRU access, to need to expend the normal transmission that the long period could recover business datum.
Summary of the invention
The invention provides a kind of processor and processor reset method of RF remote equipment, to solve the processor of RF remote equipment when resetting because of software anomaly, the problem of business datum normal transmission can not be kept.
In order to solve the problem, the invention discloses a kind of processor reset method of RF remote equipment, the processor of described RF remote equipment RRU is provided with N number of kernel, N >=2, N is positive integer, and described N number of kernel comprises a Row control kernel and at least one algorithm task kernel; Described method comprises:
When described algorithm task kernel monitor described Row control kernel do not survive time, described algorithm task kernel takes over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and RF remote equipment B BU, wherein, described On-Chip peripheral is used for the business data transmission between described RRU and described BBU;
When described Row control kernel to reset after startup becomes survival because of software anomaly, described Row control kernel takes over described On-Chip peripheral from described algorithm task kernel, carries out the business data transmission between described RRU and described BBU.
Preferably, whether described algorithm task kernel is monitored described Row control kernel in the following manner and is survived:
Described algorithm task kernel regularly sends survival query messages to described Row control kernel;
When described algorithm task kernel receives the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is survived;
When described algorithm task kernel continuous N time sends described survival query messages, and when not receiving the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is not survived, and M is positive integer.
Preferably, to reset before startup becomes survival because of software anomaly at described Row control kernel, described method also comprises: described Row control kernel preserves the community configured information of described RRU and status information to internal memory;
To reset after startup becomes survival because of software anomaly at described Row control kernel, described method also comprises: described Row control kernel copies community configured information and the status information of described RRU from described internal memory, and is saved in the variable corresponding with the community configured information of described RRU and status information.
Preferably, also comprise:
When described Row control kernel is not survived, described algorithm task kernel reports the warning information of described Row control kernel exception to described BBU;
When described Row control kernel to reset after startup becomes survival because of software anomaly, described Row control kernel reports the alarm clearance information of described Row control kernel exception to described BBU.
Preferably, to reset after startup becomes survival because of software anomaly at described Row control kernel, described method also comprises:
Described Row control kernel detects the identity identification information of described RRU or the heartbeat message of described BBU;
If described Row control kernel can't detect the identity identification information of described RRU or the heartbeat message of described BBU, then karyogenesis in described Row control, preserve this reset alarm information of described RRU, horizontal reset of going forward side by side; Wherein, the heartbeat message of described BBU is described BBU after receiving the heartbeat message that described RRU sends, to the return information that described RRU sends;
And, after determining that the interface channel between described RRU and described BBU has been set up, described Row control kernel reports this reset alarm information of described RRU to described BBU, wherein, when described RRU sends heartbeat message and receives the heartbeat message of described BBU reply, the interface channel between described RRU and described BBU has been set up.
Preferably, also comprise:
When described Row control kernel is not survived, and when the time that described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, the overall hardware checking the processor of described RRU in described algorithm task resets;
Described overall hardware comprises micro-control unit and field programmable gate array.
Correspondingly, the invention also discloses a kind of processor of RF remote equipment, the processor of described RF remote equipment RRU is provided with N number of kernel, N >=2, and N is positive integer, and described N number of kernel comprises a Row control kernel and at least one algorithm task kernel;
Described algorithm task kernel, for monitor when it described Row control kernel do not survive time, take over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and RF remote equipment B BU, wherein, described On-Chip peripheral is used for the business data transmission between described RRU and described BBU;
Described Row control kernel, after becoming survival, takes over described On-Chip peripheral from described algorithm task kernel, carries out the business data transmission between described RRU and described BBU for the startup that to reset because of software anomaly when it.
Preferably, whether described algorithm task kernel is monitored described Row control kernel in the following manner and is survived:
Described algorithm task kernel regularly sends survival query messages to described Row control kernel;
When described algorithm task kernel receives the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is survived;
When described algorithm task kernel continuous N time sends described survival query messages, and when not receiving the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is not survived, and M is positive integer.
Preferably, described Row control kernel, before also becoming survival for the startup that to reset because of software anomaly at it, preserves the community configured information of described RRU and status information to internal memory; And,
After its startup that to reset because of software anomaly becomes survival, from described internal memory, copy community configured information and the status information of described RRU, and be saved in the variable corresponding with the community configured information of described RRU and status information.
Preferably, described algorithm task kernel, also for when described Row control kernel is not survived, reports the warning information of described Row control kernel exception to described BBU;
Described Row control kernel, after also becoming survival for the startup that to reset because of software anomaly when it, reports the alarm clearance information of its exception to described BBU.
Preferably, described Row control kernel, after also becoming survival for the startup that to reset because of software anomaly at it, detects the identity identification information of described RRU or the heartbeat message of described BBU;
If can't detect the identity identification information of described RRU or the heartbeat message of described BBU, then generate, preserve this reset alarm information of described RRU, horizontal reset of going forward side by side; Wherein, the heartbeat message of described BBU is described BBU after receiving the heartbeat message that described RRU sends, to the return information that described RRU sends;
And, after determining that the interface channel between described RRU and described BBU has been set up, report this reset alarm information of described RRU to described BBU, wherein, when described RRU sends heartbeat message and receives the heartbeat message of described BBU reply, the interface channel between described RRU and described BBU has been set up.
Preferably, described algorithm task kernel, also for not surviving when described Row control kernel, and when the time that described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, resets to the overall hardware of the processor of described RRU;
Described overall hardware comprises micro-control unit and field programmable gate array.
Compared with background technology, the present invention includes following advantage:
RRU processor in technical solution of the present invention is provided with N number of kernel, N >=2, and N is positive integer.N number of kernel comprises a Row control kernel and at least one algorithm task kernel.When algorithm task kernel monitor Row control kernel do not survive time, the On-Chip peripheral of algorithm task kernel adapter RRU processor, with the business data transmission between carry out RRU and BBU, avoid because flow monitoring kernel is not survived and interrupt the business datum normal transmission between RRU and BBU.
When Row control kernel to reset after startup becomes survival because of software anomaly, Row control kernel from algorithm task kernel adapter On-Chip peripheral, the business data transmission between carry out RRU and BBU.Whether the Row control kernel no matter in RRU survives, and the On-Chip peripheral of RRU processor all has kernel to take over, and ensures the normal transmission of business datum between RRU and BBU.
Accompanying drawing explanation
Fig. 1 is the annexation schematic diagram of RRU and BBU;
Fig. 2 is the transmitting-receiving relation schematic diagram of RRU interior business data;
Fig. 3 is the processor reset method flow diagram of a kind of RRU in the embodiment of the present invention;
Fig. 4 is kernel survival monitoring function schematic diagram in the embodiment of the present invention;
Fig. 5 is the processor reset method flow diagram of another kind of RRU in the embodiment of the present invention;
Fig. 6 is the schematic diagram that in the embodiment of the present invention, RRU sends heartbeat message to BBU;
Fig. 7 is the schematic diagram that in the embodiment of the present invention, BBU sends heartbeat message to RRU;
Fig. 8 is the processor reset method flow diagram of another RRU in the embodiment of the present invention;
Fig. 9 is the operational flow diagram of BBU in the embodiment of the present invention;
Figure 10 is the processor structure schematic diagram of a kind of RRU in the embodiment of the present invention.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, and below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Cost is manufactured in order to what reduce RRU, some algorithms in RRU are moved processor to realize by FPGA, increasing RRU processor selection Advanced RISC Machine (Advanced RISC Machines, ARM)+digital signal processor (digital signal processor, DSP) SOC (system on a chip) (System on Chip, SOC) or the SOC of ARM+ARM, many kernels be designed to keep business data transmission to bring possibility in the process that RRU resets because of software anomaly.
In the embodiment of the present invention, the processor of RRU is provided with N number of kernel, N >=2, and N is positive integer, and described N number of kernel can comprise a Row control kernel and at least one algorithm task kernel.
The processor of a kind of RRU provided by the invention and the processor reset method of this RRU is introduced in detail below by enumerating several specific embodiment.
Embodiment one
Introduce the processor reset method of a kind of RRU that the embodiment of the present invention provides in detail.
With reference to Fig. 3, show the processor reset method flow diagram of a kind of RRU in the embodiment of the present invention.
Step 100, when described algorithm task kernel monitor described Row control kernel do not survive time, described algorithm task kernel takes over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and RF remote equipment B BU.
Wherein, described On-Chip peripheral is used for the business data transmission between described RRU and described BBU, comprises the equipment such as Ethernet interface.On-Chip peripheral is all exercisable for all kernels in RRU processor.
RRU processor in the embodiment of the present invention can have kernel survival monitoring function, be used for confirming whether monitored kernel normally runs, be specifically as follows monitoring kernel and send survival query messages to monitored kernel, if monitoring kernel receives the survival response message that monitored kernel is replied, then think that monitored kernel is survived, otherwise think that monitored kernel is not survived, be in exceptional reset state, kernel survival monitoring function schematic diagram as shown in Figure 4.
When described RRU processor comprises polyalgorithm task kernel, from polyalgorithm task kernel, one can be selected, the On-Chip peripheral of the processor of RRU described in trustship arbitrarily, to carry out the business data transmission between described RRU and RF remote equipment B BU.
Step 102, when described Row control kernel to reset after startup becomes survival because of software anomaly, described Row control kernel takes over described On-Chip peripheral from described algorithm task kernel, carries out the business data transmission between described RRU and described BBU.
It should be noted that, above-mentioned Row control kernel resets because of software anomaly and starts the process of survival of becoming, and does not need to reset to other kernels in RRU processor, does not also need the FPGA of RRU and other hardware reloads and initialization operation.
In sum, the RRU processor in embodiment of the present invention technical scheme is provided with N number of kernel, N >=2, and N is positive integer.N number of kernel comprises a Row control kernel and at least one algorithm task kernel.When algorithm task kernel monitor Row control kernel do not survive time, the On-Chip peripheral of algorithm task kernel adapter RRU processor, with the business data transmission between carry out RRU and BBU, avoid because flow monitoring kernel is not survived and interrupt the business datum normal transmission between RRU and BBU.
When Row control kernel to reset after startup becomes survival because of software anomaly, Row control kernel from algorithm task kernel adapter On-Chip peripheral, the business data transmission between carry out RRU and BBU.Whether the Row control kernel no matter in RRU survives, and the On-Chip peripheral of RRU processor all has kernel to take over, and ensures the normal transmission of business datum between RRU and BBU.
Embodiment two
Introduce the processor reset method of a kind of RRU that the embodiment of the present invention provides in detail.
With reference to Fig. 5, show the processor reset method flow diagram of a kind of RRU in the embodiment of the present invention.
Step 200, described Row control kernel preserves the community configured information of described RRU and status information to internal memory.
Described step 200 can be described Row control kernel under its existing state, namely under normal operating conditions, the community configured information of RRU and status information are saved in internal memory.Its objective is and the community configured information of RRU and status information can be read out after treating Row control core reset, be unlikely to lose community configured information and status information because of Row control core reset.
Step 202, in described algorithm task, described in Nuclear monitoring, whether Row control kernel survives.
Without fixing ordinal relation between described step 202 and above-mentioned steps 200, two steps can perform simultaneously.
Preferably, described step 202 can be:
Described algorithm task kernel regularly sends survival query messages to described Row control kernel.
Described step 202 can be the operation steps regularly performed, and namely performs at regular intervals once.
(1), when described algorithm task kernel receives the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is survived.
(2), when the described algorithm task kernel continuous N time described survival query messages of transmission, and when not receiving the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is not survived, and M is positive integer.
When described algorithm task kernel monitor described Row control kernel do not survive time, subsequent step 204, step 206 and step 208 can be performed.
Step 204, described algorithm task kernel takes over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and RF remote equipment B BU.
Wherein, described On-Chip peripheral can comprise the equipment such as Ethernet card, may be used for the business data transmission between described RRU and described BBU.
Step 206, described algorithm task kernel reports the warning information of described Row control kernel exception to described BBU.
After above-mentioned steps 204, namely after described algorithm task kernel takes over the On-Chip peripheral of the processor of described RRU, above-mentioned steps 206 can be performed, the warning information of the exception of not survived by described Row control kernel is sent to described BBU, the reason that Row control kernel is not survived can be analyzed in order to operating personnel, and the timely fault got rid of Row control kernel and do not survive.
Step 208, when the time that described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, the overall hardware checking the processor of described RRU in described algorithm task resets.
Wherein, described overall hardware comprises micro-control unit and field programmable gate array, and other hardware etc. of RRU processor.
Described step 208 there is no direct ordinal relation with above-mentioned steps 204 and step 206, by sequence number mark just for convenient explanation.
Suppose that the marginal time is 9 seconds, if the heartbeat message that described BBU does not receive described RRU and sends for continuous 10 seconds, the time that then described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, and the hardware such as micro-control unit and field programmable gate array checking the processor of described RRU in described algorithm task resets.
When described algorithm task kernel monitors the survival of described Row control kernel, after startup becomes survival and described Row control kernel resets because of software anomaly, subsequent step 210, step 212, step 214 and step 216 can be performed.
Step 210, described Row control kernel takes over described On-Chip peripheral from described algorithm task kernel, carries out the business data transmission between described RRU and described BBU.
After described Row control core reset startup becomes survival, can again be taken over by described algorithm task kernel adapter On-Chip peripheral in the past before.
Step 212, described Row control kernel copies community configured information and the status information of described RRU from described internal memory, and is saved in the variable corresponding with the community configured information of described RRU and status information.
Described Row control kernel does not need again to obtain community configured information and status information, directly can copy the community configured information and status information preserved from internal memory, saves Row control kernel from resetting to the normal release time run.
Step 214, described Row control kernel reports the alarm clearance information of described Row control kernel exception to described BBU.
Described alarm clearance information reporting to described BBU, can be understood the running status of described Row control kernel by described Row control kernel in real time in order to operating personnel.
Described step 214 and above-mentioned steps 212 there is no direct ordinal relation, by sequence number mark just for convenient explanation.
Step 216, described Row control kernel detects the identity identification information of described RRU or the heartbeat message of described BBU.
Described step 216 and above-mentioned steps 214, step 212 there is no direct ordinal relation, by sequence number mark just for convenient explanation.
If described Row control kernel can't detect the identity identification information of described RRU or the heartbeat message of described BBU, then karyogenesis in described Row control, preserve this reset alarm information of described RRU, horizontal reset of going forward side by side.
Wherein, the heartbeat message of described BBU is described BBU after receiving the heartbeat message that described RRU sends, to the return information that described RRU sends.
Further, after determining that the interface channel between described RRU and described BBU has been set up, described Row control kernel reports this reset alarm information of described RRU to described BBU.
Wherein, when described RRU sends heartbeat message and receives the heartbeat message of described BBU reply, the interface channel between described RRU and described BBU has been set up.
Carry out detection in place by mutually sending heartbeat message between described BBU and described RRU, the trigger condition of detection in place is that the interface channel between BBU and RRU has been set up.Fig. 6 is that RRU sends the schematic diagram of heartbeat message to BBU; Fig. 7 is that BBU sends the schematic diagram of heartbeat message to RRU.
In sum, the RRU processor in embodiment of the present invention technical scheme is provided with N number of kernel, N >=2, and N is positive integer.N number of kernel comprises a Row control kernel and at least one algorithm task kernel.When algorithm task kernel monitor Row control kernel do not survive time, the On-Chip peripheral of algorithm task kernel adapter RRU processor, with the business data transmission between carry out RRU and BBU, avoid because flow monitoring kernel is not survived and interrupt the business datum normal transmission between RRU and BBU.
When Row control kernel to reset after startup becomes survival because of software anomaly, Row control kernel from algorithm task kernel adapter On-Chip peripheral, the business data transmission between carry out RRU and BBU.Whether the Row control kernel no matter in RRU survives, and the On-Chip peripheral of RRU processor all has kernel to take over, and ensures the normal transmission of business datum between RRU and BBU.
In the process that Row control kernel resets because of software anomaly, reduce unnecessary flow process, comprise reloading and the operation such as initialization FPGA and RRU hardware, accelerate the release time that Row control kernel resets because of software anomaly.
Embodiment three
Introduce the processor reset method of a kind of RRU that the embodiment of the present invention provides in detail.
With reference to Fig. 8, show the processor reset method flow diagram of a kind of RRU in the embodiment of the present invention.
After RUU starts, perform step 300.
Step 300, Row control kernel starts.
Step 302, judges whether Row control kernel resetted because of software anomaly before this starts.
When Row control kernel was reset because of software anomaly before this starts, then perform step 304; Otherwise, perform step 306.
Step 304, Row control kernel copies being recorded in corresponding variable of having preserved from high memory.
Wherein, the described record preserved can comprise community configured information and the status information of described RRU, is saved in the middle of high memory before reset by described Row control kernel.
Step 308, Row control kernel notification algorithm task kernel completes startup.
Step 310, Row control kernel is from the communication between the adapter of algorithm task kernel and BBU.
Next, step 312 is performed.
Step 312, RRU normally works.
Preferably, described step 312 can also be: if because software anomaly resets before Row control kernel, then after RRU normally works, control the alarm clearance information of kernel to BBU report flow.
Step 314, if there is software anomaly in the RRU course of work, is recorded in high memory described in the preservation of Row control kernel, Row control core reset.Re-execute step 300 afterwards.
Step 306, loading tasks algorithm kernel, assignment algorithm kernel brings into operation.
Step 316, loads FPGA, initiating hardware.
Step 318, RRU accesses main website.Perform step 312 afterwards.
It should be noted that, after above-mentioned steps 306, can also the following step be performed simultaneously.
Step 320, whether algorithm task kernel monitoring stream process control kernel survives.
If Row control kernel is survived, then re-execute step 320; Otherwise, perform step 322.
Step 322, algorithm task kernel replaces Row control kernel and BBU to keep in communication, and report flow controls the abnormality alarming information of kernel.
It should be noted that, algorithm task kernel will before BBU detects that RRU is not survived, adapter On-Chip peripheral, keeps the communication between BBU.
Step 324, waits for that Row control kernel completes startup.
Step 326, judges whether Row control kernel completes startup.
If Row control kernel completes startup, then perform step 320; Otherwise, perform step 324.
The processor reset method of a kind of RRU in the embodiment of the present invention also provides abnormal protection to RRU.
Usually, embedded system has house dog, can carry out the whole sheet reset of RRU to situations such as software anomalys.House dog is designed to 10 seconds to the time that RRU justifying resets, ensures that justifying is greater than the sense cycle in place of RRU reset time.
(1) if kernels all on RRU is all abnormal, house dog is to the whole sheet reset of RRU in 10 seconds, and the abnormal of multiple kernel is resolved after whole sheet reset.
(2) if equipment on the sheets such as Row control kernel adapter Ethernet interface, BBU detects that RRU is not in place, deletes all carrier waves on this RRU, stops and RRU mutual.After Row control kernel starts, if can't detect RRU identity identification information or can't detect the heartbeat message of BBU side, then carry out relevant subsequent process: generate and preserve the warning information causing RRU to reset, entering the reset mode not affecting next stage RRU.Reset after starting and reenter the Path Setup process mutual with BBU, and in Path Setup request message, report the warning information of preservation in time, can analyze the reset circuit of RRU in order to operating personnel, get rid of the fault causing RRU to reset in time.
(3) other kernel exception except Row control kernel, the same short time can not affect RRU performance index, resets to corresponding abnormal kernel or reloads start-up operation.
Because the time of the Row control core reset of RRU is very short, suppose maximumly to be no more than 100 seconds, can ensure that the performance index of RRU are unchanged, BBU is after the abnormal warning message receiving Row control kernel, and in the normal situation of detection in place of RRU, BBU avoided being configured and query manipulation RRU within 100 second time, whether in placely only detected RRU.If more than 100 seconds, the alarm of Row control kernel exception is not removed, and RRU is still in place, then issue whole sheet reset order to RRU, performs the reset operation to micro-control unit, other hardware of FPGA and RRU by algorithm task kernel.
With reference to Fig. 9, show the operational flow diagram of BBU in the embodiment of the present invention.
Step 400, RRU accesses BBU, sets up community.
Step 402, BBU carries out conventional maintenance to RRU.
Step 404, BBU receives the abnormal warning message of the Row control kernel of RRU.
Step 406, BBU only detects the heartbeat message of RRU, is not configured and query manipulation RRU.
Step 408, waits for the alarm clearance message of Row control kernel.
Step 410, judges that whether the stand-by period is more than 100 seconds.
If the stand-by period was more than 100 seconds, perform step 412; Otherwise, perform step 402.
Step 412, sends justifying reset command to RRU.
In sum, the RRU processor in embodiment of the present invention technical scheme is provided with N number of kernel, N >=2, and N is positive integer.N number of kernel comprises a Row control kernel and at least one algorithm task kernel.When algorithm task kernel monitor Row control kernel do not survive time, the On-Chip peripheral of algorithm task kernel adapter RRU processor, with the business data transmission between carry out RRU and BBU, avoid because flow monitoring kernel is not survived and interrupt the business datum normal transmission between RRU and BBU.
When Row control kernel to reset after startup becomes survival because of software anomaly, Row control kernel from algorithm task kernel adapter On-Chip peripheral, the business data transmission between carry out RRU and BBU.Whether the Row control kernel no matter in RRU survives, and the On-Chip peripheral of RRU processor all has kernel to take over, and ensures the normal transmission of business datum between RRU and BBU.
In the process that Row control kernel resets because of software anomaly, reduce unnecessary flow process, comprise reloading and the operation such as initialization FPGA and RRU hardware, accelerate the release time that Row control kernel resets because of software anomaly.
Increase the abnormality alarming function of the Row control kernel of RRU, and the corresponding subsequent treatment of BBU, after Row control core reset when normal startup, the business datum normal transmission between RRU and BBU; When normally not starting after Row control core reset, initiate whole sheet reset by BBU side, solve abnormal.
Increase the abnormity protection function of RRU, when guaranteeing single kernel and many kernel exceptions in RRU, RRU can recover normal operating conditions.
Embodiment four
Introduce the processor of a kind of RRU that the embodiment of the present invention provides in detail.
With reference to Figure 10, show the processor structure schematic diagram of a kind of RRU in the embodiment of the present invention.
The processor of described a kind of RRU is provided with N number of kernel, N >=2, and N is positive integer, and described N number of kernel can comprise a Row control kernel 500 and at least one algorithm task kernel 502.
Described algorithm task kernel 502, for monitor when it described Row control kernel 500 do not survive time, take over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and BBU.
Wherein, described On-Chip peripheral is used for the business data transmission between described RRU and described BBU.
Preferably, whether described algorithm task kernel 502 is monitored described Row control kernel 500 in the following manner and is survived:
Described algorithm task kernel 502 regularly sends survival query messages to described Row control kernel 500.
When described algorithm task kernel 502 receives the survival response message of described Row control kernel 500 reply, described algorithm task kernel 502 judges that described Row control kernel 500 is survived.
When described algorithm task kernel 502 continuous N time sends described survival query messages, and when not receiving the survival response message of described Row control kernel 500 reply, described algorithm task kernel 502 judges that described Row control kernel 500 is not survived, and M is positive integer.
Preferably, described algorithm task kernel 502, also for when described Row control kernel 500 is not survived, reports the warning information of described Row control kernel 500 exception to described BBU.
Preferably, described algorithm task kernel 502, also for not surviving when described Row control kernel 500, and when the time that described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, resets to the overall hardware of the processor of described RRU.Wherein, described overall hardware comprises micro-control unit and field programmable gate array.
Described Row control kernel 500, after becoming survival, takes over described On-Chip peripheral from described algorithm task kernel 502, carries out the business data transmission between described RRU and described BBU for the startup that to reset because of software anomaly when it.
Preferably, described Row control kernel 500, before also becoming survival for the startup that to reset because of software anomaly at it, preserves the community configured information of described RRU and status information to internal memory; And, after its startup that to reset because of software anomaly becomes survival, from described internal memory, copy community configured information and the status information of described RRU, and be saved in the variable corresponding with the community configured information of described RRU and status information.
Preferably, described Row control kernel 500, after also becoming survival for the startup that to reset because of software anomaly when it, reports the alarm clearance information of its exception to described BBU.
Preferably, described Row control kernel 500, after also becoming survival for the startup that to reset because of software anomaly at it, detects the identity identification information of described RRU or the heartbeat message of described BBU.
If can't detect the identity identification information of described RRU or the heartbeat message of described BBU, then generate, preserve this reset alarm information of described RRU, horizontal reset of going forward side by side.Wherein, the heartbeat message of described BBU is described BBU after receiving the heartbeat message that described RRU sends, to the return information that described RRU sends.
Further, after determining that the interface channel between described RRU and described BBU has been set up, report this reset alarm information of described RRU to described BBU.Wherein, when described RRU sends heartbeat message and receives the heartbeat message of described BBU reply, the interface channel between described RRU and described BBU has been set up.
In sum, the RRU processor in embodiment of the present invention technical scheme is provided with N number of kernel, N >=2, and N is positive integer.N number of kernel comprises a Row control kernel and at least one algorithm task kernel.When algorithm task kernel monitor Row control kernel do not survive time, the On-Chip peripheral of algorithm task kernel adapter RRU processor, with the business data transmission between carry out RRU and BBU, avoid because flow monitoring kernel is not survived and interrupt the business datum normal transmission between RRU and BBU.
When Row control kernel to reset after startup becomes survival because of software anomaly, Row control kernel from algorithm task kernel adapter On-Chip peripheral, the business data transmission between carry out RRU and BBU.Whether the Row control kernel no matter in RRU survives, and the On-Chip peripheral of RRU processor all has kernel to take over, and ensures the normal transmission of business datum between RRU and BBU.
In the process that Row control kernel resets because of software anomaly, reduce unnecessary flow process, comprise reloading and the operation such as initialization FPGA and RRU hardware, accelerate the release time that Row control kernel resets because of software anomaly.
Increase the abnormality alarming function of the Row control kernel of RRU, and the corresponding subsequent treatment of BBU, after Row control core reset when normal startup, the business datum normal transmission between RRU and BBU; When normally not starting after Row control core reset, initiate whole sheet reset by BBU side, solve abnormal.
For the embodiment of the processor of RRU, due to itself and embodiment of the method basic simlarity, so description is fairly simple, relevant part illustrates see the part of embodiment of the method.
Each embodiment in this instructions all adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar part mutually see.
The processor of a kind of RRU above embodiment of the present invention provided and the repositioning method of this processor, be described in detail, apply specific case herein to set forth principle of the present invention and embodiment, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.

Claims (12)

1. a processor reset method for RF remote equipment, is characterized in that, the processor of described RF remote equipment RRU is provided with N number of kernel, N >=2, and N is positive integer, and described N number of kernel comprises a Row control kernel and at least one algorithm task kernel; Described method comprises:
When described algorithm task kernel monitor described Row control kernel do not survive time, described algorithm task kernel takes over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and RF remote equipment B BU, wherein, described On-Chip peripheral is used for the business data transmission between described RRU and described BBU;
When described Row control kernel to reset after startup becomes survival because of software anomaly, described Row control kernel takes over described On-Chip peripheral from described algorithm task kernel, carries out the business data transmission between described RRU and described BBU.
2. method according to claim 1, is characterized in that, whether described algorithm task kernel is monitored described Row control kernel in the following manner and survived:
Described algorithm task kernel regularly sends survival query messages to described Row control kernel;
When described algorithm task kernel receives the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is survived;
When described algorithm task kernel continuous N time sends described survival query messages, and when not receiving the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is not survived, and M is positive integer.
3. method according to claim 1, is characterized in that,
To reset before startup becomes survival because of software anomaly at described Row control kernel, described method also comprises: described Row control kernel preserves the community configured information of described RRU and status information to internal memory;
To reset after startup becomes survival because of software anomaly at described Row control kernel, described method also comprises: described Row control kernel copies community configured information and the status information of described RRU from described internal memory, and is saved in the variable corresponding with the community configured information of described RRU and status information.
4. method according to claim 1, is characterized in that, also comprises:
When described Row control kernel is not survived, described algorithm task kernel reports the warning information of described Row control kernel exception to described BBU;
When described Row control kernel to reset after startup becomes survival because of software anomaly, described Row control kernel reports the alarm clearance information of described Row control kernel exception to described BBU.
5. method according to claim 1, is characterized in that, to reset after startup becomes survival because of software anomaly at described Row control kernel, described method also comprises:
Described Row control kernel detects the identity identification information of described RRU or the heartbeat message of described BBU;
If described Row control kernel can't detect the identity identification information of described RRU or the heartbeat message of described BBU, then karyogenesis in described Row control, preserve this reset alarm information of described RRU, horizontal reset of going forward side by side; Wherein, the heartbeat message of described BBU is described BBU after receiving the heartbeat message that described RRU sends, to the return information that described RRU sends;
And, after determining that the interface channel between described RRU and described BBU has been set up, described Row control kernel reports this reset alarm information of described RRU to described BBU, wherein, when described RRU sends heartbeat message and receives the heartbeat message of described BBU reply, the interface channel between described RRU and described BBU has been set up.
6. method according to claim 5, is characterized in that, also comprises:
When described Row control kernel is not survived, and when the time that described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, the overall hardware checking the processor of described RRU in described algorithm task resets;
Described overall hardware comprises micro-control unit and field programmable gate array.
7. a processor for RF remote equipment, is characterized in that, the processor of described RF remote equipment RRU is provided with N number of kernel, N >=2, and N is positive integer, and described N number of kernel comprises a Row control kernel and at least one algorithm task kernel;
Described algorithm task kernel, for monitor when it described Row control kernel do not survive time, take over the On-Chip peripheral of the processor of described RRU, to carry out the business data transmission between described RRU and RF remote equipment B BU, wherein, described On-Chip peripheral is used for the business data transmission between described RRU and described BBU;
Described Row control kernel, after becoming survival, takes over described On-Chip peripheral from described algorithm task kernel, carries out the business data transmission between described RRU and described BBU for the startup that to reset because of software anomaly when it.
8. processor according to claim 7, is characterized in that, whether described algorithm task kernel is monitored described Row control kernel in the following manner and survived:
Described algorithm task kernel regularly sends survival query messages to described Row control kernel;
When described algorithm task kernel receives the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is survived;
When described algorithm task kernel continuous N time sends described survival query messages, and when not receiving the survival response message of described Row control kernel reply, described algorithm task kernel judges that described Row control kernel is not survived, and M is positive integer.
9. processor according to claim 7, is characterized in that,
Described Row control kernel, before also becoming survival for the startup that to reset because of software anomaly at it, preserves the community configured information of described RRU and status information to internal memory; And,
After its startup that to reset because of software anomaly becomes survival, from described internal memory, copy community configured information and the status information of described RRU, and be saved in the variable corresponding with the community configured information of described RRU and status information.
10. processor according to claim 7, is characterized in that,
Described algorithm task kernel, also for when described Row control kernel is not survived, reports the warning information of described Row control kernel exception to described BBU;
Described Row control kernel, after also becoming survival for the startup that to reset because of software anomaly when it, reports the alarm clearance information of its exception to described BBU.
11. processors according to claim 7, is characterized in that,
Described Row control kernel, after also becoming survival for the startup that to reset because of software anomaly at it, detects the identity identification information of described RRU or the heartbeat message of described BBU;
If can't detect the identity identification information of described RRU or the heartbeat message of described BBU, then generate, preserve this reset alarm information of described RRU, horizontal reset of going forward side by side; Wherein, the heartbeat message of described BBU is described BBU after receiving the heartbeat message that described RRU sends, to the return information that described RRU sends;
And, after determining that the interface channel between described RRU and described BBU has been set up, report this reset alarm information of described RRU to described BBU, wherein, when described RRU sends heartbeat message and receives the heartbeat message of described BBU reply, the interface channel between described RRU and described BBU has been set up.
12. processors according to claim 11, is characterized in that,
Described algorithm task kernel, also for not surviving when described Row control kernel, and when the time that described BBU does not receive the heartbeat message that described RRU sends continuously is greater than the marginal time, resets to the overall hardware of the processor of described RRU;
Described overall hardware comprises micro-control unit and field programmable gate array.
CN201410515635.5A 2014-09-29 2014-09-29 The processor and processor reset method of a kind of RF remote equipment Active CN104281243B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410515635.5A CN104281243B (en) 2014-09-29 2014-09-29 The processor and processor reset method of a kind of RF remote equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410515635.5A CN104281243B (en) 2014-09-29 2014-09-29 The processor and processor reset method of a kind of RF remote equipment

Publications (2)

Publication Number Publication Date
CN104281243A true CN104281243A (en) 2015-01-14
CN104281243B CN104281243B (en) 2017-11-10

Family

ID=52256212

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410515635.5A Active CN104281243B (en) 2014-09-29 2014-09-29 The processor and processor reset method of a kind of RF remote equipment

Country Status (1)

Country Link
CN (1) CN104281243B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114518183A (en) * 2022-01-06 2022-05-20 北京全路通信信号研究设计院集团有限公司 Processor state non-contact monitoring method, module and system based on operating temperature

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101790709A (en) * 2007-08-27 2010-07-28 马维尔国际贸易有限公司 Dynamic core switches
CN102469474A (en) * 2010-11-15 2012-05-23 中兴通讯股份有限公司 Method and device for processing abnormal information of communication equipment
CN102855214A (en) * 2011-06-27 2013-01-02 上海华为技术有限公司 Method for implementing data consistency and multi-core system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101790709A (en) * 2007-08-27 2010-07-28 马维尔国际贸易有限公司 Dynamic core switches
CN102469474A (en) * 2010-11-15 2012-05-23 中兴通讯股份有限公司 Method and device for processing abnormal information of communication equipment
CN102855214A (en) * 2011-06-27 2013-01-02 上海华为技术有限公司 Method for implementing data consistency and multi-core system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114518183A (en) * 2022-01-06 2022-05-20 北京全路通信信号研究设计院集团有限公司 Processor state non-contact monitoring method, module and system based on operating temperature

Also Published As

Publication number Publication date
CN104281243B (en) 2017-11-10

Similar Documents

Publication Publication Date Title
US12114188B2 (en) Network connectivity performance determination on computing devices
CA2731915C (en) Method and system for security maintenance in a network
CN103092746B (en) The localization method of thread exception and system
CN109388210B (en) Distributed chassis, and management method and device of distributed chassis
EP2883377B1 (en) Self organizing network operation diagnosis function
WO2017206678A1 (en) Information acquisition method and device
CN111008026B (en) Cluster management method, device and system
US10999738B2 (en) Detection of internet-of-things devices in enterprise networks
US10623166B2 (en) Systems and methods for improved uptime for network devices
US10452461B2 (en) Discovering and safely transitioning transactors to run mode
US20240106699A1 (en) Active-standby switching processing method and system, and electronic apparatus and storage medium
CN103605592A (en) Mechanism of detecting malfunctions of distributed computer system
CN104281243A (en) Processor of radio-frequency remote equipment and processor resetting method
CN102646065B (en) Equipment power-on detection method and device with protection function
US20160198293A1 (en) Wireless device, wireless base station, and control method
US9565583B2 (en) Monitoring device and monitoring system
CN117271234A (en) Fault diagnosis method and device, storage medium and electronic device
US10674337B2 (en) Method and device for processing operation for device peripheral
US10523496B2 (en) Handling of performance degradation in a communications system
CN111324504A (en) Method and device for monitoring running state of power communication network
US8745436B2 (en) Information processing apparatus, information processing system, and control method therefor
US10225752B2 (en) First network node, method therein, computer program and computer-readable medium comprising the computer program for detecting outage of a radio cell
US20220330053A1 (en) Sleeping cell detection
KR20150128307A (en) Smart sensor for monitoring power transmission line and system using thereof
CN118689935A (en) Database switching method, device, storage medium and program product

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant