CN104253608A - Level switching circuit and voltage level switching method thereof - Google Patents

Level switching circuit and voltage level switching method thereof Download PDF

Info

Publication number
CN104253608A
CN104253608A CN201310263267.5A CN201310263267A CN104253608A CN 104253608 A CN104253608 A CN 104253608A CN 201310263267 A CN201310263267 A CN 201310263267A CN 104253608 A CN104253608 A CN 104253608A
Authority
CN
China
Prior art keywords
voltage
intermediate voltage
level
tertiary
transition period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201310263267.5A
Other languages
Chinese (zh)
Other versions
CN104253608B (en
Inventor
萧圣文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Novatek Microelectronics Corp
Original Assignee
Novatek Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Novatek Microelectronics Corp filed Critical Novatek Microelectronics Corp
Priority to CN201310263267.5A priority Critical patent/CN104253608B/en
Publication of CN104253608A publication Critical patent/CN104253608A/en
Application granted granted Critical
Publication of CN104253608B publication Critical patent/CN104253608B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

A level switching circuit comprises a first level shifter and a second level shifter. The first level shifter converts the first control voltage into the second control voltage during voltage switching, the second level shifter is coupled to the first level shifter, and the second level shifter switches the second control voltage into the third control voltage during voltage switching so as to control the next stage of circuit. The first level shifter is used for detecting voltage level of a power domain where operation of the third control voltage is located and generating a plurality of intermediate voltages according to detecting results. The second level shifter is used for generating the third control voltage according to the intermediate voltages. Further, a voltage level switching method is provided.

Description

Level shifting circuit and voltage level conversion method thereof
Technical field
The invention relates to a kind of level shifting circuit and voltage level conversion method thereof, and relate to a kind of level shifting circuit and the voltage level conversion method thereof with self-bias voltage control especially.
Background technology
Known level shifting circuit utilizes multistage level translator, and input signal is converted to negative power territory by positive territory (power domain), then, then will export the circuit controlled needed for next stage to.Positive territory is such as the power interval of positive operating voltage to earthed voltage herein, and negative power territory is such as the power interval of earthed voltage to negative operating voltage.But, known level shifting circuit operate in positive territory turn the application in negative power territory time, because the electronic component in level shifting circuit all has the withstand voltage restriction of operation, that is the difference of electronic component voltage bound of its power domain when operating must not be greater than specified magnitude of voltage, therefore must consider that outside is supplied in the quantity of level translator action required voltage during operation.Further, operating voltage, when switching on and shutting down program, correctly must export control signal, and guarantees not have vicious level export and cause being controlled circuit abnormal.In this instance, if the electronic component medium pressure element in level shifting circuit, it is withstand voltage, and restriction is about 6 volts, if high voltage device, it is withstand voltage, and restriction is about 12 volts.
According to above-mentioned concept, known level shifting circuit generally can be realized by beneath two kinds of modes in design.Wherein the practice uses a medium pressure element in level shifting circuit inside, and add multiple external voltages that external circuit provides.Wherein these external voltages comprise a higher negative voltage and a lower negative voltage.When switching on and shutting down program, the design of this two negative voltage need have certain sequencing, produces abnormal current to avoid the level of level translator output error to its next stage circuit.The another kind of practice additionally uses high voltage device to design level shifting circuit, but this kind of design needs use two kinds of elements, in addition to increasing cost, also can increase the time needed for processing procedure.
Summary of the invention
The invention provides a kind of level shifting circuit, there is the function of its operating voltage of self-dynamic conditioning and output voltage.
The invention provides a kind of voltage level conversion method, there is the self-operating voltage of dynamic conditioning level shifting circuit and the function of output voltage.
The invention provides a kind of level shifting circuit, comprise one first level shifter and a second electrical level shift unit.First level shifter in order to be converted to one second control voltage by one first control voltage during a voltage transitions.First control voltage is between one first voltage and one second voltage.Second control voltage is between one first intermediate voltage and one second intermediate voltage.Second electrical level shift unit is coupled to the first level shifter, in order to the second control voltage is converted to one the 3rd control voltage during voltage transitions, to control stage circuit.3rd control voltage is between the first intermediate voltage and a tertiary voltage.First level shifter detects tertiary voltage, and produces multiple intermediate voltage according to a testing result.Intermediate voltage comprises the first intermediate voltage, the second intermediate voltage and one the 3rd intermediate voltage.Second electrical level shift unit produces the 3rd control voltage according to intermediate voltage.
The invention provides a kind of voltage level conversion method, be suitable for a level shifting circuit.Voltage level conversion method comprises the steps.During a voltage transitions, one first control voltage is converted to one second control voltage.First control voltage is between one first voltage and one second voltage.Second control voltage is between one first intermediate voltage and one second intermediate voltage.During voltage transitions, the second control voltage is converted to one the 3rd control voltage, with the stage circuit once of control level change-over circuit.3rd control voltage is between the first intermediate voltage and a tertiary voltage.Before second control voltage being converted to the step of the 3rd control voltage, voltage level conversion method also comprises the steps.Detect tertiary voltage, and produce multiple intermediate voltage according to a testing result.Intermediate voltage comprises the first intermediate voltage, the second intermediate voltage and one the 3rd intermediate voltage.The step second control voltage being converted to the 3rd control voltage produces the 3rd control voltage according to intermediate voltage.
In an embodiment of the present invention, comprised for one first transition period during above-mentioned voltage transitions.In the first transition period, tertiary voltage is more than or equal to a critical level.
In an embodiment of the present invention, in the first transition period, the 3rd above-mentioned intermediate voltage remains unchanged in fact, and the first intermediate voltage remains unchanged in fact or rise gradually in response to tertiary voltage or decline gradually.Second intermediate voltage rises gradually in response to tertiary voltage or declines gradually.
In an embodiment of the present invention, in the first transition period, the first above-mentioned intermediate voltage is greater than the second intermediate voltage.Second intermediate voltage is greater than tertiary voltage.
In an embodiment of the present invention, comprised for one second transition period during above-mentioned voltage transitions.In the second transition period, tertiary voltage is less than critical level and is greater than a rated voltage level.
In an embodiment of the present invention, in the second transition period, the 3rd above-mentioned intermediate voltage remains unchanged in fact.First intermediate voltage and the second intermediate voltage rise gradually in response to tertiary voltage or decline gradually.
In an embodiment of the present invention, in the second transition period, the 3rd above-mentioned intermediate voltage is greater than the first intermediate voltage.First intermediate voltage is greater than the second intermediate voltage.Second intermediate voltage is greater than tertiary voltage.
In an embodiment of the present invention, comprised for one the 3rd transition period during above-mentioned voltage transitions.In the 3rd transition period, tertiary voltage is converted to a rated voltage level.
In an embodiment of the present invention, in the 3rd transition period, the first above-mentioned intermediate voltage, the second intermediate voltage and the 3rd intermediate voltage remain unchanged in fact.
In an embodiment of the present invention, in the 3rd transition period, the 3rd above-mentioned intermediate voltage is greater than the first intermediate voltage.First intermediate voltage is greater than the second intermediate voltage.Second intermediate voltage is greater than tertiary voltage.
In an embodiment of the present invention, the 3rd above-mentioned intermediate voltage and a difference of the second intermediate voltage are less than the withstand voltage that level shifting circuit can bear.One difference of the first intermediate voltage and tertiary voltage is less than the withstand voltage that level shifting circuit can bear.
In an embodiment of the present invention, the first above-mentioned level shifter comprises one first voltage generation circuit, a voltage detecting circuit and one second voltage generation circuit.First voltage generation circuit is in order to produce the 3rd intermediate voltage according to the first voltage and the second voltage.Voltage detecting circuit is coupled to the first voltage generation circuit, in order to detect tertiary voltage to produce testing result.Voltage detecting circuit works in coordination with the first voltage generation circuit, produces the first intermediate voltage according to the 3rd intermediate voltage and testing result.Second voltage generation circuit is coupled to the first voltage generation circuit, in order to produce the second intermediate voltage according to the first intermediate voltage and tertiary voltage.
In an embodiment of the present invention, the first above-mentioned voltage is greater than the second voltage, and the second voltage is greater than tertiary voltage.
Based on above-mentioned, in exemplary embodiment of the present invention, first level shifter in order to detect tertiary voltage, and can produce multiple intermediate voltage according to testing result, and therefore its level shifting circuit has the function of its operating voltage of self-dynamic conditioning and output voltage.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.
Accompanying drawing explanation
Fig. 1 illustrates the schematic block diagram of the level shifting circuit of the present invention one correlation technique.
Fig. 2 illustrates the summary oscillogram of each voltage signal in the level shifting circuit of Fig. 1.
Fig. 3 illustrates the schematic block diagram of the level shifting circuit of one embodiment of the invention.
Fig. 4 illustrates the summary oscillogram of each voltage signal in the level shifting circuit of Fig. 3.
Fig. 5 illustrates the partial circuit figure of the first level shifter of the embodiment of Fig. 3.
Fig. 6 illustrates the flow chart of steps of the voltage level conversion method of one embodiment of the invention.
[label declaration]
100,300: level shifting circuit 110,310: the first level shifter
120,320: second electrical level shift unit 200,400: Digital Logical Circuits
312: the first voltage generation circuit 312a: the first buffers
312b: the second buffer 314: voltage detecting circuit
314a, 314b, 314c, 314d: current mirror 316: the second voltage generation circuit
316a: the three buffer Vctrl: the first control signal
Vctrl1: the second control signal Vctrl2: the three control signal
VSP: the first voltage GND: the second voltage
VSN: tertiary voltage VSP2: the first intermediate voltage
VSN1: the second intermediate voltage VSP1: the three intermediate voltage
V_max: the withstand voltage upper limit V1 of medium pressure element, V2: target voltage
VTH: critical level VRA: rated voltage level
VREF_VSP1: the first reference voltage VREF_VSP2: the second reference voltage
Istart: electric current R1, R2, R3, R4: resistance
M1A, M1B, M2A, M2B, M3A, M3B, M4A, M4B, M5, M6: transistor
P1: boot program P2: normal operating procedure
P3: shutdown programm T1, T5: the first transition period
T2, T4: the second transition period transition period T3: the three
S600, S610, S620: the step of voltage level conversion method
Embodiment
In exemplary embodiment of the present invention, level shifting circuit comprises voltage detecting circuit, in order to detect a voltage level of the power domain at its output signal operation place.Level shifting circuit utilizes voltage detecting circuit, dynamically according to the voltage level detected, automatically adjust its operating voltage needed for level translator at different levels and the voltage level of output signal thereof, thus reach the lower withstand voltage element of use to realize the function of voltage level conversion.In the present invention, what voltage detecting circuit detected illustratively illustrates with the minimum negative voltage level in the negative power territory at output signal operation place liking, but the present invention is not limited to this.For more clearly understanding the present invention, below will coordinate graphic, describing in detail with at least one exemplary embodiment.
Fig. 1 illustrates the schematic block diagram of the level shifting circuit of the present invention one correlation technique.Fig. 2 illustrates the summary oscillogram of each voltage signal in the level shifting circuit of Fig. 1.Please refer to Fig. 1 and Fig. 2, the level shifting circuit 100 of this example comprises two level conversion levels, is respectively the first level shifter 110 and second electrical level shift unit 120.First level shifter 110 receives the first control signal Vctrl, and carries out level adjustment to the first control signal Vctrl, to export the second control signal Vctrl1 accordingly.Then, second electrical level shift unit 120 receives the second control signal Vctrl1, and adjusts the level of the second control signal Vctrl1, to export the 3rd control signal Vctrl2 accordingly to its next stage circuit 200.Next stage circuit 200 is such as the Digital Logical Circuits comprising medium pressure element.In this instance, the first control signal Vctrl as input signal operates in the positive territory be situated between the first voltage VSP and the second voltage GND, and the 3rd control signal Vctrl2 as output signal operates in the negative power territory be situated between the second voltage GND and tertiary voltage VSN.
Compared to the embodiment of the present invention, in this correlation technique, the 3rd intermediate voltage VSP1 is the positive voltage of level between the first voltage VSP and the second voltage GND, and it can be produced by the first voltage VSP.Second intermediate voltage VSN1 is the negative voltage being less than the second voltage GND.At boot program P1, normal operating procedure P2 and shutdown programm P3, level shifting circuit 100 must guarantee that the operating voltage of the first level shifter 110 and second electrical level shift unit 120 inside all can not exceed the withstand voltage upper limit V_max of medium pressure element.Operating voltage herein comprises the difference VSP1-VSN1 of the 3rd intermediate voltage VSP1 and the second intermediate voltage VSN1, the difference GND-VSN1 of the second voltage GND and the second intermediate voltage VSN1, and the difference GND-VSN of the second voltage GND and tertiary voltage VSN.Therefore, at boot program P1, the second intermediate voltage VSN1 must first arrive target voltage V1 before tertiary voltage VSN arrives its target voltage V2.And, at shutdown programm P3, second intermediate voltage VSN1 must arrive target voltage again after tertiary voltage VSN arrives its target voltage, to guarantee that the second control signal Vctrl1 can normally control second electrical level shift unit 120, thus prevent the signal of mistake from inputing to second electrical level shift unit 120 and causing second electrical level shift unit 120 to have abnormal current to produce.At shutdown programm P3, the target voltage of the second intermediate voltage VSN1 and tertiary voltage VSN is all 0 volt.
In this instance, the external circuit (not illustrating) of level shifting circuit 100 must provide the first voltage VSP, the 3rd intermediate voltage VSP1 and tertiary voltage VSN.Further, the second intermediate voltage VSN1 is the negative voltage high compared with tertiary voltage VSN.As previously mentioned, at switching on and shutting down program P1, P3, the second intermediate voltage VSN1 and tertiary voltage VSN has needed certain sequencing in sequential, produces abnormal current to avoid the level of level translator output error to its next stage circuit.
Fig. 3 illustrates the schematic block diagram of the level shifting circuit of one embodiment of the invention.Fig. 4 illustrates the summary oscillogram of each voltage signal in the level shifting circuit of Fig. 3.Please refer to Fig. 3 and Fig. 4, the level shifting circuit 300 of the present embodiment comprises one first level shifter 310 and a second electrical level shift unit 320.First level shifter 310 in order to be converted to one second control voltage Vctrl1 by one first control voltage Vctrl during a voltage transitions.At this, first voltage VSP and the second voltage GND is in order to biasing first level shift unit 310, it is made to operate in positive territory, namely, between the first voltage VSP and the second voltage GND, the input signal Vctrl that therefore the first level shifter 310 receives operates between the first voltage VSP and the second voltage GND.Meanwhile, during voltage transitions, the first level shifter 310 can detect the level change of tertiary voltage VSN, and produces multiple intermediate voltage according to testing result.Intermediate voltage herein comprises the first intermediate voltage VSP2, the second intermediate voltage VSN1 and the 3rd intermediate voltage VSP1, as shown in Figure 4.
In the present embodiment, according to the testing result of the first level shifter 310, the first intermediate voltage VSP2 and the second intermediate voltage VSN1 can adjust in response to the change of tertiary voltage VSN, with the function of teaching display stand dynamic conditioning operating voltage and output voltage.In addition, in the present embodiment, by the impact of the first intermediate voltage VSP2 and the second intermediate voltage VSN1 bias voltage, the second control voltage Vctrl1 that the first level shifter 310 exports operates between the first intermediate voltage VSP2 and the second intermediate voltage VSN1.
In addition, comprise during the voltage transitions of the present embodiment the first transition period T1, T5, second the transition period T2, T4 and the 3rd transition period T3, as shown in Figure 4.Compared to the relevant example disclosed by Fig. 1, the boot program P1 of the present embodiment comprises the first transition period T1 and the second transition period T2, normal operating procedure P2 comprise the 3rd transition period T3, and shutdown programm P3 comprises the second transition period T4 and the first transition period T5.During voltage transitions, level relationship between first intermediate voltage VSP2, the second intermediate voltage VSN1 and the 3rd intermediate voltage VSP1 three is that the 3rd intermediate voltage VSP1 is greater than the first intermediate voltage VSP2 in principle, first intermediate voltage VSP2 is greater than the second intermediate voltage VSN1, to guarantee that the operating voltage of the first level shifter 310 and second electrical level shift unit 320 inside all can not exceed the withstand voltage upper limit V_max of medium pressure element.Only first the transition period T1, T5, the 3rd intermediate voltage VSP1 may equal in fact the first intermediate voltage VSP2.
Then, second electrical level shift unit 320 is coupled to the first level shifter 310, in order to the second control voltage Vctrl1 is converted to one the 3rd control voltage Vctrl2 during voltage transitions, to control next stage circuit 400.Meanwhile, the intermediate voltage that second electrical level shift unit 320 also can produce according to the first level shifter 310 produces the 3rd control voltage Vctrl2.In this instance, first intermediate voltage VSP2 and tertiary voltage VSN is in order to biasing second level shift unit 320, make it operate in negative power territory at the 3rd transition period T3, the 3rd control voltage Vctrl2 that therefore second electrical level shift unit 320 exports is between the first intermediate voltage VSP2 and tertiary voltage VSN.
Furthermore, Fig. 5 illustrates the partial circuit figure of the first level shifter of the embodiment of Fig. 3.Please refer to Fig. 3 to Fig. 5, first level shifter 310 of the present embodiment comprises one first voltage generation circuit 312, voltage detecting circuit 314 and one second voltage generation circuit 316.First voltage generation circuit 312 is in order to produce the 3rd intermediate voltage VSP1 according to the first voltage VSP and the second voltage GND.Voltage detecting circuit 314 is coupled to the first voltage generation circuit 312, in order to detect tertiary voltage VSN to produce testing result.In this instance, collaborative first voltage generation circuit 312 of voltage detecting circuit 314 works, and both produce the first intermediate voltage VSP2 according to the 3rd intermediate voltage VSP1 and testing result.Second voltage generation circuit 316 is coupled to the first voltage generation circuit 312, in order to produce the second intermediate voltage VSN1 according to the first intermediate voltage VSP2 and tertiary voltage VSP1.
Specifically, first voltage generation circuit 312 of the present embodiment comprises the first buffer 312a and the second buffer 312b.First buffer 312a implements with the configuration of voltage follower device (voltage follower), and it is biased between the first voltage VSP and the second voltage GND.The input of the first buffer 312a receives the first reference voltage VREF_VSP1, and output exports one end of the 3rd intermediate voltage VSP1 to resistance R1.In addition, the second buffer 312b of the present embodiment implements with the configuration of voltage follower device, and is biased between the first voltage VSP and the second voltage GND.The input of the second buffer 312b is coupled to the other end of resistance R1, and to receive the second reference voltage VREF_VSP2, and the second buffer 312b exports the first intermediate voltage VSP2 to the second voltage generation circuit 316 at its output accordingly.
In the present embodiment, voltage detecting circuit 314 comprises multiple current mirror 314a to 314d and resistance R2, R3 of repeatedly meeting (cascode).Testing result in order to detect the level change of tertiary voltage VSN, and shows with the change of electric current I start by current mirror 314a to 314d.Therefore, level in response to tertiary voltage VSN changes, voltage detecting circuit 314 can draw electric current I start from the first buffer 312a, thus collaborative first buffer 312a and resistance R1 produces the second reference voltage VREF_VSP2 at the input of the second buffer 312b.
It is worth mentioning that, first voltage generation circuit 312 of the present embodiment comprises two buffers to illustrate, but the present invention is not limited to this.In other embodiments, first voltage generation circuit 312 also can not configure the second buffer 312b, and produce the first intermediate voltage VSP2 by the collaborative first buffer 312a and resistance R1 of voltage detecting circuit 314, and directly export the first intermediate voltage VSP2 to the second voltage generation circuit 316, do not need to be passed to the second voltage generation circuit 316 again via the second buffer 312b
In addition, in the present embodiment, the second voltage generation circuit 316 comprises the 3rd buffer 316a, transistor M5, M6 of repeatedly connecing and resistance R4.3rd buffer 316a implements with the configuration of voltage follower device, and it is biased between the first intermediate voltage VSP2 and tertiary voltage VSN.The input of the 3rd buffer 316a receives the 3rd reference voltage VREF_VSN1, and output exports the second intermediate voltage VSN1 to next stage circuit.One end of transistor M5, M6 of repeatedly connecing is coupled to the bias voltage path of the 3rd buffer 316a, and the other end is coupled to the input of the 3rd buffer 316a.One end of resistance R4 is coupled to the input of the 3rd buffer 316a, and the other end is coupled to tertiary voltage VSN.
Then, first level shifter 310 of beneath explanation the present embodiment is in the mode of operation of boot program, normal operating procedure and shutdown programm, and each voltage signal is in the change situation of distinct program, please continue to refer to Fig. 3 to Fig. 5.
Before level shifting circuit 300 enters boot program, tertiary voltage VSN is 0 volt, now the first intermediate voltage VSP2 equals the second reference voltage VREF_VSP2, and the second reference voltage VREF_VSP2 equals the 3rd intermediate voltage VSP1, i.e. VSP2=VREF_VSP2=VSP1.And, second intermediate voltage VSN1 equals the 3rd reference voltage VREF_VSN1,3rd reference voltage VREF_VSN1 equals the first intermediate voltage VSP2 and deducts N1 cut-in voltage Vov (turn on voltage), i.e. VSN1=VREF_VSN1=VSP2-N1 × Vov.In the enforcement aspect of Fig. 5, Vov such as refers to the cut-in voltage of transistor M5, M6, and N1=2.
Then, when sequential enters the first transition period T1 of boot program, tertiary voltage VSN starts to decline, and only during this period, tertiary voltage VSN is still more than or equal to critical level VTH.Now, the second intermediate voltage VSN1 declines gradually in response to tertiary voltage VSN, and the 3rd intermediate voltage VSP1 remains unchanged in fact during this period.In addition, the first intermediate voltage VSP2 remains unchanged in fact or declines gradually in response to tertiary voltage VSN.In the present embodiment, the first intermediate voltage VSP2 remains unchanged and equals the 3rd intermediate voltage VSP1, but in other embodiments, the first intermediate voltage VSP2 can be designed as unequal in the 3rd intermediate voltage VSP1.Least for guaranteeing that the operating voltage of level shifting circuit 300 inside can not exceed the withstand voltage upper limit V_max of medium pressure element, at the first transition period T1, first intermediate voltage VSP2 is greater than the second intermediate voltage VSN1, and the second intermediate voltage VSN1 is greater than tertiary voltage VSN.
Afterwards, when sequential enters the second transition period T2 of boot program, tertiary voltage VSN is less than critical level VTH and is greater than rated voltage level VRA.Critical level VTH herein, with regard to the enforcement aspect of Fig. 5, its value is-N2 × Vov, and wherein Vov such as refers to the cut-in voltage of the transistor of each current mirror, and the N2=4 of this example.At the second transition period T2, when tertiary voltage VSN is less than critical level VTH, voltage detecting circuit 314 can start to draw electric current I start from the first buffer 312a, along with tertiary voltage VSN continues to decline toward rated voltage level VRA, first intermediate voltage VSP2 and the second intermediate voltage VSN1 can decline gradually in response to tertiary voltage VSN, wherein the first intermediate voltage VSP2 declines gradually from the 3rd intermediate voltage VSP1, until by current mirror 314a to 314d strangulation at the second voltage GND.Least for guaranteeing in level shifting circuit 300, first level shifter 310 and the operating voltage of second electrical level shift unit 320 inside can not exceed the withstand voltage upper limit V_max of medium pressure element, at the second transition period T2,3rd intermediate voltage VSP1 is greater than the first intermediate voltage VSP2, first intermediate voltage VSP2 is greater than the second intermediate voltage VSN1, and the second intermediate voltage VSN1 is greater than tertiary voltage VSN.In addition, at the second transition period T2, the 3rd intermediate voltage VSP1 remains unchanged in fact.
Then, level shifting circuit 300 enters normal operating procedure.At the 3rd transition period T3, tertiary voltage VSN is converted to rated voltage level VRA.At the 3rd transition period T3, the first intermediate voltage VSP2, the second intermediate voltage VSN1 and the 3rd intermediate voltage VSP1 remain unchanged in fact.Least for guaranteeing that the operating voltage of level shifting circuit 300 inside can not exceed the withstand voltage upper limit V_max of medium pressure element, at the 3rd transition period T3,3rd intermediate voltage VSP1 is greater than the first intermediate voltage VSP2, first intermediate voltage VSP2 is greater than the second intermediate voltage VSN1, and the second intermediate voltage VSN1 is greater than tertiary voltage VSN.
Then, level shifting circuit 300 enters shutdown programm, and tertiary voltage VSN can rise to the second voltage GND gradually from rated voltage level VRA.At the second transition period T4 of shutdown programm, tertiary voltage VSN is less than critical level VTH and is greater than rated voltage level.At the second transition period T4, the 3rd intermediate voltage VSP1 remains unchanged in fact.First intermediate voltage VSP2 and the second intermediate voltage VSN1 rises gradually in response to tertiary voltage VSN.Similarly, least for guaranteeing that the operating voltage of level shifting circuit 300 inside can not exceed the withstand voltage upper limit V_max of medium pressure element, at the second transition period T4,3rd intermediate voltage VSP1 is greater than the first intermediate voltage VSP2, first intermediate voltage VSP2 is greater than the second intermediate voltage VSN1, and the second intermediate voltage VSN1 is greater than tertiary voltage VSN.
At the first transition period T5 of shutdown programm, tertiary voltage VSN is more than or equal to critical level VTH.At the first transition period T5, the 3rd intermediate voltage VSP1 remains unchanged in fact, and the first intermediate voltage VSP2 remains unchanged in fact or rises gradually in response to tertiary voltage VSN.Second intermediate voltage VSN1 rises gradually in response to tertiary voltage VSN.In the present embodiment, the first intermediate voltage VSP2 remains unchanged and equals the 3rd intermediate voltage VSP1, but in other embodiments, the first intermediate voltage VSP2 can be designed as unequal in the 3rd intermediate voltage VSP1.Similarly, least for guaranteeing that the operating voltage of level shifting circuit 300 inside can not exceed the withstand voltage upper limit V_max of medium pressure element, at the first transition period T5, the 3rd intermediate voltage VSP1 is more than or equal to the first intermediate voltage VSP2.First intermediate voltage VSP2 is greater than the second intermediate voltage VSN1.Second intermediate voltage VSN1 is greater than tertiary voltage VSN.
It should be noted, in the present embodiment, first intermediate voltage VSP2 and the second intermediate voltage VSN1 can rise gradually along with the change of tertiary voltage VSN or decline gradually, it means the first intermediate voltage VSP2 and the second intermediate voltage VSN1 and rises gradually according to fixing slope or drop to predetermined voltage level gradually, further, each voltage during difference, rise or decline the slope of following can be identical or not identical.In addition, although first level shifter 310 of the present embodiment coordinates the circuit framework disclosed by Fig. 5 to illustrate in the mode of operation of boot program, normal operating procedure and shutdown programm, the present invention is not limited to this.Stated by the schematic block diagram disclosed by Fig. 3, also can obtain enough teachings, suggestion and implementation, therefore repeat no more.
Fig. 6 illustrates the flow chart of steps of the voltage level conversion method of one embodiment of the invention.Referring to Fig. 3 to Fig. 6, the voltage level conversion method of the present embodiment is at least applicable to the level shifting circuit disclosed by above-described embodiment, comprises the steps.First, in step S600, during voltage transitions, the first level shifter 310 detects tertiary voltage VSN, and produces multiple intermediate voltage according to testing result.Intermediate voltage herein comprises the first intermediate voltage VSP2, the second intermediate voltage VSN1 and the 3rd intermediate voltage VSP1.Then, in step S610, the first control voltage Vctrl, according to the first voltage VSP, the second voltage GND, the second intermediate voltage VSN1 and the 3rd intermediate voltage VSP1, is converted to the second control voltage Vctrl1 by the first level shifter 310.Afterwards, in step S620, the second control voltage Vctrl1, according to the first intermediate voltage VSP2 and tertiary voltage VSN, is converted to the 3rd control voltage Vctrl2 by second electrical level shift unit 320, with the next stage circuit 400 of control level change-over circuit 300.
In addition, the voltage level conversion method of embodiments of the invention can obtain enough teachings, suggestion and implementation by the describing of Fig. 3 to Fig. 5 embodiment, and therefore repeats no more.
In sum, in exemplary embodiment of the present invention, the voltage detecting circuit of level shifting circuit is in order to detect the voltage level of the power domain at its output signal operation place.Voltage detecting circuit dynamically according to the voltage level detected, automatically adjusts its operating voltage needed for level translator at different levels and the voltage level of output signal, thus reaches the lower withstand voltage element of use to realize the function of voltage level conversion.
Although the present invention discloses as above with embodiment; so itself and be not used to limit the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the appended right person of defining.

Claims (19)

1. a level shifting circuit, comprising:
One first level shifter, in order to one first control voltage is converted to one second control voltage during a voltage transitions, wherein this first control voltage is between one first voltage and one second voltage, and this second control voltage is between one first intermediate voltage and one second intermediate voltage; And
One second electrical level shift unit, be coupled to this first level shifter, in order to this second control voltage is converted to one the 3rd control voltage during this voltage transitions, to control stage circuit, wherein the 3rd control voltage is between this first intermediate voltage and a tertiary voltage
Wherein this first level shifter detects this tertiary voltage, and produce multiple intermediate voltage according to a testing result, the plurality of intermediate voltage comprises this first intermediate voltage, this second intermediate voltage and one the 3rd intermediate voltage, and this second electrical level shift unit produces the 3rd control voltage according to the plurality of intermediate voltage.
2. level shifting circuit according to claim 1, wherein comprised for one first transition period during this voltage transitions, in this first transition period, this tertiary voltage is more than or equal to a critical level.
3. level shifting circuit according to claim 2, wherein in this first transition period, 3rd intermediate voltage remains unchanged in fact, this first intermediate voltage remains unchanged in fact or rises gradually in response to this tertiary voltage or decline gradually, and this second intermediate voltage rises gradually in response to this tertiary voltage or declines gradually.
4. level shifting circuit according to claim 2, wherein in this first transition period, this first intermediate voltage is greater than this second intermediate voltage, and this second intermediate voltage is greater than this tertiary voltage.
5. level shifting circuit according to claim 1, wherein comprised for one second transition period during this voltage transitions, in this second transition period, this tertiary voltage is less than this critical level and is greater than a rated voltage level.
6. level shifting circuit according to claim 5, wherein in this second transition period, the 3rd intermediate voltage remains unchanged in fact, and this first intermediate voltage and the second intermediate voltage rise gradually in response to this tertiary voltage or decline gradually.
7. level shifting circuit according to claim 5, wherein in this second transition period, the 3rd intermediate voltage is greater than this first intermediate voltage, and this first intermediate voltage is greater than this second intermediate voltage, and this second intermediate voltage is greater than this tertiary voltage.
8. level shifting circuit according to claim 1, wherein comprised for one the 3rd transition period during this voltage transitions, in the 3rd transition period, this tertiary voltage is converted to a rated voltage level.
9. level shifting circuit according to claim 8, wherein in the 3rd transition period, this first intermediate voltage, the second intermediate voltage and the 3rd intermediate voltage remain unchanged in fact.
10. level shifting circuit according to claim 8, wherein in the 3rd transition period, the 3rd intermediate voltage is greater than this first intermediate voltage, and this first intermediate voltage is greater than this second intermediate voltage, and this second intermediate voltage is greater than this tertiary voltage.
11. level shifting circuits according to claim 1, wherein a difference of the 3rd intermediate voltage and this second intermediate voltage is less than the withstand voltage that this level shifting circuit can bear, and a difference of this first intermediate voltage and this tertiary voltage is less than this withstand voltage that this level shifting circuit can bear.
12. level shifting circuits according to claim 1, wherein the first level shifter comprises:
One first voltage generation circuit, in order to produce the 3rd intermediate voltage according to this first voltage and this second voltage;
One voltage detecting circuit, be coupled to this first voltage generation circuit, in order to detect this tertiary voltage to produce this testing result, wherein this voltage detecting circuit works in coordination with this first voltage generation circuit, produces this first intermediate voltage according to the 3rd intermediate voltage and this testing result; And
One second voltage generation circuit, is coupled to this first voltage generation circuit, in order to produce this second intermediate voltage according to this first intermediate voltage and this tertiary voltage.
13. level shifting circuits according to claim 1, wherein this first voltage is greater than this second voltage, and this second voltage is greater than this tertiary voltage.
14. 1 kinds of voltage level conversion methods, for a level shifting circuit, the method comprises:
During a voltage transitions, one first control voltage is converted to one second control voltage, wherein this first control voltage is between one first voltage and one second voltage, and this second control voltage is between one first intermediate voltage and one second intermediate voltage; And
During this voltage transitions, this second control voltage is converted to one the 3rd control voltage, to control the stage circuit of this level shifting circuit, wherein the 3rd control voltage is between this first intermediate voltage and a tertiary voltage,
Before wherein this second control voltage being converted to the step of the 3rd control voltage, the method also comprises:
Detect this tertiary voltage, and produce multiple intermediate voltage according to a testing result, the plurality of intermediate voltage comprises this first intermediate voltage, this second intermediate voltage and one the 3rd intermediate voltage; And
The step this second control voltage being converted to the 3rd control voltage produces the 3rd control voltage according to the plurality of intermediate voltage.
15. voltage level conversion methods according to claim 14, wherein comprised for one first transition period during this voltage transitions, in this first transition period, this tertiary voltage is more than or equal to a critical level, 3rd intermediate voltage remains unchanged in fact, and this first intermediate voltage remains unchanged in fact or rises gradually in response to this tertiary voltage or decline gradually, and this second intermediate voltage rises gradually in response to this tertiary voltage or declines gradually, and this first intermediate voltage is greater than this second intermediate voltage, and this second intermediate voltage is greater than this tertiary voltage.
16. voltage level conversion methods according to claim 14, wherein comprised for one second transition period during this voltage transitions, in this second transition period, this tertiary voltage is less than this critical level and is greater than a rated voltage level, and the 3rd intermediate voltage remain unchanged in fact, and this first intermediate voltage and the second intermediate voltage rise gradually in response to this tertiary voltage or decline gradually, and the 3rd intermediate voltage be greater than this first intermediate voltage, this first intermediate voltage is greater than this second intermediate voltage, and this second intermediate voltage is greater than this tertiary voltage.
17. voltage level conversion methods according to claim 14, wherein comprised for one the 3rd transition period during this voltage transitions, in the 3rd transition period, this tertiary voltage is converted to a rated voltage level, and this first intermediate voltage, the second intermediate voltage and the 3rd intermediate voltage remain unchanged in fact, and the 3rd intermediate voltage be greater than this first intermediate voltage, this first intermediate voltage is greater than this second intermediate voltage, and this second intermediate voltage is greater than this tertiary voltage.
18. voltage level conversion methods according to claim 14, wherein a difference of the 3rd intermediate voltage and this second intermediate voltage is less than the withstand voltage that this level shifting circuit can bear, and a difference of this first intermediate voltage and this tertiary voltage is less than this withstand voltage that this level shifting circuit can bear.
19. voltage level conversion methods according to claim 14, wherein this first voltage is greater than this second voltage, and this second voltage is greater than this tertiary voltage.
CN201310263267.5A 2013-06-27 2013-06-27 Level shifting circuit and its voltage level conversion method Active CN104253608B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310263267.5A CN104253608B (en) 2013-06-27 2013-06-27 Level shifting circuit and its voltage level conversion method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310263267.5A CN104253608B (en) 2013-06-27 2013-06-27 Level shifting circuit and its voltage level conversion method

Publications (2)

Publication Number Publication Date
CN104253608A true CN104253608A (en) 2014-12-31
CN104253608B CN104253608B (en) 2017-05-31

Family

ID=52188205

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310263267.5A Active CN104253608B (en) 2013-06-27 2013-06-27 Level shifting circuit and its voltage level conversion method

Country Status (1)

Country Link
CN (1) CN104253608B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107017875A (en) * 2015-11-26 2017-08-04 拉碧斯半导体株式会社 Level shift circuit and display driver

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5917358A (en) * 1997-12-09 1999-06-29 Motorola, Inc. Method and output buffer with programmable bias to accommodate multiple supply voltages
CN1440120A (en) * 2002-02-20 2003-09-03 三菱电机株式会社 Driving circuit with low current loss
US20080048719A1 (en) * 2006-08-24 2008-02-28 Fujitsu Limited Level shift circuit
CN101504867A (en) * 2008-02-06 2009-08-12 恩益禧电子股份有限公司 Level shift circuit, and driver and display system using the same
CN102957419A (en) * 2011-08-19 2013-03-06 德克萨斯仪器股份有限公司 Radiation-tolerant level shifting

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5917358A (en) * 1997-12-09 1999-06-29 Motorola, Inc. Method and output buffer with programmable bias to accommodate multiple supply voltages
CN1440120A (en) * 2002-02-20 2003-09-03 三菱电机株式会社 Driving circuit with low current loss
US20080048719A1 (en) * 2006-08-24 2008-02-28 Fujitsu Limited Level shift circuit
CN101504867A (en) * 2008-02-06 2009-08-12 恩益禧电子股份有限公司 Level shift circuit, and driver and display system using the same
CN102957419A (en) * 2011-08-19 2013-03-06 德克萨斯仪器股份有限公司 Radiation-tolerant level shifting

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107017875A (en) * 2015-11-26 2017-08-04 拉碧斯半导体株式会社 Level shift circuit and display driver
CN107017875B (en) * 2015-11-26 2022-10-14 拉碧斯半导体株式会社 Level shift circuit and display driver

Also Published As

Publication number Publication date
CN104253608B (en) 2017-05-31

Similar Documents

Publication Publication Date Title
JP4558701B2 (en) Voltage buffer and voltage buffer source driver
JP5225876B2 (en) Power-on reset circuit
US20080088341A1 (en) Level shifter circuit
KR20190009019A (en) Stage Circuit and Scan Driver Using The Same
JP6344956B2 (en) Power circuit
US10355477B2 (en) Digital signal transfer between multiple voltage domains
JP2007288612A (en) Apparatus, system and method for data communication
US10365306B2 (en) Detection circuit
US10972102B2 (en) Interface circuit
TWI527374B (en) Level shifter circuit and method for shifting voltages thereof
CN104253608A (en) Level switching circuit and voltage level switching method thereof
US20090167359A1 (en) Current mode logic circuit and control apparatus therefor
JP4393351B2 (en) Data communication apparatus, data communication system, and data communication method
JP2830799B2 (en) Semiconductor integrated circuit device
CN103856207A (en) Electrical level switching circuit and electrical level switching method
US6621322B2 (en) Voltage generating circuit, level shift circuit and semiconductor device
US20060170481A1 (en) Low-swing level shifter
CN110415750B (en) Shift register
JP5687091B2 (en) Power supply voltage detection circuit
CN102478872A (en) Electronic device and method
US7075833B2 (en) Circuit for detecting negative word line voltage
US20230344430A1 (en) Circuit, method and system for automatic level switching
JP4269008B2 (en) Power supply circuit, semiconductor integrated circuit
CN112737565A (en) Interface circuit and chip
US20090141534A1 (en) Detection apparatus and method for sequentially programming memory

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant