CN104243243A - Method for generating protocol testing sequence - Google Patents

Method for generating protocol testing sequence Download PDF

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CN104243243A
CN104243243A CN201410542685.2A CN201410542685A CN104243243A CN 104243243 A CN104243243 A CN 104243243A CN 201410542685 A CN201410542685 A CN 201410542685A CN 104243243 A CN104243243 A CN 104243243A
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state machine
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stream
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CN104243243B (en
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王之梁
姚姜源
施新刚
尹霞
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Tsinghua University
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Abstract

The invention discloses a method for generating a protocol testing sequence. The method comprises the following steps: building a data component state machine corresponding to a protocol specification and expanding a streamline expanding finite state machine model of signal aggregation by aiming at the protocol specification of network equipment to be tested; extracting an abstract component data map in accordance with the streamline expanding finite state machine model, wherein the abstract component data map comprises a peak for expressing the data component, a directed edge for expressing the signal aggregation, an inlet point and an outlet point of the streamline expanding finite state machine model; covering all data paths between the inlet point and the outlet point of the streamline expanding finite state machine model; and traversing all data paths to respectively generate the test sequence for visiting all data components in the data paths. According to the method provided by the invention, a network protocol testing can be simplified, and a state exploding problem can be slowed down.

Description

A kind of method for generating protocol test sequence
Technical field
The present invention relates to network protocol testing technical field, specifically, relating to a kind of method for generating protocol test sequence based on streamline extended finite state machine.
Background technology
Protocol test technology ensures that network communication protocol correctly realizes and the correct important means interconnected between the different network equipments.Uniformity test is basic protocol testing method, and its target is whether detection protocol realization is consistent with protocol specification.
Self-adaptive based on formalization method is the major issue in this field, and its target is the formalized model from protocol specification, generates the test set (or cycle tests) being used for test activity.In the Self-adaptive technology that great majority have proposed, its basic thought is system system under test (SUT) (System Under Test is called for short SUT) being modeled as a finite state machine or extended finite state machine, and then generates cycle tests.
Only consider single process model situation based on the method for creating test sequence of extended finite state machine in prior art, the streamline situation with multiple process that is mutually related is not related to.The latter can only by the various combinations of exhaustive multiple process, and set up built-up pattern respectively to various combination and solve, and the scale of modeling is difficult to accept, and causes obstacle to follow-up Self-adaptive.
Summary of the invention
One of technical problem solved by the invention to be in prior art based on the method for creating test sequence of extended finite state machine for the streamline situation with multiple process that is mutually related, exist and be confined to the combination of exhaustive process, combination for various process is carried out modeling and causes modeling in large scale, is unfavorable for the defect of protocol test.
The invention provides a kind of method for generating protocol test sequence, comprising the following steps:
Protocol specification for the network equipment to be tested builds the streamline extended finite state machine model comprising the data package state machine corresponding with described protocol specification and channel set;
According to described streamline extended finite state machine model extraction abstract component datagram, described abstract component datagram comprises the summit representing described data package, represents the directed edge of described channel set and the entrance of described streamline extended finite state machine model and exit point;
Generate based on abstract component datagram and cover all directed edges, be in all data paths between the entrance of described streamline extended finite state machine model and exit point;
Traversal full data path generates the cycle tests of total data assembly in the described data path of access respectively.
According to one embodiment of present invention, described data package state machine is expressed as the array of the multiple parallel protocol process of data of description assembly, and this array comprises the state set parameter of data package, input parameter, output parameter and status change lumped parameter.
According to one embodiment of present invention, described streamline extended finite state machine model comprises the shared variable representing and flow table cache in network under test switch further.
According to one embodiment of present invention, describedly to comprise according to described streamline extended finite state machine model extraction abstract component datagram:
Ignore the transition process of described data package state machine, extract connected by described directed edge multiple summits, entrance and exit point and the abstract component datagram formed;
Delete the summit that the data package of untreatment data message in abstract component datagram is corresponding, and the directed edge that the channel passed through without data message is corresponding;
In abstract component datagram, increase shared variable summit for representing described shared variable data package, and increase shared variable directed edge to represent the channel between described shared variable data package and other data packages.
According to one embodiment of present invention, described generation based on abstract component datagram covers all directed edges, is in all data paths between the entrance of described streamline extended finite state machine model and exit point and comprises:
Current vertex parameter initialization, using described entrance parameter as the initial parameter of current vertex;
Current vertex parameter upgrades, next summit of selected current vertex in abstract component datagram, when next summit is not exit point and is not blank spot, upgrades the parameter of current vertex by the parameter on next summit; When next summit is blank spot, upgrade the parameter of current vertex by the parameter on the fraternal summit do not accessed;
Repeat current vertex parameter step of updating, when next summit is exit point, record by entrance to exit point data path.
According to one embodiment of present invention, generate in the step of the cycle tests of total data assembly in the described data path of access respectively in described traversal full data path,
Testing data assembly in a selected data paths, searches status change according to the default input parameter of testing data assembly input channel and the default output parameter of delivery channel in testing data component state machine;
Search by guiding path before initial condition to the initial state of described status change in testing data component state machine;
By the cycle tests of described status change and front guiding path determination testing data assembly.
According to one embodiment of present invention, described shared variable directed edge represents the channel between described shared variable data package and the data package writing data to shared variable, and/or
Described shared variable data package and from the channel between the data package of shared variable sense data.
According to one embodiment of present invention, described data package comprise following every in one or multinomial:
General stream list item, Data Matching assembly, data mismatch assembly in the watch-dog of the network switch, network switch stream table.
According to one embodiment of present invention, described general stream list item data package state machine comprises one or several of following various state:
Add data flow forwarding data, interpolation data flow jump to other stream tables, add data flow and abandon data message, Update Table stream forwarding data, Update Table stream jump to other stream tables, Update Table stream abandon data message.
According to one embodiment of present invention, described data mismatch component state machine comprises one or several of following various state:
Add data flow uploading data, interpolation data flow jump to other stream tables, add data flow and abandon data message, Update Table stream uploading data, Update Table stream jump to other stream tables, Update Table stream abandon data message.
Beneficial effect of the present invention is, for the streamline situation with multiple process that is mutually related, provides a kind of based on streamline extended finite state machine model, can full data path in ensuring coverage model.Streamline extended finite state machine Model Abstraction is the module data figure of only data of description assembly and channel by the present invention, deletes associated component and the channel of not data streams, simplifies method of testing.In addition, by being front guiding path by the status change process simplification of data package inside, only considering the data path in abstract component datagram, can state explosion problem be slowed down.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from specification, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in specification, claims and accompanying drawing and obtain.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, with embodiments of the invention jointly for explaining the present invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the flow chart of steps of the method for generating protocol test sequence according to the embodiment of the present invention;
Fig. 2 is the switch model schematic of the OpenFlow agreement described according to the use streamline extended finite state machine of the embodiment of the present invention;
Fig. 3 is the general stream list item data package state machine FE according to the embodiment of the present invention istatus change schematic diagram;
Fig. 4 is the data mismatch component state machine TM according to the embodiment of the present invention istatus change schematic diagram;
Fig. 5 is the flow chart of steps of the extraction abstract component datagram according to the embodiment of the present invention;
Fig. 6 is the abstract component datagram of the switch model extraction according to Fig. 2;
Fig. 7 is the flow chart of steps of the generation data path according to the embodiment of the present invention;
Fig. 8 is the flow chart of steps of the generation cycle tests according to the embodiment of the present invention;
Fig. 9 is the schematic diagram of the data paths according to the embodiment of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, the present invention is described in further detail.
Embodiments of the invention provide a kind of based on streamline extended finite state machine for generating protocol test sequence method, the method guarantees that pipeline extended finite state machine model describes the covering of pipeline system, slows down state explosion problem simultaneously.
Referring to Fig. 1 describe in detail provide in this enforcement for generating protocol test sequence method.
First in step s 110, the protocol specification for the network equipment to be tested builds the streamline extended finite state machine model comprising the data package state machine corresponding with described protocol specification and channel set.Wherein, described data package state machine is expressed as the array of the multiple parallel protocol process of data of description assembly, and this array comprises the state set parameter of data package, input parameter, output parameter and status change lumped parameter.
In prior art, extended finite state machine (Extended Finite State Machine is called for short EFSM) is widely used in description procotol.But some protocol specification comprises the concurrent process of multiple non-communicating in a network entity, therefore need to use the finite state machine of parallel-expansion to simulate protocol specification.
The multiple non-communicating concurrent processes described with streamline extended finite state machine (Pipelined Extended Finite Machines, referred to as Pi-EFSM) in a network entity are proposed in the present embodiment.First build streamline extended finite state machine model, represent with PL.PL is a four-tuple, PL=(M, ST, C, VS).In four-tuple, the implication of each parameter as mentioned below.
The set that M is made up of n component state machine, M={M 1, M 2..., M n, each component state machine is for describing the specification of each protocol process.Wherein, each component state machine M irepresent, i=0,1 ..., n, M ieight tuples, M i=(S, s 0, V i, VS r, VS wi, O, T).
At eight tuple M iin, S is M ifinite state set;
S 0∈ S is M iinitial condition;
V i=(V i1, V i2... V ik..., V in), wherein V ikall definition and use all at M iinner variable, is called built-in variable, k=1,2 ..., n, n are positive integer, V im ithe set of all built-in variables;
wherein VS rat M ithe set of the shared variable that inside can read;
wherein VS wat M ithe set of inner revisable shared variable;
I=(I 1, I 2... I k..., I n), wherein I km ian incoming symbol, k=1,2 ..., n, n are positive integer, and I is M ithe set of all incoming symbols, I is nonempty set;
O=(O 1, O 2... O k..., O n), wherein O km ian output symbol, k=1,2 ..., n, n are positive integer, and O is M ithe set of all output symbols, O is nonempty set;
T=(T 1, T 2... T k..., T n) be M ithe set of all transition, T is nonempty set, wherein T km itransition, k=1,2 ..., n, n are positive integer, T kone hexa-atomic group, T k=(s start, s end, I k, O k, P, A).
At T khexa-atomic group in, s start∈ S is T kinitial condition; s end∈ S is T klast current state; I k∈ I is T kincoming symbol; O k∈ O is T koutput symbol; P is about V iin built-in variable, V ein external variable, input I kwith the predicate expressions of some constants, P describes T kthe condition performed; A is T kbehavior sequence during execution, it is one or more that A comprises in variable assignments behavior and output behavior, and the multinomial behavior in A performs in order.
In addition, in streamline extended finite state machine model PL, ST is the finite aggregate flowing top layer level in streamline, according to the multilevel flow table in the network switch, each streamline extended finite state machine model can be divided into 1 or multiple stream top layers level, and each stream top layer level comprises the component state machine in 1 or multiple M.C is the finite aggregate of channel, and a component state machine is connected with external environment condition or other state machines by each channel.VS is the finite aggregate of shared variable, and shared variable is global variable, does not belong to specific component state machine.
Fig. 2 is the switch model schematic of the OpenFlow agreement using streamline extended finite state machine to describe.The detail of data package status change is not embodied in Fig. 2.Controller in Fig. 2 is the entity of external environment condition, does not belong to the assembly of switch; Entrance and exit point are the abstract of switch and external environment interface, do not belong to the assembly of switch; Watch-dog is the assembly of switch, is responsible for and controller interactive controlling message; Stream table 0, stream table 1 and stream table 2 represent the multilevel flow table in switch, the various flows top layer level of corresponding streamline extended finite state machine; MM in Fig. 2 i(i=0,1,2) are the assemblies of being responsible for carrying out Data Matching in each stream table of switch; FE i(i=0,1,2) assembly is the general stream list item in switch each stream table; TM i(i=0,1,2) assembly is the mismatch list item in each stream table of switch; BUF i(i=0,1,2) are shared variables, represent the buffer memory in each stream table of switch, do not belong to component state machine.In Fig. 2, dotted line represents the flow direction of control data of peripheral control unit and switch watch-dog, switch internal data assembly, and solid line represents the flow direction of switch interior business data.
Fig. 3 is general stream list item data package state machine FE in the present embodiment istatus change schematic diagram, wherein FE istatus change refer to table 1.Fig. 4 is data mismatch component state machine TM in the present embodiment istatus change schematic diagram, wherein TM istatus change refer to table 2.
Table 1
Input parameter aa value 0 or 1 in table 1, represents and whether contains output order immediately; Gtab value 0,1 or 2, represents not homogeneous turbulence table.
Table 2
Input parameter aa value 0 or 1 in table 2, represents and whether contains output order immediately; Gtab value 0,1 or 2, represents not homogeneous turbulence table.
Refer again to Fig. 1, build streamline extended finite state machine model in step s 110, then performing step S120, describing the processing condition data in pipeline system according to pipeline state machine model extraction abstract component datagram, for generating test path and cycle tests.
Specifically, in the step s 120 according to described streamline extended finite state machine model extraction abstract component datagram, described abstract component datagram comprises the summit representing described data package, represents the directed edge of described channel set and the entrance of described streamline extended finite state machine model and exit point.
With reference to Fig. 5, comprise following sub-step in the step s 120.First perform sub-step S121, ignore the transition process of data package state machine, extract connected by described directed edge multiple summits, entrance and exit point and the abstract component datagram that forms.Then, in sub-step S122, the summit that the data package of untreatment data message in abstract component datagram is corresponding is deleted, and the directed edge that the channel passed through without data message is corresponding.Finally perform sub-step S123, in abstract component datagram, increase shared variable summit for representing shared variable data package, and increase shared variable directed edge to represent the channel between shared variable data package and other data packages.Wherein, shared variable directed edge represents the channel between shared variable data package and the data package writing data to shared variable, and/or described shared variable data package and from the channel between the data package of shared variable sense data.
In the present embodiment, module data (Data Graph) represents with DG, and DG is a directed acyclic graph, is DG=(V, E, P with a quadruple notation start, P end).Wherein, V is the set on summit in figure, each summit Vertex (M i) represent, i=0,1 ..., n, M iit is a component state machine; E is the set of directed edge in figure, and each directed edge Edge={c|c ∈ C} represents, wherein C is the finite aggregate of channel in streamline extended finite state machine model; P startbe the entrance of streamline extended finite state machine model, all data messages are inlet flow waterline thus; P endthe exit point of streamline extended finite state machine model, all data messages viewing pipeline thus.
Fig. 6 is the abstract component datagram of the switch model extraction according to Fig. 2.Watch-dog assembly and correlated channels has been deleted in Fig. 6; Buffer memory BUF ifor shared variable summit, represent and share data package; Increase shared variable directed edge and represent BUF iwith to BUF ithe mismatch list item assembly TM of write data iconnection between (i=0,1,2), and represent BUF iwith from BUF iread the general stream list item assembly FE of data iconnection between (i=0,1,2).
It should be noted that, the method for the generation cycle tests provided in the present embodiment data path comprised in abstract component datagram generates and the generation of cycle tests based on data path.First from module data figure, generate the data path on all limits in coverage diagram, then based on input-output adapt ation, cycle tests is generated to each data paths.So, can avoid for the streamline situation with multiple process that is mutually related in prior art, can only the various combination of exhaustive multiple process modeling respectively, cause the limitation that modeling scale is too huge.
And, based on the situation that the Self-adaptive of common mode communicating finite statemachine is all for multiple entity in network in prior art, do not relate to the situation of multiple process in single entities, be difficult to describe for sharing the situation of data in streamline, and mostly there is the state explosion problem that built-up pattern causes in relevant method of testing.To each data package that abstract component datagram selects different data paths to come in ergodic data path in the present embodiment, the different paths of sharing data in streamline can be covered, and produce the cycle tests for each data paths.Thus can state explosion problem be slowed down.
Refer again to Fig. 1, complete after extracting abstract component datagram in the step s 120, perform step S130 again, generate based on abstract component datagram and cover all directed edges, be in all data paths between the entrance of described streamline extended finite state machine model and exit point.
As shown in Figure 7, following sub-step is specifically comprised in generating in the process of data path based on abstract component datagram of step S130.
First perform sub-step S131, initialization is carried out to current vertex parameter, using entrance parameter as the initial parameter of current vertex, namely for described module data figure DG, setting current vertex P current=P start.
Next, in sub-step S132 to S135, the renewal of current vertex parameter is completed.
In sub-step S132, judge whether next summit in abstract component datagram is exit point or blank spot, if the next summit P in abstract component datagram current.next be not blank spot and be not exit point P end, perform sub-step S133, upgrade the parameter of current vertex by the parameter on next summit, i.e. P current=P current.next; Iteron step S132 subsequently.
If the next summit P in abstract component datagram current.next be exit point P end, then perform step S134, record by P startto P enddata path, and by P currentbe set to the fraternal summit do not accessed, repeat sub-step S132 subsequently; Wherein, P currentother follow-up summits on its last summit of fraternal vertex representation, citing as shown in Figure 6, FE 0with TM 0fraternal summit each other.
If the next summit P in module data figure current.next be blank spot, then perform sub-step S135, P currentbe set to the fraternal summit do not accessed, namely upgrade the parameter of current vertex by the parameter on the fraternal summit do not accessed, iteron step S132 subsequently.
Repeat sub-step S132 to S135 like this, thus all accessed mistake in all summits in abstract component datagram DG in step s 130, which, complete data path and generate.
Refer again to Fig. 1, next perform step S140, traversal full data path generates the cycle tests of total data assembly in the described data path of access respectively.Introduce the cycle tests generating algorithm based on input-output adapt ation in this step in detail hereinafter with reference to Fig. 8, and progressively explain in detail.
Based on the abstract component datagram that the system abstract view of streamline extended finite state machine model is extracted in abovementioned steps S120, do not comprise the internal state transition details of data package state machine.Accordingly, the data path generated in step s 130, which belongs to system abstract path, in order to carry out actual test, needs based on the cycle tests of data path generation containing guiding path before data package state machine inside.
As shown in Figure 8, following sub-step is comprised in step S140.
First in sub-step S141, choose a data path, and the message chosen in the first channel of this data path is input.Then perform sub-step S142, the message chosen in data path in next channel is output.Subsequently in sub-step S143, searching in the data package state machine of connection two channels with input is input, take output as the transition t exported.Like this, for the testing data assembly in a selected data paths, according to the default input parameter of testing data assembly input channel and the default output parameter of delivery channel, the algorithm based on input-output adapt ation searches status change in testing data component state machine.
Next in sub-step S144, search in the data package state machine belonging to t by guiding path before initial condition to the initial state of t and be connected with t, by the cycle tests of status change t and front guiding path determination testing data assembly.Because before data package state machine inside, guiding path only represents from the change by the initial state of this data package from initial condition to status change, the integrated testability of this and data path has nothing to do, preferably, a shortest front guiding path can be selected to reduce number of calculations.
Perform sub-step S145 subsequently, in setting data path, the input parameter of subsequent channel and output parameter, namely arrange input=output.Repeat sub-step S143 until in selected data path all data packages all accessed, generate the cycle tests for selected data path;
In sub-step S146, reselect data path, repeat sub-step S141 until all data paths are all traversed, the whole cycle tests of final generation.
Below provide one based on the example of the test generation algorithm of input-output adapt ation.
INPUT (1) data path set DP (2) streamline extended finite state machine model;
OUTPUT cycle tests set TS;
BEGIN
(1) each data paths DP in For DP j
(2) initialization TS jfor initial hollow testing sequence
(3) For DP jeach component state machine Mi behind middle entrance
(4) If M iit is transfer assembly
(5)Continue
(6)Else
(7) input is put ifor M imessage in front channel
(8) output is put ifor M iafter channel in message
(9) TR is put ifor M iin with input i/ output ifor the transition of I/O
(10) leading path P reamble is put ifor M iin from initial condition to the path of TR initial equilibrium state
(11)Path i:=Preamble i+TR i
(12) by Path istored in TS j
(13)End?If
(14) by TS jstored in TS
(15)End?For
(16)End?For
END.
So far, in step S140, travel through the cycle tests that full data path generates total data assembly in the described data path of access respectively.
experimental result
Above method is adopted to generate 64 data paths for OpenFlow agreement 1.3.0 version switch model and 64 corresponding cycle testss in this example.For example, a data paths of generation is illustrated in figure 9.The cycle tests of its correspondence is as shown in table 3.
Table 3
As can be seen here, the embodiment of the present invention reaches expection object.
In sum, embodiments of the invention are by introducing streamline extended finite state machine model and module data figure, first data path is searched in Self-adaptive process, regeneration cycle tests, accurate description with the procotol of pipeline organization, and uses stratification to generate to slow down state explosion problem.
Although execution mode disclosed in this invention is as above, the execution mode that described content just adopts for the ease of understanding the present invention, and be not used to limit the present invention.Technical staff in any the technical field of the invention; under the prerequisite not departing from spirit and scope disclosed in this invention; any amendment and change can be done what implement in form and in details; but scope of patent protection of the present invention, the scope that still must define with appending claims is as the criterion.

Claims (10)

1. for generating a method for protocol test sequence, it is characterized in that, comprising the following steps:
Protocol specification for the network equipment to be tested builds the streamline extended finite state machine model comprising the data package state machine corresponding with described protocol specification and channel set;
According to described streamline extended finite state machine model extraction abstract component datagram, described abstract component datagram comprises the summit representing described data package, represents the directed edge of described channel set and the entrance of described streamline extended finite state machine model and exit point;
Generate based on abstract component datagram and cover all directed edges, be in all data paths between the entrance of described streamline extended finite state machine model and exit point;
Traversal full data path generates the cycle tests of total data assembly in the described data path of access respectively.
2. method according to claim 1, it is characterized in that, described data package state machine is expressed as the array of the multiple parallel protocol process of data of description assembly, and this array comprises the state set parameter of data package, input parameter, output parameter and status change lumped parameter.
3. method according to claim 1 and 2, is characterized in that, described streamline extended finite state machine model comprises the shared variable representing and flow table cache in network under test switch further.
4. method according to claim 3, is characterized in that, describedly comprises according to described streamline extended finite state machine model extraction abstract component datagram:
Ignore the transition process of described data package state machine, extract connected by described directed edge multiple summits, entrance and exit point and the abstract component datagram formed;
Delete the summit that the data package of untreatment data message in abstract component datagram is corresponding, and the directed edge that the channel passed through without data message is corresponding;
In abstract component datagram, increase shared variable summit for representing described shared variable data package, and increase shared variable directed edge to represent the channel between described shared variable data package and other data packages.
5. method according to claim 4, is characterized in that, described generation based on abstract component datagram covers all directed edges, is in all data paths between the entrance of described streamline extended finite state machine model and exit point and comprises:
Current vertex parameter initialization, using described entrance parameter as the initial parameter of current vertex;
Current vertex parameter upgrades, next summit of selected current vertex in abstract component datagram, when next summit is not exit point and is not blank spot, upgrades the parameter of current vertex by the parameter on next summit; When next summit is blank spot, upgrade the parameter of current vertex by the parameter on the fraternal summit do not accessed;
Repeat current vertex parameter step of updating, when next summit is exit point, record by entrance to exit point data path.
6. method according to claim 5, is characterized in that, generates in the step of the cycle tests of total data assembly in the described data path of access in described traversal full data path respectively,
Testing data assembly in a selected data paths, searches status change according to the default input parameter of testing data assembly input channel and the default output parameter of delivery channel in testing data component state machine;
Search by guiding path before initial condition to the initial state of described status change in testing data component state machine;
By the cycle tests of described status change and front guiding path determination testing data assembly.
7. method according to claim 4, is characterized in that, described shared variable directed edge represents the channel between described shared variable data package and the data package writing data to shared variable, and/or
Described shared variable data package and from the channel between the data package of shared variable sense data.
8. the method according to any one of claim 1-7, is characterized in that, described data package comprise following every in one or multinomial:
General stream list item, Data Matching assembly, data mismatch assembly in the watch-dog of the network switch, network switch stream table.
9. method according to claim 8, is characterized in that, described general stream list item data package state machine comprises one or several of following various state:
Add data flow forwarding data, interpolation data flow jump to other stream tables, add data flow and abandon data message, Update Table stream forwarding data, Update Table stream jump to other stream tables, Update Table stream abandon data message.
10. method according to claim 8, is characterized in that, described data mismatch component state machine comprises one or several of following various state:
Add data flow uploading data, interpolation data flow jump to other stream tables, add data flow and abandon data message, Update Table stream uploading data, Update Table stream jump to other stream tables, Update Table stream abandon data message.
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