CN104241290A

CN104241290A - Method for improving anti-interference performance of non-volatile embedded memorizer

Info

Publication number: CN104241290A
Application number: CN201310250223.9A
Authority: CN
Inventors: 陆涵蔚; 曹俊
Original assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2013-06-21
Filing date: 2013-06-21
Publication date: 2014-12-24

Abstract

The invention discloses a method for improving anti-interference performance of a non-volatile embedded memorizer. The method comprises the steps of (1) defining a common source hierarchical graph through optical resist and a photo-mask, (2) injecting a common source, (3) removing hierarchical optical resist of the common source, and (4) carrying out rapid thermal processing at the temperature below 950 DEG C, wherein the thermal processing time is more than 5 seconds. The method can effectively improve the anti-interference performance of the non-volatile memorizer in the write-in process.

Description

The jamproof ameliorative way of non-volatile embedding memory

Technical field

The present invention relates to the jamproof ameliorative way of memory in a kind of semiconductor applications, particularly relate to the jamproof ameliorative way of a kind of non-volatile embedding memory.

Background technology

Non-volatility memorizer supplies seasonable at system closing or non-transformer, and still can continue to keep data message, wherein, this non-volatility memorizer can be divided into two classes: electric charge well-type memory and floating gate type memory.In the non-volatility memorizer of floating gate type, electric charge is stored in floating boom, and they still can keep when non-transformer supply.

But, the write operation of general non-volatility memorizer realizes by adding high pressure in the public source of memory, original technique (as shown in Figure 1) is by forming public source in the injection technology in public source region, and wherein, single memory cell structure schematic diagram as shown in Figure 2.In the process write, the public source of selected unit adds high pressure, and corresponding wordline and bit line also add appropriate voltage, and the unit being performed write operation unit under original technique contiguous is also easily write, the interfering process of Here it is non-volatility memorizer, as shown in Figure 3.

Therefore, for original technique of the write operation of non-volatility memorizer, be necessary further to improve the Study of Interference.

Summary of the invention

The technical problem to be solved in the present invention is to provide the jamproof ameliorative way of a kind of non-volatile embedding memory.By the method, the interference in non-volatility memorizer ablation process effectively can be improved.

For solving the problems of the technologies described above, the jamproof ameliorative way of non-volatile embedding memory of the present invention, comprises step:

1) photoresist is utilized, by light shield definition common source level figure;

2) common source is injected;

3) common source level photoresist is removed;

4) rapid thermal treatment is carried out at the temperature more than 950 DEG C, wherein, more than 5 seconds heat treated time.

Described step 2) in, inject common source, general N-type impurity, implantation concentration are about 1 × 10 ¹⁴cm ^-2carry out common source injection.

In described step 3), remove the method for common source level photoresist, comprising: the mode adopting ashing and wet method to remove photoresist removes common source level photoresist.

In the present invention, after the manufacturing process of original public source, increase by Buwen's degree higher than 950 DEG C, the rapid thermal treatment of time more than 5 seconds, thus the antijamming capability in non-volatility memorizer write operation process can be improved.

In addition, for the embedded non-volatile memory of floating gate type, the interference when write operation affects the main cause that chip normally works, and by method of the present invention, increase by a step rapid thermal treatment in a manufacturing process, just can improve the interference in memory write operation process.Wherein, disturb and say it is there is certain leakage path from mechanism, these leakage paths can be nipped off by rapid thermal treatment, thus improve the antijamming capability in non-volatility memorizer write operation process.

Accompanying drawing explanation

Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:

Fig. 1 is the fabrication processing schematic diagram of the write operation of original non-volatility memorizer;

Fig. 2 is single memory cell schematic diagram;

Fig. 3 is the schematic diagram of a byte;

Fig. 4 is the fabrication processing schematic diagram of the write operation of non-volatility memorizer of the present invention;

Fig. 5 is the disturbed test result in a yield test program of the present invention;

Fig. 6 is the disturbed test result in another yield test program of the present invention.

Wherein, the description of reference numerals in Fig. 2-3 is as follows:

1 is common source (Common source), and 2 is floating boom (Floating gate), and 3 is wordline (Word line), and 4 is bit line (Bit line), and a is by selected cell, and b and c is adjacent unit.

Embodiment

The jamproof ameliorative way of non-volatile embedding memory of the present invention (as shown in Figure 4), comprises step:

2) common source is injected; In this step, general N-type impurity, implantation concentration are about 1 × 10 ¹⁴cm ^-2carry out common source injection;

3) adopt conventional ashing and wet method to remove photoresist, remove common source level photoresist;

Wherein, step 1-3) in, can carry out according to the manufacture craft of the write operation of original non-volatility memorizer.

According to the technological process of above-mentioned steps, compare discovery with the manufacture craft of the write operation of original non-volatility memorizer through testing: burst is on a production line tested and follow-up yield test result can be seen, the process increasing by a step rapid thermal process can improve the antijamming capability (as seen in figs. 5-6) during non-volatility memorizer write operation really.Wherein, Fig. 5-6 is two kinds of different anti-interference tests, and numerical value shown in figure is larger, illustrates that antijamming capability is more weak.

Claims

1. the jamproof ameliorative way of non-volatile embedding memory, is characterized in that, comprise step:

2) common source is injected;

3) common source level photoresist is removed;

2. the method for claim 1, is characterized in that: described step 2) injection common source, utilize N-type impurity, implantation concentration to be 1 × 10 ¹⁴cm ^-2carry out common source injection.

3. the method for claim 1, is characterized in that: in described step 3), removes the method for common source level photoresist, comprising: the mode adopting ashing and wet method to remove photoresist removes common source level photoresist.