CN104240659A - Method and device for achieving COMMAND mode MIPI signals through bridge chip - Google Patents
Method and device for achieving COMMAND mode MIPI signals through bridge chip Download PDFInfo
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- CN104240659A CN104240659A CN201410413808.2A CN201410413808A CN104240659A CN 104240659 A CN104240659 A CN 104240659A CN 201410413808 A CN201410413808 A CN 201410413808A CN 104240659 A CN104240659 A CN 104240659A
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Abstract
The invention discloses a method and device for achieving COMMAND mode MIPI signals through a bridge chip. The device comprises an LVDS-to-RGB module, a COMMAND mode data buffer, an image detection module, an image switching command module, a COMMAND control module and a COMMAND mode data processing module. The device is used for converting LVDS video signals into recognizable COMMAND mode data bus interface signals of the bridge chip to be displayed by a liquid crystal module with an MIPI interface. According to the bridge chip, the RGB video signals can be completely demodulated into the MIPI video signals without errors. VESA/JEIDA LVDS video signals are converted into the RGB signals, and then the RGB signals are converted into the MIPI signals through the bridge chip. The method and device are suitable for the need for the resolution ratio of different liquid crystal modules.
Description
Technical field
The invention belongs to display field and the technical field of measurement and test of liquid crystal module, refer to a kind of method and apparatus being realized COMMAND pattern MIPI signal by bridging chip particularly.
Background technology
MIPI (mobile Industry Processor Interface) is the abbreviation of Mobile Industry Processor Interface, the open standard for the formulation of Mobile solution processor of being initiated by the MIPI alliance comprising the companies such as ARM, Samsung, Intel.Bridging chip converts the signal of input to MIPI sequential interface signal by inner changing the mechanism under VIDEO pattern or COMMAND pattern.VIDEO pattern refers to that Host Transfer arrives liquid crystal module and adopts real-time pixel stream, and is the pattern with high-speed signal transmission, and COMMAND pattern refers to adopt and sends order and data to the pattern of signal transmission of controller with display buffer.VIDEO pattern, mainly for what do not have the liquid crystal module of frame buffer (buffer area) to carry out in driving chip to operate, sends pixel data according to the refreshing frequency sequential of liquid crystal module; COMMAND pattern operates mainly for driving the interior CPU screen containing frame buffer (buffer area), master control only sends pixel data when needs change display image, other time driving chip oneself show from the data of taking out of inner buffer (buffer area).
At present, LVDS vision signal is converted into MIPI signal by bridging chip and can only realizes VIDEO pattern, COMMAND pattern cannot be realized.When the displaying contents of MIPI liquid crystal module does not change (or when local changes), the central processing unit of display system just should be switched to low-power consumption mode, and the link between processor and display only activates when needs, this time, COMMAND pattern was just well suited for this situation.
A graphic interface is docked to sometimes for a long time for the liquid crystal module with MIPI interface, when now just needing a kind of device can rest on an interface for a long time in the liquid crystal module with MIPI interface, bridging chip is in COMMAND mode state.
Summary of the invention
For current, LVDS vision signal is converted into by bridging chip the problem that MIPI signal cannot realize COMMAND pattern, the present invention proposes a kind of method and apparatus being realized COMMAND pattern MIPI signal by bridging chip, it is simple to operate, low in energy consumption, and reliability is high.
For achieving the above object, a kind of method being realized COMMAND pattern MIPI signal by bridging chip designed by the present invention, its special character is, comprises the steps:
1) LVDS signal is converted to rgb video signal;
2) by the first frame image data buffer memory in described rgb video signal;
3) view data of described buffer memory be converted to data bus interface (Data Bus Interface) signal and transfer to bridging chip, described data bus interface signal is converted to MIPI Signal transmissions and shows to liquid crystal module by described bridging chip;
4) judge that whether the next frame view data in described rgb video signal is identical with former frame, send when next frame image data is different from former frame and cut figure instruction;
5) according to the next frame image cutting figure instruction buffer rgb video signal;
6) step 3 is repeated) to step 5).
Preferably, described step 1) before also comprise configuration bridging chip and liquid crystal module to the step of COMMAND pattern.
Preferably, described step 2) in by during the first frame image data buffer memory in described rgb video signal, frame section start testing mechanism is set, start to record data after frame head being detected, when next frame frame head being detected, stop record data.The each data write of frame section start testing mechanism guarantee are view data that the frame from frame head to postamble is complete.
Realized a device for COMMAND pattern MIPI signal by bridging chip, comprise LVDS and turn RGB module, COMMAND mode data buffer, image detection module, cut figure command module, COMMAND control module and COMMAND mode data processing module; Described LVDS turns RGB module for LVDS vision signal is resolved to rgb video signal; Described image detection module for receiving view data in rgb video signal and whether detected image changes, and sends when image changes and cuts figure instruction; The described figure of cutting command module for detect cut figure instruction after start COMMAND control module; Described COMMAND mode data buffer is for receiving rgb video signal and storing a frame image data; Described COMMAND control module, for reading the view data of rgb signal in COMMAND mode data buffer and being sent to COMMAND mode data processing module, is sent rear described COMMAND control module and is in holding state; Described COMMAND mode data processing module is sent to bridging chip after being used for that rgb video signal is converted into data bus interface (Data Bus Interface) signal, and described bridging chip is sent to liquid crystal module display after data bus interface signal is converted into MIPI signal.
Further, also comprise MIPI configuration module unit, for the command configuration bridging chip according to upper strata instruction interface, and the instruction of spreading its tail of liquid crystal module by its MIPI interface of link configuration of bridging chip.
Further, the configuration information of COMMAND control interface that described COMMAND mode data processing module is arranged according to user changes the frequency of data bus interface clock signal to control the aobvious figure speed of liquid crystal module.
Further, the COMMAND control interface that described COMMAND mode data processing module was arranged from user before receiving the view data in rgb video signal obtains the resolution information of image, and the resolution information of image is sent to bridging chip
Bridging chip of the present invention realizes, and what RGB screen signal integrity can not miss by bridging chip is demodulated to MIPI vision signal; FPGA and bridging chip combinationally use and device performance can be made more reliable, integrated more efficient and operation is also easy.
Beneficial effect of the present invention is:
1) the present invention can convert VESA/JEIDA LVDS vision signal to rgb signal, then converts MIPI signal to by bridging chip;
2) the present invention is except starting most to do except some initialized configurations by MIPI configuration module to bridging chip and liquid crystal module, other function is all by FPGA complete independently, what decrease between FPGA and high-level interface is mutual, makes to realize framework simpler, more clear;
3) the present invention by the parameter of adjustment COMMAND mode data buffer memory unit, can adapt to the demand of different liquid crystal module resolution.COMMAND pattern data store unit only stores frame data at every turn, and also only again stores new frame data when image changes at every turn, and other times can not do any operation, thus reduce the heating power consumption of device;
4) the present invention realizes COMMAND pattern by FPGA, improve the aobvious figure speed of liquid crystal module, and whether changed by the automatic detected image of the image detection module of FPGA inside, and replacement mechanism control module is to bridging chip configuration order, thus improve and cut figure speed, the operability of system is strengthened;
5) the present invention not only can control the aobvious figure speed of liquid crystal module under COMMAND pattern, and can control the number of liquid crystal display pixel, thus contributes to module manufacturer carries out extraordinary image vegetarian refreshments location and detection thereof to liquid crystal display.
Accompanying drawing explanation
Fig. 1 is the present invention realizes the device of COMMAND pattern MIPI signal structural representation by bridging chip.
Fig. 2 is the interface sequence figure of COMMAND mode data processing module and bridging chip in Fig. 1.
In figure: 1.LVDS turns RGB module, 2.COMMAND mode data buffer, 3. image detection module, 4. cut figure command module, 5.COMMAND control module, 6.COMMAND mode data processing module, 7.MIPI configuration module unit, 8. bridging chip, 9. liquid crystal module.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
As shown in Figure 1, a kind of device being realized COMMAND pattern MIPI signal by bridging chip of the present invention, is comprised LVDS and turns RGB module 1, COMMAND mode data buffer 2, image detection module 3, cuts figure command module 4, COMMAND control module 5, COMMAND mode data processing module 6 and MIPI configuration module unit 7.
LVDS turns RGB module 1 for LVDS vision signal is resolved to rgb video signal, parse and comprise demodulation clock, pixel clock, row data enable signal, frame data enable signal, and order and data enable signal, after having transformed, signal is sent into image detection module and COMMAND mode data buffer 2.
COMMAND mode data buffer 2 is for receiving rgb video signal and storing a frame image data.COMMAND mode data buffer 2 can store frame data to received rgb video signal, comprise the capacity of a width picture, after frame data store, COMMAND mode data buffer 2 will stop the write of entry data, after only having image detection module to send to cut figure instruction, now COMMAND mode data buffer 2 just can start to re-write a new frame signal, but should be noted that, LVDE turns RGB module 1 can send image to COMMAND mode data buffer 2 always, COMMAND mode data buffer 2 inside has a frame section start testing mechanism, ensure that the data be at every turn written to inside COMMAND mode data buffer 2 are from frame head to postamble, it is a complete image.
Image detection module 3 for receiving view data in rgb video signal and whether detected image changes, and sends when image changes and cuts figure instruction.Image detection module 3 can detect each frame signal in real time, image detection module 3 first can store the partial pixel point in a frame signal, then real time contrast is with a frame signal below, when pixel information is inconsistent, image detection module 3 can send one and cut figure instruction to cutting figure command module 4, COMMAND mode data buffer 2 and COMMAND control module 5, inform that these module map pictures there occurs change, can associative operation be carried out.Image detection module 3 meeting keeps the time of a frame by cutting figure instruction, after treating a frame time, module can restart to carry out image detection.
Cut figure command module 4 for detect cut figure instruction after start COMMAND control module 5.Cut figure command module 4 after detecting and cutting figure instruction, replace MIPI configuration module unit 7, send configuration-direct to bridging chip 8, as cutting figure instruction input, what this reduces between upper layer module is mutual, simplifies controlling mechanism, makes to cut figure speed faster more excellent.
COMMAND control module 5, for reading the view data of rgb signal in COMMAND mode data buffer 2 and being sent to COMMAND mode data processing module 6, is sent rear COMMAND control module 5 and is in holding state.COMMAND control module 5 is controlled by image detection module 3, cuts figure detection module 4 and COMMAND control interface.Associating between COMMAND control module 5 with COMMAND control interface is as follows: when MIPI configuration module unit 7 is when being configured bridging chip 8, data path can break by COMMAND control module 5, now COMMAND mode data processing module 6 can stagnate work, sends relevant data also can not to bridging chip 8; After 7 pairs of bridging chip 8 configurations of MIPI configuration module unit terminate, COMMAND control interface can send an instruction to COMMAND control module 5, now COMMAND control module 5 is open-minded by data link, and COMMAND mode data processing module 6 also starts normal work, sends discernible clock signal to bridging chip 8.COMMAND control module 5 and image detection module 3 are with to cut associating of figure command module 4 as follows: when image detection module 3 send cut figure instruction to COMMAND control module 5 time, COMMAND control module 5 can be broken COMMAND mode data path, cut figure command module 4 and integrated order is sent to bridging chip 8 by COMMAND mode data processing module 6, inform that COMMAND control module 5 opens data path after order is sent, make data-signal send to bridging chip 8 by COMMAND mode data processing module 6.
COMMAND mode data processing module 6 is sent to bridging chip 8 after rgb video signal is converted into data bus interface signal, and bridging chip 8 is sent to liquid crystal module 9 after data bus interface signal is converted into MIPI signal and shows.Rgb signal is changed into the discernible clock signal of bridging chip 8 by COMMAND mode data processing module 6, then bridging chip 8 is sent to, finally pass to liquid crystal module 9, the rate instruction that COMMAND mode data processing module 6 configures according to COMMAND control interface, control the picture display rate of liquid crystal module, arrange the number of pixels of Interface Controller liquid crystal module according to liquid crystal module resolution, these two functions contribute to module manufacturer and search liquid crystal module and whether have the problems such as extraordinary image vegetarian refreshments.
MIPI configuration module unit 7 is for the command configuration bridging chip 8 according to upper strata instruction interface.MIPI configuration module unit, by the command configuration bridging chip 8 of upper strata instruction input interface, and the instruction of spreading its tail of liquid crystal module by the link configuration MIPI interface of bridging chip 8.In the present invention, bridging chip 8 realizes by MIPI bridging chip.
Utilize said apparatus to complete to realize the concrete steps of the method for COMMAND pattern MIPI signal by bridging chip as follows:
0) MIPI configuration module unit 7 configures bridging chip 8 to COMMAND pattern and to spread its tail configuration to liquid crystal module 9.When MIPI configuration module unit 7 configures bridging chip 8 and liquid crystal module 9 to COMMAND pattern, make COMMAND control module 5 be in closed condition, after having configured, open COMMAND control module 5 again.
Liquid crystal module resolution arranges interface can arrange COMMAND mode data buffer 2 cache size according to the resolution requirements of current liquid crystal module 9, and this resolution information is sent to COMMAND mode data processing module 6 simultaneously.
1) LVDS turns RGB module 1 LVDS vision signal is converted to rgb video signal, this flow process can exist always, LVDS vision signal constantly enters into LVDS in a steady stream and turns RGB module 1, LVDS and turn RGB module 1 and also continuously LVDS vision signal can be changed into rgb video signal.
2) COMMAND mode data buffer 2 is by the frame image data buffer memory in the rgb video signal of reception.It should be noted that herein, due to the frame head of first data not necessarily frame data of being input to COMMAND mode data buffer 2, therefore in COMMAND mode data buffer 2, arrange frame section start testing mechanism, each data write of guarantee are view data that the frame from frame head to postamble is complete.Frame section start testing mechanism can do one enable, when frame head arrives, the enable ability of this mechanism is effective, after frame data are sent, enable signal is invalid, this mechanism also ensure that the data be cached in COMMAND mode data buffer 2 are frame signals simultaneously, and signal is from frame head to postamble.
After COMMAND mode data buffer 2 stores a full frame signal, an indicator signal can be given to COMMAND control module 5, and now COMMAND control module 5 starts to read data from COMMAND mode data buffer 2.
3) COMMAND control module 5 reads the view data of buffer memory in COMMAND mode data buffer 2 and is sent to COMMAND mode data processing module 6, view data is converted to data bus interface signal and transfers to bridging chip 8 by COMMAND mode data processing module 6, and data bus interface signal is converted to MIPI Signal transmissions and shows to liquid crystal module 9 by bridging chip 8.COMMAND control module 5 is in holding state after the data read are sent to COMMAND mode data processing module 6, waits for and starting next time.COMMAND mode data processing module 6 has three functions: rgb signal is converted to the clock signal that bridging chip 8 needs by function one exactly, and signal sequence as shown in Figure 2; Function two is the image resolution ratio sizes being arranged interface synchronization and COMMAND mode data buffer 2 by liquid crystal module resolution, according to arranging the picture requiring to demonstrate the pixel number of needs; Function three regulates by COMMAND control interface the speed being input to the input data of bridging chip 8, data bus interface signal as shown in Figure 2, bridging chip 8 can detect whether have enable signal at the rising edge of data bus interface clock signal, then image data when having an enable signal, the frequency of data bus interface signal determines the aobvious figure speed of liquid crystal module 9.Data bus interface signal is converted into MIPI signal by the bridging chip 8 receiving data bus interface signal, thus reaches a screen effect.
4) image detection module 3 receives the view data in rgb video signal, and cuts figure instruction detecting that the view data in rgb video signal sends when changing.
Image detection module 3 is detecting the rgb video signal received always, when the first two field picture is sent to image detection module 3, can therefrom extract some as far as possible many pixels is stored in the buffer of image detection module 3 inside, then from the second frame, data below can contrast with the former frame data of buffer memory, until when two frame signal contrasts are inconsistent, will to cutting figure command module 4, COMMAND mode data buffer 2 and COMMAND control module 5 send cuts the instruction of figure information, meanwhile, a new frame signal information also can be stored in internal buffer by image detection module 3 self, then continue to detect follow-up image.
When image detection module 3 detects that rgb video signal changes, and COMMAND control module 5 is when receiving enable signal and the image location information of partial cut figure from the COMMAND control interface that user is arranged, image detection module 3 sends cuts figure instruction, the enable signal of partial cut figure and image location information are converted into partial cut figure configuration information and are sent to bridging chip 8 by COMMAND control module 5, bridging chip 8 configures liquid crystal module 9, until COMMAND mode data buffer 2 according to when cutting figure instruction buffer next frame image, COMMAND control module 5 reads the part image data of buffer memory in COMMAND mode data buffer 2 according to image location information, and be sent to COMMAND mode data processing module 6, by COMMAND mode data processing module 6 view data be converted to data bus interface signal again and transfer to bridging chip 8, data bus interface signal is converted to MIPI Signal transmissions and shows to liquid crystal module 9 by bridging chip 8.
5) COMMAND mode data buffer 2 is according to the next frame image cutting figure instruction buffer rgb video signal.
COMMAND mode buffer 2, cut after figure command module 4 and COMMAND control module 5 receive figure information of the cutting instruction that image detection module 3 sends, a new frame image information can store by COMMAND mode data buffer 2 again, and the mode of storage and the item that should be noted that are in step 2) in done detailed description.Data link can be broken by COMMAND control module 5, namely the link between COMMAND mode data buffer 2 and COMMAND mode data processing module 6 is disconnected, then the link cut between figure command module 4 and COMMAND mode data processing module 6 is opened, cut figure command module 4 and the figure instruction of cutting stored can be transferred to bridging chip 8 by COMMAND mode data processing module 6, after instruction is sent, COMMAND control module 5 opens the link between COMMAND mode data buffer 2 and COMMAND mode data processing module 6.
6) step 3 is repeated) to step 5).
Below be only the preferred embodiment of the present invention, it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention, can also design some improvement, these improvement also should be considered as protection scope of the present invention.
Claims (7)
1. realized a method for COMMAND pattern MIPI signal by bridging chip, it is characterized in that: comprise the steps:
1) LVDS signal is converted to rgb video signal;
2) by the first frame image data buffer memory in described rgb video signal;
3) view data of described buffer memory be converted to data bus interface (Data Bus Interface) signal and transfer to bridging chip (8), described data bus interface signal is converted to MIPI Signal transmissions and shows to liquid crystal module (9) by described bridging chip (8);
4) judge that whether the next frame view data in described rgb video signal is identical with former frame, send when next frame image data is different from former frame and cut figure instruction;
5) according to the next frame image cutting figure instruction buffer rgb video signal;
6) step 3 is repeated) to step 5).
2. the method being realized COMMAND pattern MIPI signal by bridging chip according to claim 1, be is characterized in that: described step 1) before also comprise configuration bridging chip (8) and liquid crystal module (9) to the step of COMMAND pattern.
3. the method being realized COMMAND pattern MIPI signal by bridging chip according to claim 1 and 2, it is characterized in that: described step 2) in by during the first frame image data buffer memory in described rgb video signal, frame section start testing mechanism is set, start to record data after frame head being detected, when next frame frame head being detected, stop record data.
4. realize the device being realized COMMAND pattern MIPI signal by bridging chip of said method, it is characterized in that: comprise LVDS and turn RGB module (1), COMMAND mode data buffer (2), image detection module (3), cut figure command module (4), COMMAND control module (5) and COMMAND mode data processing module (6);
Described LVDS turns RGB module (1) for LVDS vision signal is resolved to rgb video signal;
Described COMMAND mode data buffer (2) is for receiving rgb video signal and storing a frame image data;
Described image detection module (3) for receiving view data in rgb video signal and whether detected image changes, and sends when image changes and cuts figure instruction;
The described figure of cutting command module (4) for detect cut figure instruction after start COMMAND control module;
Described COMMAND control module (5), for reading the view data of rgb signal in COMMAND mode data buffer and being sent to COMMAND mode data processing module, is sent rear described COMMAND control module (5) and is in holding state;
Described COMMAND mode data processing module (6) is sent to bridging chip (7) after rgb video signal is converted into data bus interface signal, and described bridging chip (7) is sent to liquid crystal module (9) display after data bus interface signal is converted into MIPI signal.
5. the device being realized COMMAND pattern MIPI signal by bridging chip according to claim 4, it is characterized in that: also comprise MIPI configuration module unit (7), for the command configuration bridging chip (8) according to upper strata instruction interface.
6. the device being realized COMMAND pattern MIPI signal by bridging chip according to claim 5, be is characterized in that: the configuration information of the COMMAND control interface that described COMMAND mode data processing module (6) is arranged according to user changes the frequency of data bus interface clock signal to control the aobvious figure speed of liquid crystal module.
7. the device being realized COMMAND pattern MIPI signal by bridging chip according to claim 6, it is characterized in that: described COMMAND mode data processing module (6) obtains the resolution information of image according to the COMMAND control interface that user is arranged, and the resolution information of image is sent to bridging chip (7).
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| CN111625081A (en) * | 2019-02-28 | 2020-09-04 | 上海和辉光电有限公司 | Image data processing method and device |
| CN111641823A (en) * | 2020-05-06 | 2020-09-08 | 深圳市爱协生科技有限公司 | MIPI interface-based image algorithm verification system |
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Address after: 430070 Hubei City, Hongshan Province, South Lake Road, No. 53, Hongshan Venture Center, building on the 4 floor, No. Patentee after: Wuhan fine test electronics group Limited by Share Ltd Address before: 430070 Hubei City, Hongshan Province, South Lake Road, No. 53, Hongshan Venture Center, building on the 4 floor, No. Patentee before: Wuhan Jingce Electronic Technology Co., Ltd. |