CN104238954A - Electronic equipment and information processing method - Google Patents
Electronic equipment and information processing method Download PDFInfo
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- CN104238954A CN104238954A CN201310247046.9A CN201310247046A CN104238954A CN 104238954 A CN104238954 A CN 104238954A CN 201310247046 A CN201310247046 A CN 201310247046A CN 104238954 A CN104238954 A CN 104238954A
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Abstract
The invention discloses electronic equipment used for improving an NVM (non-volatile memory). The electronic equipment comprises a processor and a memory controller connected with the processor; the NVM is connected with the memory controller. The memory controller can execute a first instruction after receiving the first instruction transmitted by the processor and used for processing first data, and the first data are processed in the NVM. The invention further discloses an information processing method by applying the electronic equipment.
Description
Technical field
The present invention relates to computing machine and built-in field, particularly a kind of electronic equipment and information processing method.
Background technology
Along with the development of science and technology, electronic technology have also been obtained development at full speed, and the kind of electronic product also gets more and more, and people have also enjoyed the various facilities that development in science and technology brings.The comfortable life that present people can be brought along with development in science and technology by various types of electronic equipment enjoyment.Such as, the electronic equipments such as mobile phone have become an indispensable part in people's life, and people can be strengthened and contacting between other people in mode of making a phone call, send short messages etc. by electronic equipments such as mobile phones.
NVM (Nonvolatile memory, nonvolatile memory) is a kind of comparatively novel storer, and data wherein can not be lost when power was lost.The NVM adopted on smart cards at present mainly comprises EEPROM (Electrically Erasable Programmable Read-Only Memory, EEPROM (Electrically Erasable Programmable Read Only Memo)) and Flash (flash memory).
NVM can realize read-write operation easily, therefore very flexible.
NVM is commonly used to program of depositing and data, for smart card, mostly application program and data, file etc. is stored in NVM.
According to present development trend, NVM Development of storage technology is very fast, probably can replace the storeies such as disk (disk) in the near future and become mainstream storage device.
In prior art, because the effect of NVM is equivalent to hard disk, being therefore processed according to the mode of the memory devices such as disk by NVM, as shown in Figure 1, is software architecture figure relevant with NVM in electronic equipment in prior art.Fig. 1 is described for linux (a kind of operating system) operating system.
As can be seen from Figure 1, after VFS (Virtual File System) receives instruction, the software systems of meeting belonging to this instruction calls NVM, in Fig. 1, such as these software systems are Ext2 (a kind of file system), this instruction can be sent to Generic Block Layer (generic block layer) layer and process by Ext2, completes this instruction more afterwards by Device Driver (hardware driving) driving N VM.
According to the processing mode of Fig. 1, command just needs the longer time in midway, although so NVM read or write speed is fast, but the fast advantage of its read or write speed cannot well be played, that is, the processing speed that this processing mode of the prior art determines NVM still can not get good raising, have impact on the treatment effeciency of NVM.
Summary of the invention
The embodiment of the present invention provides a kind of electronic equipment and information processing method, for solving the technical matters that in prior art, NVM treatment effeciency is not high, achieves the technique effect improving NVM treatment effeciency.
A kind of electronic equipment, described electronic equipment comprises:
Processor;
The Memory Controller Hub be connected with described processor;
Nonvolatile memory NVM, is connected with described Memory Controller Hub;
Wherein, described Memory Controller Hub receive described processor send for the treatment of the first instruction of the first data after, described first instruction can be performed, in described NVM, described first data are processed.
Preferably, described NVM is connected with described Memory Controller Hub for low-power consumption Double Data Rate synchronous DRAM LPDDRx interface for Double Data Rate synchronous DRAM DDRx interface or xth by xth.
Preferably, described Memory Controller Hub is used for: obtain the first instruction for the treatment of the first data by Virtual File System VFS; According to described first instruction calls first file system; By described first file system, described first data are processed in described NVM according to described first instruction.
Preferably, described Memory Controller Hub be used for according to described first instruction calls first file system, specifically comprise: determine described first instruction for memory device be described NVM; Call described first file system corresponding with described NVM.
Preferably, described Memory Controller Hub is used for by described first file system, in described NVM, described first data are processed according to described first instruction, specifically comprise: by described first file system, in described NVM, write described first data according to described first instruction; Or, by described first file system, from described NVM, read described first data according to described first instruction.
Preferably, described Memory Controller Hub also for: determine to write M sub-storage areas of data; Determine N number of first source region that a described M sub-storage areas is corresponding; According to N number of second source region information of M sub-storage areas information acquisition after described M sub-storage areas write data; By N number of second source region of described N number of second source region information write; Be point to N number of second pointer of described N number of second source region by pointing to N number of first pointer modified of described N number of first source region.
A kind of information processing method, be applied to electronic equipment, described electronic equipment has Memory Controller Hub, the processor be connected with described Memory Controller Hub, and the NVM be connected with described Memory Controller Hub, said method comprising the steps of:
The first instruction for the treatment of the first data is obtained by Virtual File System VFS;
According to described first instruction calls first file system;
By described first file system, described first data are processed in described NVM according to described first instruction.
Preferably, comprise according to the step of described first instruction calls first file system:
Determine described first instruction for memory device be described NVM;
Call described first file system corresponding with described NVM.
Preferably, by described first file system, the step that described first data process is comprised in described NVM according to described first instruction:
By described first file system, in described NVM, write described first data according to described first instruction; Or
By described first file system, from described NVM, read described first data according to described first instruction.
Preferably, after writing data according to described first instruction in described NVM, also step is comprised:
Determine M the sub-storage areas writing data;
Determine N number of first source region that a described M sub-storage areas is corresponding;
According to N number of second source region information of M sub-storage areas information acquisition after described M sub-storage areas write data;
By N number of second source region of described N number of second source region information write;
Be point to N number of second pointer of described N number of second source region by pointing to N number of first pointer modified of described N number of first source region.
Electronic equipment in the embodiment of the present invention can comprise: processor; The Memory Controller Hub be connected with described processor; Nonvolatile memory NVM, is connected with described Memory Controller Hub; Wherein, described NVM receive described Memory Controller Hub send for the treatment of the first instruction of the first data after, described first instruction can be performed, described first data are processed.
In the embodiment of the present invention, described NVM is directly connected to described processor by described Memory Controller Hub, so, described Memory Controller Hub just can directly control described NVM, can regard as similarly, adopt the mode similar with internal memory to be connected described NVM in the embodiment of the present invention, thus when reading and writing data in described NVM, without the need to as in prior art, want after sending instruction first in internal memory, to carry out buffer memory, instruction afterwards just can arrive hard disk, in the embodiment of the present invention, instruction directly can arrive NVM, therefore, it is possible to shorten the transmission time of instruction, improve instruction processing efficiency, also can give play to the fast advantage of NVM read or write speed as far as possible.
Accompanying drawing explanation
Fig. 1 is software architecture figure relevant with NVM in electronic equipment in prior art;
Fig. 2 is the primary structure figure of electronic equipment in the embodiment of the present invention;
Fig. 3 is NVM connected mode schematic diagram in the embodiment of the present invention;
Fig. 4 is the main flow figure of information processing method in the embodiment of the present invention;
Fig. 5 is software architecture figure relevant with NVM in electronic equipment in the embodiment of the present invention.
Embodiment
Electronic equipment in the embodiment of the present invention can comprise: processor; The Memory Controller Hub be connected with described processor; Nonvolatile memory NVM, is connected with described Memory Controller Hub; Wherein, described NVM receive described Memory Controller Hub send for the treatment of the first instruction of the first data after, described first instruction can be performed, described first data are processed.
In the embodiment of the present invention, described NVM is directly connected to described processor by described Memory Controller Hub, so, described Memory Controller Hub just can directly control described NVM, can regard as similarly, adopt the mode similar with internal memory to be connected described NVM in the embodiment of the present invention, thus when reading and writing data in described NVM, without the need to as in prior art, want after sending instruction first in internal memory, to carry out buffer memory, instruction afterwards just can arrive hard disk, in the embodiment of the present invention, instruction directly can arrive NVM, therefore, it is possible to shorten the transmission time of instruction, improve instruction processing efficiency, also can give play to the fast advantage of NVM read or write speed as far as possible.
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
In the embodiment of the present invention, described electronic equipment can be the electronic equipment that PC (personal computer), notebook, PAD (panel computer), mobile phone etc. are different, and the present invention does not limit this.
In addition, term "and/or" herein, being only a kind of incidence relation describing affiliated partner, can there are three kinds of relations in expression, and such as, A and/or B, can represent: individualism A, exists A and B simultaneously, these three kinds of situations of individualism B.In addition, character "/" herein, general expression forward-backward correlation is to the relation liking a kind of "or".
Below in conjunction with accompanying drawing, the preferred embodiment of the present invention is described in detail.
Embodiment one
Refer to Fig. 2, the embodiment of the present invention provides a kind of electronic equipment, and described electronic equipment can comprise processor 201, Memory Controller Hub 202 and NVM203.
Preferably, in the embodiment of the present invention, processor 201 can be CPU (central processing unit).
Preferably, in the embodiment of the present invention, Memory Controller Hub 202 can be Memory Controller.
In the embodiment of the present invention, Memory Controller Hub 202 can be connected with processor 201.
NVM203 can be connected with Memory Controller Hub 202.
Preferably, in the embodiment of the present invention, NVM203 can be specifically EEPROM, flash, PCM (a kind of high-density phase-change memory), MRAM (Magnetic Random Access Memory, nonvolatile magnetic RAM), RRAM (Resistive Random Access Memory, resistive formula storer), FERAM (Ferroelectric Random Access Memory, random access memory), or also can be the NVM of other types.
Preferably, in the embodiment of the present invention, NVM203 can pass through DDRx (xth is for Double Data Rate synchronous DRAM) interface or LPDDRx (xth is for low-power consumption Double Data Rate synchronous DRAM) interface is connected with Memory Controller Hub 202.
In the embodiment of the present invention, described first instruction, when receiving the first instruction, can be sent to Memory Controller Hub 202 by processor 201, and such as described first instruction may be used for process first data.Memory Controller Hub 202, after receiving described first instruction, can perform described first instruction, described first data is processed in NVM203.
That is, Memory Controller Hub 202 receive processor 201 send for the treatment of the first instruction of the first data after, described first instruction can be performed, in NVM203, described first data are processed.
In the embodiment of the present invention, described first data being processed in NVM203, can be point in NVM203 to write described first data, or also can refer to read described first data from NVM203.
In the embodiment of the present invention, the connected mode of NVM203 is similar to internal memory.Refer to Fig. 3, the DRAM301 in Fig. 3 represents internal memory.As can be seen from Figure 3, the connected mode of NVM203 is identical with internal memory substantially.That is, when to NVM203 process, processing mode can be similar to internal memory.Represent Memory Controller Hub 202 with Memory Controller in Fig. 3, represent processor 201 with CPU.
I/O Controller302 in Fig. 3 is connected with Storage Controller303, and Storage Controller303 and Disk304 is connected.Wherein, I/O Controller302 is outside i/o controller, and Storage Controller303 is memory controller, may be used for controlling hard disk, and Disk304 represents hard disk.That is, the connected mode of as can be seen from Figure 3 internal memory, hard disk and NVM203.In figure 3 can be very clear, although NVM203 is as External memory equipment, its connected mode can be similar to internal memory.
As can be seen from Fig. 3 also, after processor 201 receives instruction, if this instruction is for NVM203, so this instruction can be sent to Memory Controller Hub 202 by processor 201, this instruction directly can be sent to NVM203 by Memory Controller Hub 202, can process after NVM203 receives this instruction.
And after processor 201 receives instruction, if this instruction is for Disk304, so processor 201 needs first this instruction to be sent to I/O Controller302, this instruction is sent to Storage Controller303 by I/O Controller302 again, Storage Controller303 is after receiving this instruction, again this instruction is sent to Disk304 process, middle transmitting step is obviously more than to transmitting step during NVM203 transfer instruction, and processing speed is obviously slower.
Visible, after adopting the connected mode in the embodiment of the present invention, if will read and write data in NVM203, read or write speed can obviously be accelerated.
In the embodiment of the present invention, because the connected mode of NVM203 is similar to internal memory, so, also can direct working procedure in NVM203.
Such as, in the prior art, can be provided with the first application program in common hard disc, such as this common hard disc is disk.So, when wanting to run described first application program, need just can run after the data-moving with described first application program of operation is in internal memory.
And such as, in the embodiment of the present invention, the first application program can be installed in NVM203, so naturally store all data relevant to described first application program in NVM203.And in the embodiment of the present invention, the connected mode of NVM203 is similar to internal memory, when wanting to run described first application program, without the need to moving, directly described first application program can be run in NVM203.
Can see, after adopting the connected mode in the embodiment of the present invention, the speed run application also can be accelerated, obviously improve the efficiency of routine processes, concerning user, the response speed of described electronic equipment can improve, the stand-by period of user is shorter, also can be better to the experience of user.
In the embodiment of the present invention, Memory Controller Hub 202 may be used for by first instruction of VFS acquisition for the treatment of the first data; According to described first instruction calls first file system; By described first file system, described first data are processed in NVM203 according to described first instruction.
In the embodiment of the present invention, Memory Controller Hub 202 may be used for, according to described first instruction calls first file system, specifically can comprising: determine described first instruction for memory device be NVM203; Call described first file system corresponding with NVM203.
In the embodiment of the present invention, Memory Controller Hub 202 may be used for by described first file system, described first data are processed in NVM203 according to described first instruction, specifically can comprise: by described first file system, in NVM203, write described first data according to described first instruction; Or, by described first file system, from NVM203, read described first data according to described first instruction.
In the embodiment of the present invention, Memory Controller Hub 202 can also be used for M the sub-storage areas determining to write data; Determine N number of first source region that a described M sub-storage areas is corresponding; According to N number of second source region information of M sub-storage areas information acquisition after described M sub-storage areas write data; By N number of second source region of described N number of second source region information write; Be point to N number of second pointer of described N number of second source region by pointing to N number of first pointer modified of described N number of first source region.
Embodiment two
Refer to Fig. 4, the embodiment of the present invention provides a kind of information processing method, described method can be applied to electronic equipment, the NVM203 that described electronic equipment can have Memory Controller Hub 202, the processor 201 be connected with Memory Controller Hub 202 and be connected with Memory Controller Hub 202.Preferably, the described electronic equipment in embodiment one and the described electronic equipment in embodiment two can be same electronic equipments.The main flow of described method can be as follows:
Step 401: obtain the first instruction for the treatment of the first data by Virtual File System VFS.
In the embodiment of the present invention, the human-computer interaction interface that user can be provided by described electronic equipment sends described first instruction to described electronic equipment, described electronic equipment can obtain described first instruction by described VFS, because multiple file system may be had in described electronic equipment, each file system may correspond to different memory devices, therefore needs VFS and carrys out these file system of unified management.
After described first instruction of acquisition, which file system what described VFS can judge the concrete correspondence of described first instruction is, that is, after described first instruction of acquisition, described VFS can judge which memory device described first instruction specifically corresponds to.
Step 402: according to described first instruction calls first file system.
Such as, if described VFS judge to determine described first instruction corresponding be NVM203, and file system corresponding to NVM203 is described first file system, so described electronic equipment can call described first file system according to described first instruction, to process described first instruction by described first file system.
In the embodiment of the present invention, can first determine described first instruction for memory device be NVM203, and then can determine that the file system corresponding to NVM203 is described first file system, thus described first file system can be called.
In the embodiment of the present invention, described first file system can be special in the file system designed by NVM203, such as described first file system can be NVMFS (Nonvolatile memory File Storage, non-volatile memory file system).
As can see from Figure 1, if employing generic file system, the such as file system such as Ext2 file system or Btrfs, it is such as Ext2 file system, so instruction will transfer to Ext2 from VFS, this instruction will be sent to Generic Block Layer layer and process by Ext2, completes this instruction more afterwards by Device Driver (hardware driving) driving N VM.
And in the embodiment of the present invention, this file system of NVMFS for NVM203 specialized designs as shown in Figure 5, is software architecture figure relevant with NVM in electronic equipment in the embodiment of the present invention.
As can see from Figure 5, in the embodiment of the present invention, described first instruction transfers to NVMFS from VFS, NVMFS is after receiving described first instruction, can directly by described first command to NVM203 process because NVM203 can be similar to internal memory, the same step-by-step is read, without the need to through Generic B1ock Layer layer and Device Driver therefore, the transmitting step of instruction is less, and the transmission time can shorten.
So, when sending instruction to process data to NVM203, when instruction is sent to described first file system from described VFS, described first file system (page cache (caching of page) mechanism when namely reading and writing data in hard disk in prior art) is sent to again without the need to carry out buffer memory in internal memory after, but directly can send to described first file system from described VFS, thus the transmission time of instruction can be shortened, improve instruction processing efficiency, more can embody the fast advantage of NVM203 read or write speed.
Step 403: by described first file system, processes described first data in described NVM203 according to described first instruction.
In the embodiment of the present invention, can be processed described first data in NVM203 by described first file system.
In the embodiment of the present invention, processing in described NVM203 to described first data, can be point in NVM203 to write described first data, or also can refer to read described first data from NVM203.
In the embodiment of the present invention, the minimum memory unit in NVM203 can be page (page).Can safeguard a root directory in NVMFS, can comprise father node and multistage child node under described root directory, NVMFS can by described root directory read data or write data in NVM203 in NVM203.
In the embodiment of the present invention, a page for store data can be called a sub-storage areas, for store data descriptor (i.e. source data) can be called a source region.
Wherein, in every grade of node of described root directory, first have a source region and store source data, the data message that source data stores under may be used for describing this grade of node.Can include multiple source data in described root directory, such as, minimum can have corresponding source data to each file.
In the embodiment of the present invention, can have oneself corresponding source data by such as each page, this source data also correspondingly can be regarded as and is stored in a page.
When searching concrete data, can be the source data first finding these data corresponding, corresponding data can be found according to the descriptor in source data afterwards.
In the embodiment of the present invention, if corresponding data have amendment, such as in a page, be written with data, the source data that so this page is corresponding also needs to modify, otherwise may make mistakes when searching corresponding data.
In the embodiment of the present invention, each page for storing data can a corresponding sub-storage areas information, and each source region also can a corresponding source region information.
In the embodiment of the present invention, if write described first data according to described first instruction in NVM203, such as the page described first data are written with in NVM203, so after described first data of write, the first subpool domain information that a described page is corresponding just there occurs change, first source region information of the first source region now just needing amendment corresponding with a described page, amended described first source region information can be called the second source region information.
A blank page can be picked up as new source region in the embodiment of the present invention, this new source region can be called the second source region, can by described second source region of described second source region information write, after by described second source region of described second source region information write, original the first pointer pointing to described first source region can be revised, the second pointer pointing to described second source region can be revised as, that is, when searching, described second source region can be found, and described first source region can not be found again, thus can avoid makeing mistakes.
Because the reading and writing of the NVM203 in the embodiment of the present invention, the total degree of wiping have the upper limit, if and adopt writing of each metadata of daily record of the prior art (journaling) log mechanism all can first will amendment partial write daily record, again amendment partial write is needed the address of write, more than once ablation process, can affect the life-span of NVM.Adopt this mode in the embodiment of the present invention can avoid the life-span having influence on NVM203 as far as possible.
This alter mode in the embodiment of the present invention can be called Shadow paging (window page) mode.
On the whole, in the embodiment of the present invention, after writing data according to described first instruction in described NVM, can also comprise: M the sub-storage areas determining to write data, in other words, the data of write not only may correspond to a page.After determining a described M sub-storage areas, N number of first source region that a described M sub-storage areas is corresponding can be determined, because may not be the corresponding source data of each page, multiple page may be had and exist corresponding to the situation of a source data.After determining described N number of first source region, can according to N number of second source region information of M sub-storage areas information acquisition after described M sub-storage areas write data, wherein, a described M sub-storage areas is before write data, correspond to M the first subpool domain information altogether, a described M sub-storage areas after writing the data, correspond to M the second subpool domain information altogether, that is described N number of second source region information can be obtained according to described M the second subpool domain information, after described N number of second source region information of acquisition, can by N number of second source region of described N number of second source region information write, be point to N number of second pointer of described N number of second source region by pointing to N number of first pointer modified of described N number of first source region.Wherein, described N number of second source region can be newly assigned N number of source region, and described N number of second source region can be white space before described N number of second source region information of write.
Introduce the information processing method in the present invention below by way of several specific embodiment, the following examples mainly describe several possible application scenarios of described method.It should be noted that, the following examples only for explaining the present invention, and can not be used for limiting the present invention.Every embodiment meeting inventive concept is all within protection scope of the present invention.
Embodiment two
Described electronic equipment is PC.
Described electronic equipment can have display unit, described electronic equipment can provide a personal-machine interactive interface by described display unit to user, the human-computer interaction interface that user can be provided by described electronic equipment sends the first instruction to described electronic equipment, and described first instruction may be used for reading first data.Described electronic equipment can obtain described first instruction by described VFS.
After described first instruction of acquisition, which file system what described VFS can judge the concrete correspondence of described first instruction is, that is, after described first instruction of acquisition, described VFS can judge which memory device described first instruction specifically corresponds to.
If described VFS judge to determine described first instruction corresponding be NVM203, and file system corresponding to NVM203 is described first file system, so described electronic equipment can call described first file system according to described first instruction, to process described first instruction by described first file system.
In the embodiment of the present invention, described first file system can be special in the NVMFS designed by NVM203.
As can see from Figure 5, in the embodiment of the present invention, described first instruction transfers to NVMFS from VFS, NVMFS is after receiving described first instruction, can directly by described first command to NVM203 process because NVM203 can be similar to internal memory, the same step-by-step is read, without the need to through Generic Block Layer layer and Device Driver therefore, the transmitting step of instruction is less, and the transmission time can shorten.
So, when sending instruction to process data to NVM203, when instruction is sent to described first file system from described VFS, described first file system (page cache (caching of page) mechanism when namely reading and writing data in hard disk in prior art) is sent to again without the need to carry out buffer memory in internal memory after, but directly can send to described first file system from described VFS, thus the transmission time of instruction can be shortened, improve instruction processing efficiency, more can embody the fast advantage of NVM203 read or write speed.
In the embodiment of the present invention, described first data can be read by described first file system in NVM203.
Embodiment three
Described electronic equipment is PAD.
Described electronic equipment can have display unit, described electronic equipment can provide a personal-machine interactive interface by described display unit to user, the human-computer interaction interface that user can be provided by described electronic equipment sends the first instruction to described electronic equipment, and described first instruction may be used for write first data.Described electronic equipment can obtain described first instruction by described VFS.
After described first instruction of acquisition, which file system what described VFS can judge the concrete correspondence of described first instruction is, that is, after described first instruction of acquisition, described VFS can judge which memory device described first instruction specifically corresponds to.
If described VFS judge to determine described first instruction corresponding be NVM203, and file system corresponding to NVM203 is described first file system, so described electronic equipment can call described first file system according to described first instruction, to process described first instruction by described first file system.
In the embodiment of the present invention, described first file system can be special in the NVMFS designed by NVM203.
As can see from Figure 5, in the embodiment of the present invention, described first instruction transfers to NVMFS from VFS, NVMFS is after receiving described first instruction, can directly by described first command to NVM203 process because NVM203 can be similar to internal memory, the same step-by-step is read, without the need to through Generic Block Layer layer and Device Driver therefore, the transmitting step of instruction is less, and the transmission time can shorten.
So, when sending instruction to process data to NVM203, when instruction is sent to described first file system from described VFS, described first file system (page cache (caching of page) mechanism when namely reading and writing data in hard disk in prior art) is sent to again without the need to carry out buffer memory in internal memory after, but directly can send to described first file system from described VFS, thus the transmission time of instruction can be shortened, improve instruction processing efficiency, more can embody the fast advantage of NVM203 read or write speed.
In the embodiment of the present invention, described first data can be write by described first file system in NVM203.
In the embodiment of the present invention, can safeguard a root directory in NVMFS, can comprise father node and multistage child node under described root directory, NVMFS can by described root directory read data or write data in NVM203 in NVM203.
In the embodiment of the present invention, a page for store data can be called a sub-storage areas, for store data
Descriptor (i.e. source data) can be called a source region.
In the embodiment of the present invention, if corresponding data have amendment, such as in a page, be written with data, the source data that so this page is corresponding also needs to modify, otherwise may make mistakes when searching corresponding data.
In the embodiment of the present invention, in NVM203, write described first data according to described first instruction, such as the page described first data are written with in NVM203, so after described first data of write, the first subpool domain information that a described page is corresponding just there occurs change, first source region information of the first source region now just needing amendment corresponding with a described page, amended described first source region information can be called the second source region information.
A blank page can be picked up as new source region in the embodiment of the present invention, this new source region can be called the second source region, can by described second source region of described second source region information write, after by described second source region of described second source region information write, original the first pointer pointing to described first source region can be revised, the second pointer pointing to described second source region can be revised as, that is, when searching, described second source region can be found, and described first source region can not be found again, thus can avoid makeing mistakes.
Because the reading and writing of the NVM203 in the embodiment of the present invention, the total degree of wiping have the upper limit, if and adopt writing of each metadata of daily record of the prior art (journaling) log mechanism all can first will amendment partial write daily record, again amendment partial write is needed the address of write, more than once ablation process, can affect the life-span of NVM.Adopt this mode in the embodiment of the present invention can avoid the life-span having influence on NVM203 as far as possible.
Electronic equipment in the embodiment of the present invention can comprise: processor 201; The Memory Controller Hub 202 be connected with described processor 201; NVM203, is connected with described Memory Controller Hub 202; Wherein, described NVM203 receive described Memory Controller Hub 202 send for the treatment of the first instruction of the first data after, described first instruction can be performed, described first data are processed.
In the embodiment of the present invention, described NVM203 is directly connected to described processor 201 by described Memory Controller Hub 202, so, described Memory Controller Hub 202 just can directly control described NVM203, can regard as similarly, adopt the mode similar with internal memory to be connected described NVM203 in the embodiment of the present invention, thus when reading and writing data in described NVM203, without the need to as in prior art, want after sending instruction first in internal memory, to carry out buffer memory, instruction afterwards just can arrive hard disk, in the embodiment of the present invention, instruction directly can arrive NVM203, therefore, it is possible to shorten the transmission time of instruction, improve instruction processing efficiency, also can give play to the fast advantage of NVM203 read or write speed as far as possible.
Those skilled in the art can be well understood to, for convenience and simplicity of description, only be illustrated with the division of above-mentioned each functional module, in practical application, can distribute as required and by above-mentioned functions and be completed by different functional modules, inner structure by device is divided into different functional modules, to complete all or part of function described above.The system of foregoing description, the specific works process of device and unit, with reference to the corresponding process in preceding method embodiment, can not repeat them here.
In several embodiments that the application provides, should be understood that, disclosed system, apparatus and method, can realize by another way.Such as, device embodiment described above is only schematic, such as, the division of described module or unit, be only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, and the indirect coupling of device or unit or communication connection can be electrical, machinery or other form.
The described unit illustrated as separating component or can may not be and physically separates, and the parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of unit wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.
In addition, each functional unit in each embodiment of the application can be integrated in a processing unit, also can be that the independent physics of unit exists, also can two or more unit in a unit integrated.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form of SFU software functional unit also can be adopted to realize.
If described integrated unit using the form of SFU software functional unit realize and as independently production marketing or use time, can be stored in a computer read/write memory medium.Based on such understanding, the part that the technical scheme of the application contributes to prior art in essence in other words or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network equipment etc.) or processor (processor) perform all or part of step of method described in each embodiment of the application.And aforesaid storage medium comprises: USB flash disk, portable hard drive, ROM (read-only memory) (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD etc. various can be program code stored medium.
The above, above embodiment is only in order to be described in detail the technical scheme of the application, but the explanation of above embodiment just understands method of the present invention and core concept thereof for helping, and should not be construed as limitation of the present invention.Those skilled in the art are in the technical scope that the present invention discloses, and the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.
Claims (10)
1. an electronic equipment, is characterized in that, described electronic equipment comprises:
Processor;
The Memory Controller Hub be connected with described processor;
Nonvolatile memory NVM, is connected with described Memory Controller Hub;
Wherein, described Memory Controller Hub receive described processor send for the treatment of the first instruction of the first data after, described first instruction can be performed, in described NVM, described first data are processed.
2. electronic equipment as claimed in claim 1, it is characterized in that, described NVM is connected with described Memory Controller Hub for low-power consumption Double Data Rate synchronous DRAM LPDDRx interface for Double Data Rate synchronous DRAM DDRx interface or xth by xth.
3. electronic equipment as claimed in claim 1 or 2, it is characterized in that, it is characterized in that, described Memory Controller Hub is used for: obtain the first instruction for the treatment of the first data by Virtual File System VFS; According to described first instruction calls first file system; By described first file system, described first data are processed in described NVM according to described first instruction.
4. electronic equipment as claimed in claim 3, is characterized in that, described Memory Controller Hub is used for according to described first instruction calls first file system, specifically comprises: determine described first instruction for memory device be described NVM; Call described first file system corresponding with described NVM.
5. electronic equipment as claimed in claim 3, it is characterized in that, described Memory Controller Hub is used for by described first file system, described first data are processed in described NVM according to described first instruction, specifically comprise: by described first file system, in described NVM, write described first data according to described first instruction; Or, by described first file system, from described NVM, read described first data according to described first instruction.
6. electronic equipment as claimed in claim 5, is characterized in that, described Memory Controller Hub also for: determine M the sub-storage areas writing data; Determine N number of first source region that a described M sub-storage areas is corresponding; According to N number of second source region information of M sub-storage areas information acquisition after described M sub-storage areas write data; By N number of second source region of described N number of second source region information write; Be point to N number of second pointer of described N number of second source region by pointing to N number of first pointer modified of described N number of first source region.
7. an information processing method, is applied to electronic equipment, it is characterized in that, described electronic equipment has Memory Controller Hub, the processor be connected with described Memory Controller Hub, and the NVM be connected with described Memory Controller Hub, said method comprising the steps of:
The first instruction for the treatment of the first data is obtained by Virtual File System VFS;
According to described first instruction calls first file system;
By described first file system, described first data are processed in described NVM according to described first instruction.
8. method as claimed in claim 7, it is characterized in that, the step according to described first instruction calls first file system comprises:
Determine described first instruction for memory device be described NVM;
Call described first file system corresponding with described NVM.
9. method as claimed in claim 7, is characterized in that, by described first file system, comprise according to described first instruction in described NVM to the step that described first data process:
By described first file system, in described NVM, write described first data according to described first instruction; Or
By described first file system, from described NVM, read described first data according to described first instruction.
10. method as claimed in claim 9, is characterized in that, after writing data according to described first instruction in described NVM, also comprise step:
Determine M the sub-storage areas writing data;
Determine N number of first source region that a described M sub-storage areas is corresponding;
According to N number of second source region information of M sub-storage areas information acquisition after described M sub-storage areas write data;
By N number of second source region of described N number of second source region information write;
Be point to N number of second pointer of described N number of second source region by pointing to N number of first pointer modified of described N number of first source region.
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Application publication date: 20141224 |