CN104218536A - Rechargeable battery protector - Google Patents

Rechargeable battery protector Download PDF

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Publication number
CN104218536A
CN104218536A CN201310205329.7A CN201310205329A CN104218536A CN 104218536 A CN104218536 A CN 104218536A CN 201310205329 A CN201310205329 A CN 201310205329A CN 104218536 A CN104218536 A CN 104218536A
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China
Prior art keywords
port
detector
voltage
circuit
current
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CN201310205329.7A
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Chinese (zh)
Inventor
黄乘黄
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Ricoh Microelectronics Co Ltd
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Ricoh Co Ltd
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Priority to CN201310205329.7A priority Critical patent/CN104218536A/en
Publication of CN104218536A publication Critical patent/CN104218536A/en
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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention discloses a rechargeable battery protector, which has an over-charge detection and protection function, an over-discharge detection and protection function, a discharge overcurrent detection and protection function, a discharge overcurrent protection and reset function, a charge overcurrent detection and protection function, a delay shortening function and a charge overcurrent detection, protection and reset function, and has a very good protection effect on a rechargeable battery. According to the rechargeable battery protector, by adding the charge overcurrent detection, protection and reset function, testing procedures for a battery pack are reduced, the production period is shortened and the test cost is reduced.

Description

Rechargeable battery protector
Technical field
The present invention relates to a kind of rechargeable battery protector for rechargeable battery, especially, the present invention relates to a kind of rechargeable battery protector with charge over-current protection reset function.
Background technology
There is in rechargeable battery protector protection IC.In traditional protection IC, after charge over-current protection, differ remove this protection surely by removing charger.This is because current detecting port V_ is in nondeterministic statement.Traditional way adds load, and that determines to V_ port one protects threshold value V higher than charge over-current dET4voltage after, just can remove charge over-current protection.This way all produces inconvenience to using and testing link of terminal use.
For terminal use, the under-voltage protection threshold value that battery is stopped power supply to load is generally higher than the over threshold value V of battery protection ic dET2.Such as in mobile phone, if V dET2for 2.3V, cell voltage during mobile phone shutdown is general still higher than 3V.If user now uses an abnormal charger to charging mobile phone battery; abnormal charging current causes power brick internal protection IC action to there occurs charge over-current protection; then to charge stopping, due to now V_ pin control by charger negative terminal voltage, so charge over-current protection continues.When charger removes by user, V_ voltage becomes uncertain state, if this uncertain state voltage is still lower than V dET4, then charge over-current protection still cannot discharge.Now user can expect power brick to connect load, then start is looked at.But because power brick voltage is less than normal boot-strap voltage, so mobile phone also cannot normal boot-strap, the determination level state can removing charge over-current protection to V_ port one can not be ensured.In this case, power brick can not be charged and can not be discharged, and will become dead bag.
For test link, after testing charge over-current protection, still need, by powering up to V_ port or removing charge over-current protection to the loaded method of load end, to make power brick return to normal condition, so that lower one test step.Not only increase workload and cost, and to power up or in loaded operating process, machine electrostatic or static electricity on human body cause the probability of damage to add to protector to V_ port.
Summary of the invention
The technical problem solved
The object of the invention is to solve in prior art; after charge over-current protection; if charger recovers normal or charger is removed, still cannot automatically terminate charge over-current protection, and need manually to power up to V_ port or to the loaded problem of load end.Because this not only adds workload and cost, and to power up or in loaded operating process, machine electrostatic or static electricity on human body cause the probability of damage to add to protector to V_ port.
Technical scheme
A kind of rechargeable battery protector, comprising: V dDport, is connected with rechargeable battery positive pole via resistance R1; V sSport, V sSport is connected with negative electrode of rechargeable batteries, and V sSport ground connection; D oUTport, is connected with discharge loop switch DFET; C oUTport, is connected with charge circuit switch CFET; V_ port, is connected with the negative terminal of external circuits via resistance R2, wherein, and the one end of flowing out from external load when the negative terminal of external circuits is rechargeable battery electric discharge, or the negative power end being charger charger when charging to rechargeable battery; Relative reference voltage generating unit 2, one end of this relative reference voltage generating unit 2 and V dDport is connected, the other end and V sSport is connected, and exports overcharge respectively and detects relative reference voltage and overdischarge detection relative reference voltage; First fixed reference potential generation unit 3, one end of this first fixed reference potential generation unit 3 and V sSport is connected, and the other end of this first fixed reference potential generation unit 3 exports overcharge detection threshold threshold voltage V respectively dET1with overdischarge detection threshold voltage V dET2; Second fixed reference potential generation unit 4, one end of this second fixed reference potential generation unit 4 and V sSport is connected, and the other end of this second fixed reference potential generation unit 4 exports discharge over-current detection threshold voltage V dET3; One end of 3rd fixed reference potential generation unit the 5, three fixed reference potential generation unit 5 is connected with V_ port, and the other end of the 3rd fixed reference potential generation unit 5 exports charge over-current detection threshold voltage V dET4; Overcharge detector VD1, one end in the input of this overcharge detector VD1 receives the overcharge detection relative reference voltage that relative reference voltage generating unit 2 exports, and the other end in the input of overcharge detector VD1 receives the overcharge detection threshold voltage V exported in the other end of the first fixed reference potential generation unit 3 dET1; Overdischarge detector VD2, one end in the input of this overdischarge detector VD2 receives the overdischarge detection relative reference voltage that relative reference voltage generating unit 2 exports, and the other end in the input of overdischarge detector VD2 receives the overdischarge detection threshold voltage V exported in the other end of the first fixed reference potential generation unit 3 dET2; Discharge over-current detector VD3, one end in the input of this discharge over-current detector VD3 is connected with V_ port, and the other end in the input of discharge over-current detector VD3 and the second fixed reference potential generation unit 4 export discharge over-current detection threshold voltage V dET3the other end be connected; Charge overcurrent detector VD4, the one end in the input of this charge overcurrent detector VD4 and V sSport is connected, and the other end in the input of this charge overcurrent detector VD4 and the 3rd fixed reference potential generation unit 5 export charge over-current detection threshold voltage V dET4the other end be connected; Load short circuits detector 6, the input of this load short circuits detector 6 is connected with V_ port; First logical block 7, comprise recharge logic circuit 8 and level translator 9, the first end of recharge logic circuit 8 is connected with the output of overcharge detector VD1, second end of recharge logic circuit 8 is connected with the output of charge overcurrent detector VD4,4th end of recharge logic circuit 8 is connected with the first end of level translator 9, the second end of level translator 9 and C oUTport is connected; Second logical block 10, comprise electric discharge logical circuit 11 and delay circuit 12, the first end of electric discharge logical circuit 11 is connected with the output of overdischarge detector VD2, second end of electric discharge logical circuit 11 is connected with the output of discharge over-current detector VD3,3rd end of electric discharge logical circuit 11 is connected with load short circuits detector 6 via delay circuit 12, the five terminal of electric discharge logical circuit 11 and D oUTport is connected; Delay decrease circuit 13, the second end of delay decrease circuit 13 is connected with V_ port; Oscillator 14 sum counter 15, the first end of oscillator 14, the second end, the 3rd end and the 4th end are connected with the output of overcharge detector VD1, the output of overdischarge detector VD2, the output of discharge over-current detector VD3, the output of charge overcurrent detector VD4 respectively, 6th end of oscillator 14 is connected with the first end of delay decrease circuit 13, the five terminal of oscillator 14 is connected with the first end of counter 15, and the second end of counter 15 is connected with the 4th end of the logical circuit 11 that discharges with the 3rd end of recharge logic circuit 8 respectively with the 3rd end; Discharge over-current protection reset unit 16, the grid comprising FET switch N1 and resistance R3, FET switch N1 is connected with the output of electric discharge logical circuit 11, the source electrode of FET switch N1 and V sSport is connected, and the drain electrode of FET switch N1 is connected with one end of resistance R3, and the other end of resistance R3 is connected with V_ port; Charge over-current protection reset unit 17, the grid comprising FET switch P1 and resistance R4, FET switch P1 is connected with the output of level translator 9, the source electrode of FET switch P1 and V dDport is connected, and the drain electrode of FET switch P1 is connected with one end of resistance R4, and the other end of resistance R4 is connected with V_ port.
Overcharge detector VD1 detects the overcharge detection threshold voltage V of relative reference voltage and the generation of the first fixed reference potential generation unit 3 according to the overcharge that relative reference voltage generating unit 2 produces dET1value, detect the voltage swing of rechargeable battery when charging, when overcharge detects relative reference voltage higher than overcharge detection threshold voltage V dET1, start oscillator 14 sum counter 15, and after arriving corresponding delay time, rechargeable battery protector, under the effect of recharge logic circuit 8 and level translation device 9, enters additives for overcharge protection state, C oUTport becomes low level, and charge circuit MOS switch is turned off; Overdischarge detector VD2 detects the overdischarge detection threshold voltage V of relative reference voltage and the generation of the first fixed reference potential generation unit 3 according to the overdischarge that relative reference voltage generating unit 2 produces dET2value, detect rechargeable battery discharge time voltage swing, served as discharge examination relative reference voltage lower than overdischarge detection threshold voltage V dET2, after arriving corresponding delay time, rechargeable battery protector, under the effect of electric discharge logical circuit 11, enters over state, D oUTport becomes low level, and discharge loop MOS switch is turned off; The discharge over-current detection threshold voltage V that discharge over-current detector VD3 produces according to the voltage of V_ port and the second fixed reference potential generation unit 4 dET3, detect the size of current of rechargeable battery when discharging, when the voltage of V_ port is higher than discharge over-current detection threshold voltage V dET3, after arriving corresponding delay time, rechargeable battery protector, under the effect of the second logical block 10, enters discharge over-current guard mode, D oUTport becomes low level, and discharge loop MOS switch is turned off; Short circuit detector, according to the short-circuit detecting threshold voltage V that voltage and the second fixed reference potential generation unit 4 of V_ port produce short, detect the size of current of rechargeable battery when discharging, when the voltage of V_ port is higher than short circuit current detection threshold voltage V short, after arriving corresponding delay time, rechargeable battery protector, under the effect of the second logical block 10, enters short-circuit protection state, D oUTport becomes low level, and discharge loop MOS switch is turned off; The charge over-current detection threshold voltage V that charge overcurrent detector VD4 produces according to the voltage of V_ port and the 3rd fixed reference potential generation unit 5 dET4, detect the size of current of rechargeable battery when charging, when the voltage of V_ port is lower than charge over-current detection threshold voltage V dET4, after arriving corresponding delay time, rechargeable battery protector, under the effect of the first logical block 7, enters charge over-current guard mode, C oUTport becomes low level, and charge circuit MOS switch is turned off.
After rechargeable battery protector enters discharge overcurrent state; under the effect of the second logical block 10; FET switch N1 is opened; discharge over-current protection reset unit 16 is switched on; if external load is removed or external load recovers normal after FET switch N1 is opened; then under the effect of discharge over-current protection reset unit 16, the voltage of V_ port is pulled down to V by resistance R3 sSthe voltage of port, then D oUTport becomes high level, and discharge loop switch DFET is opened; After rechargeable battery protector enters charge overcurrent state; under the effect of the first logical block 7; FET switch P1 is opened; charge over-current protection reset unit 17 is switched on; if charger is removed or charger recovers normal after FET switch P1 is opened; then under the effect of charge over-current protection reset unit 17, the voltage of V_ port is pulled to V by resistance R4 dDthe voltage of port, then C oUTport becomes high level, and charge circuit switch CFET is opened.
A kind of rechargeable battery protector, comprising: V dDport, is connected with rechargeable battery positive pole via resistance R1; V sSport, this V sSport is connected with negative electrode of rechargeable batteries, and V sSport ground connection; D oUTport, is connected with discharge loop switch DFET; C oUTport, is connected with charge circuit switch CFET; V_ port, is connected with the negative terminal of external circuits via resistance R2, wherein, and the one end of flowing out from external load when the negative terminal of external circuits is rechargeable battery electric discharge, or the negative power end being charger charger when charging to rechargeable battery; Relative reference voltage generating unit 2, one end of this relative reference voltage generating unit 2 and V dDport is connected, the other end and V sSport is connected, and exports overcharge respectively and detects relative reference voltage and overdischarge detection relative reference voltage; First fixed reference potential generation unit 3, one end of this first fixed reference potential generation unit 3 and V sSport is connected, and the other end of this first fixed reference potential generation unit 3 exports overcharge detection threshold voltage V respectively dET1with overdischarge detection threshold voltage V dET2; Second fixed reference potential generation unit 4, one end of this second fixed reference potential generation unit 4 and V sSport is connected, and the other end of this second fixed reference potential generation unit 4 exports discharge over-current detection threshold voltage V dET3; One end of 3rd fixed reference potential generation unit the 5, three fixed reference potential generation unit 5 is connected with V_ port, and the other end of the 3rd fixed reference potential generation unit (5) exports charge over-current detection threshold voltage V dET4; Overcharge detector VD1, one end in the input of overcharge detector VD1 receives the overcharge detection relative reference voltage that relative reference voltage generating unit 2 exports, and the other end in the input of overcharge detector VD1 receives the overcharge detection threshold voltage V exported in the other end of the first fixed reference potential generation unit 3 dET1; Overdischarge detector VD2, one end in the input of this overdischarge detector VD2 receives the overdischarge detection relative reference voltage that relative reference voltage generating unit 2 exports, and the other end in the input of this overdischarge detector VD2 receives the overdischarge detection threshold voltage V exported in the other end of the first fixed reference potential generation unit 3 dET2; Discharge over-current detector VD3, one end in the input of this discharge over-current detector VD3 is connected with V_ port, and the other end in the input of this discharge over-current detector VD3 and the second fixed reference potential generation unit 4 export discharge over-current detection threshold voltage V dET3the other end be connected; Charge overcurrent detector VD4, the one end in the input of this charge overcurrent detector VD4 and V sSport is connected, and the other end in the input of this charge overcurrent detector VD4 and the 3rd fixed reference potential generation unit 5 export charge over-current detection threshold voltage V dET4the other end be connected; Load short circuits detector 6, the input of this load short circuits detector 6 is connected with V_ port; First logical block 7, comprise recharge logic circuit 8 and level translator 9, the first end of recharge logic circuit 8 is connected with the output of overcharge detector VD1, second end of recharge logic circuit 8 is connected with the output of charge overcurrent detector VD4,4th end of recharge logic circuit 8 is connected with the first end of level translator 9, the second end of level translator 9 and C oUTport is connected; Second logical block 10, comprise electric discharge logical circuit 11 and delay circuit 12, the first end of electric discharge logical circuit 11 is connected with the output of overdischarge detector VD2, second end of electric discharge logical circuit 11 is connected with the output of discharge over-current detector VD3,3rd end of electric discharge logical circuit 11 is connected with load short circuits detector 6 via delay circuit 12, the five terminal of electric discharge logical circuit 11 and D oUTport is connected; Delay decrease circuit 13, the second end of delay decrease circuit 13 is connected with V_ port; Oscillator 14 sum counter 15, the first end of oscillator 14, the second end, the 3rd end and the 4th end are connected with the output of overcharge detector VD1, the output of overdischarge detector VD2, the output of discharge over-current detector VD3, the output of charge overcurrent detector VD4 respectively, 6th end of oscillator 14 is connected with the first end of delay decrease circuit 13, the five terminal of oscillator 14 is connected with the first end of counter 15, and the second end of counter 15 is connected with the 4th end of the logical circuit 11 that discharges with the 3rd end of recharge logic circuit 8 respectively with the 3rd end; Discharge over-current protection reset unit 16, the grid comprising FET switch N1 and resistance R34 ', FET switch N1 is connected with the output of electric discharge logical circuit 11, the source electrode of FET switch N1 and V sSport is connected, and the drain electrode of FET switch N1 is connected with one end of resistance R34 ', and the other end of resistance R34 ' is connected with V_ port; Charge over-current protection reset unit 17, the grid comprising FET switch P1 and resistance R34 ', FET switch P1 is connected with the output of level translator 9, the source electrode of FET switch P1 and V dDport is connected, and the drain electrode of FET switch P1 is connected with one end of resistance R34 ', and the other end of resistance R34 ' is connected with V_ port.
Overcharge detects VD1 detects relative reference voltage and the generation of the first fixed reference potential generation unit 3 overcharge detection threshold voltage V according to the overcharge that relative reference voltage generating unit 2 produces dET1value, detect the voltage swing of rechargeable battery when charging, when overcharge detects relative reference voltage higher than overcharge detection threshold voltage V dET1, start oscillator 14 sum counter 15, and after arriving corresponding delay time, rechargeable battery protector, under the effect of recharge logic circuit 8 and level translation device 9, enters additives for overcharge protection state, C oUTport becomes low level, and charge circuit MOS switch is turned off; Overdischarge detects VD2 detects relative reference voltage and the generation of the first fixed reference potential generation unit 3 overdischarge detection threshold voltage V according to the overdischarge that relative reference voltage generating unit 2 produces dET2value, detect rechargeable battery discharge time voltage swing, served as discharge examination relative reference voltage lower than overdischarge detection threshold voltage V dET2, after arriving corresponding delay time, rechargeable battery protector, under the effect of electric discharge logical circuit 11, enters over state, D oUTport becomes low level, and discharge loop MOS switch is turned off; The discharge over-current detection threshold voltage V that discharge over-current detector VD3 produces according to the voltage of V_ port and the second fixed reference potential generation unit 4 dET3, detect the size of current of rechargeable battery when discharging, when the voltage of V_ port is higher than discharge over-current detection threshold voltage V dET3, after arriving corresponding delay time, rechargeable battery protector, under the effect of the second logical block 10, enters discharge over-current guard mode, D oUTport becomes low level, and discharge loop MOS switch is turned off; Short circuit detector, according to the short-circuit detecting threshold voltage V that voltage and the second fixed reference potential generation unit 4 of V_ port produce short, detect the size of current of rechargeable battery when discharging, when the voltage of V_ port is higher than short circuit current detection threshold voltage V short, after arriving corresponding delay time, rechargeable battery protector, under the effect of the second logical block 10, enters short-circuit protection state, D oUTport becomes low level, and discharge loop MOS switch is turned off; The charge over-current detection threshold voltage V that charge overcurrent detector VD4 produces according to the voltage of V_ port and the 3rd fixed reference potential generation unit 5 dET4, detect the size of current of rechargeable battery when charging, when the voltage of V_ port is lower than charge over-current detection threshold voltage V dET4, after arriving corresponding delay time, rechargeable battery protector, under the effect of the first logical block 7, enters charge over-current guard mode, C oUTport becomes low level, and charge circuit MOS switch is turned off.
After rechargeable battery protector enters discharge overcurrent state; under the effect of the second logical block 10; FET switch N1 is opened; discharge over-current protection reset unit 16 is switched on; if external load is removed or described external load recovers normal after FET switch N1 is opened; then under the effect of discharge over-current protection reset unit 16, the voltage of V_ port is pulled down to V by resistance R34 ' sSthe voltage of port, then D oUTport becomes high level, and discharge loop switch DFET is opened; After rechargeable battery protector enters charge overcurrent state; under the effect of the first logical block 7; FET switch P1 is opened; charge over-current protection reset unit 17 is switched on; if charger is removed or charger recovers normal after FET switch P1 is opened; then under the effect of charge over-current protection reset unit 17, the voltage of V_ port is pulled to V by resistance R34 ' dDthe voltage of port, then C oUTport becomes high level, and charge circuit switch CFET is opened.
Beneficial effect
The invention enables after charge over-current protection; if charger recovers normal or charger is removed; then automatic releasing charge over-current protection; and do not need manually give V_ port power up or give load end loading; this not only lowers workload and cost, and reduce and to power up or in loaded operating process, machine electrostatic or static electricity on human body cause the probability of damage to protector to V_ port.
Accompanying drawing explanation
The inside that Fig. 1 describes rechargeable battery protector of the prior art connects block diagram;
Fig. 2 describes the rough schematic view with the protection IC of charge over-current protection reset unit according to the first embodiment of the present invention;
Fig. 3 describes the rough schematic view with the protection IC of charge over-current protection reset unit according to a second embodiment of the present invention.
Embodiment
When describing the preferred embodiment shown in accompanying drawing, for the sake of clarity use concrete term.But the content disclosed in patent specification is not wanted to be confined to selected concrete term, and it will be appreciated that each concrete element comprises and allly has said function, operates in a similar fashion and obtain the technical equivalents of similar results.
Describe embodiments of the invention in detail below with reference to the accompanying drawings.
The inside that Fig. 1 describes rechargeable battery protector of the prior art connects block diagram.As shown in Figure 1, rechargeable battery protector has 6 pins, and namely 6 ports, comprising: V dDport, is connected with rechargeable battery positive pole via resistance R1; V sSport, this V sSport is connected with negative electrode of rechargeable batteries, and this V sSport ground connection; D oUTport, is connected with discharge loop MOS switch; C oUTport, is connected with charge circuit MOS switch; And V_ port, be connected with the negative terminal of external load terminal circuit via resistance R2.
As shown in Figure 1; this rechargeable battery protector has control IC part 1, comprises relative reference voltage generating unit 2, second fixed reference potential generation unit 4, the 3rd fixed reference potential generation unit 5, overcharge detector VD1, overdischarge detector VD2, discharge over-current detector VD3, charge overcurrent detector VD4, load short circuits detector 6, first logical block 7, second logical block 10, delay decrease circuit 13, oscillator 14 sum counter 15 and discharge over-current protection reset unit 16.
Below illustrate the annexation between above each several part.
Relative reference voltage generating unit 2 comprises resistance R5 and resistance R6, and resistance R5 and resistance R6 is connected in parallel on V dDpin and V sSbetween pin, the first fixed reference potential generation unit 3 is the minus earth of the direct voltage source of 0.1V, this direct voltage source.In the present invention, overcharge detector VD1, overdischarge detector VD2, discharge over-current detector VD3 and charge overcurrent detector VD4 are voltage comparator, and overcharge detection threshold voltage V dET1, overdischarge detection threshold voltage V dET2, discharge over-current detection threshold voltage V dET3with charge over-current detection threshold voltage V dET4be respectively 4V, 2V, 0.05V and-0.1V.In the present invention, V is connected at R5 apart from it sSthe position of its 1/40 length of one end of pin connects "-" input of R5 and overcharge detector, and "+" input of overcharge detector is connected with the positive pole of the direct voltage source of the first fixed reference potential generation unit 3; V is connected apart from it at R6 sSthe position of its 1/20 length of one end of pin connects "+" input of R6 and overdischarge detector, and "-" input of overdischarge detector is connected with the positive pole of the direct voltage source of the first fixed reference potential generation unit 3.
Second fixed reference potential generation unit 4 is the direct voltage source of 0.05V, this DC power cathode ground connection, and positive pole is connected with "+" input of discharge over-current detector VD3, and "-" input of discharge over-current detector VD3 is connected with V_ pin.
3rd fixed reference potential generation unit 5 is the direct voltage source of 0.1V, and this DC power cathode is connected with V_ pin, and positive pole is connected with "+" input of charge overcurrent detector VD4, "-" input end grounding of charge overcurrent detector VD4.
First logical block 7 comprises recharge logic circuit 8 and level translator 9, the port one of recharge logic circuit 8 is connected with the output of overcharge detector VD1, the port 2 of recharge logic circuit 8 is connected with the output of charge overcurrent detector VD4, the port 4 of recharge logic circuit 8 is connected with the port one of level translator 9, the port 2 of level translator 9 and C oUTport is connected, C oUTport is connected with the grid of charge circuit CFET switch.
Second logical block 10 comprises electric discharge logical circuit 11 and delay circuit 12, the port one of electric discharge logical circuit 11 is connected with the output of overdischarge detector VD2, the port 2 of electric discharge logical circuit 11 is connected with the output of discharge over-current detector VD3, the port 3 of electric discharge logical circuit 11 is connected with load short circuits detector 6 via delay circuit 12, the input of load short circuits detector 6 is connected with V_ pin, the port 5 of electric discharge logical circuit 11 and D oUTport is connected, D oUTport is connected with the grid of discharge loop CFET switch.
The port one of oscillator 14, port 2, port 3 and port 4 are connected with the output of overcharge detector VD1, the output of overdischarge detector VD2, the output of discharge over-current detector VD3, the output of charge overcurrent detector VD4 respectively, the port 6 of oscillator 14 is connected with the port one of delay decrease circuit 13, and the port 2 of delay decrease circuit 13 is connected with V_ port.The port 5 of oscillator 14 is connected with the port one of counter 15, and the port 2 of counter 15 is connected with the port 4 of the logical circuit 11 that discharges with the port 3 of recharge logic circuit 8 respectively with port 3.
The grid that discharge over-current protection reset unit 16 comprises FET switch N1 and resistance R3, FET switch N1 is connected with the output of discharge over-current detector VD3, the source electrode of FET switch N1 and V sSport is connected, and the drain electrode of FET switch N1 is connected with one end of resistance R3, and the other end of resistance R3 is connected with V_ port.
Below illustrate between above each several part is how to coordinate to realize overcharge detection defencive function, overdischarge detection defencive function, discharge over-current detection defencive function, discharge over-current protection reset function, charge over-current detection defencive function and delay decrease function.
[overcharge detects protection and removing function]
Additives for overcharge protection:
When charging the battery, V dDpin monitoring cell voltage.Work as V dDvoltage has exceeded overcharge detection threshold voltage V dET1time, VD1 exports saltus step and starts the delay circuit work of oscillator 14 sum counter 15 composition, after time delay exceedes additives for overcharge protection time delay tVdet1, and C oUTpin step-down level, the CFET switch of charge circuit is turned off.
The releasing of additives for overcharge protection:
Remove charger, connect load, work as V dDremove voltage and the duration of this state lower than overcharge to exceed overcharge and remove time delay tVrel1, C oUTpin will become high level again, CFET switch conduction, and additives for overcharge protection is removed.
[overdischarge detects protection and removing function]
During battery discharge, V dDpin monitoring cell voltage.Work as V dDvoltage is lower than overdischarge detection threshold voltage V dET2time, VD2 exports saltus step and starts the delay circuit work of oscillator 14 sum counter 15 composition, when time delay exceedes over time delay tVdet2, and D oUTpin step-down level, the DFET switch in controlled discharge loop is turned off.The releasing of over:
Remove load, connect charger, work as V dDremove voltage and the duration of this state higher than overdischarge to exceed overdischarge and remove time delay tVrel2, D oUTpin will become high level again, DFET switch conduction, and over is removed.
[discharge over-current detects protection and reset function]
Voltage V is detected when V_ pin voltage is greater than overcurrent dET3when being less than load short circuits detection voltage Vshort, discharge over-current detector VD3 works.When V_ pin voltage is greater than load short circuits detection voltage Vshort, load short circuits sensors work.Above mechanism finally makes D oUTpin step-down level, the discharge loop DFET switch of external control electric discharge is turned off.
At V_ pin and V sSbetween pin, have the discharge over-current protection reset unit 16 that built-in, comprise FET switch N1 and pull down resistor R3, this pull down resistor R3 is called as discharge over-current protection and removes resistance.The grid of FET switch N1 is connected with the output of electric discharge logical circuit 11, source electrode and V sSport is connected, and drains to be connected with one end of resistance R3, and the other end of resistance R3 is connected with V_ port.After discharge over-current or load short circuits being detected; under the effect of the second logical block 10; FET switch N1 is opened; discharge over-current protection reset unit 16 is switched on; if remove the factor causing discharge over-current or short circuit after FET switch N1 is opened, V_ pin voltage can be pulled low to V by built-in pull down resistor sSvoltage, D oUTpin becomes high level, thus makes discharge loop DFET switch automatically revert to conducting state.During usual state, FET switch N1 turns off, and namely this discharge over-current reset resistor circuit is turned off.Only have when discharge over-current or load short circuits being detected, the just conducting of this resistance circuit.
Therefore by disconnecting consumers, VD3 will automatically terminate discharge over-current protection.
[charge over-current detection defencive function]
When battery simultaneously can charge or discharge time, VD4 monitors the voltage of V_ pin.If the voltage of V_ pin becomes be less than or equal to charge over-current detection voltage V dET4.Therefore, charge overcurrent detector VD4 output low level is to recharge logic circuit 8, and then via level translator 9, output low level is to C oUT, C oUTexport and will become " low ", external charging loop CFET switch will be turned off.
First embodiment
The first embodiment of the present invention is described in detail below in conjunction with Fig. 2.Fig. 2 describes the rough schematic view with the protection IC of charge over-current protection reset unit according to the first embodiment of the present invention.In fig. 2, charge overcurrent detector VD4, recharge logic circuit 8 and level translator 9 etc. are reduced to charge over-current protection reset circuit.
In the first embodiment of the present invention, in the circuit of the rechargeable battery protector of prior art as described in Figure 1, add charging overcurrent protection reset unit, namely at V dDand increase between V_ port a route charging overcurrent protection signal controlling on widen resistive path, as shown in the novel circuit 1 in Fig. 2.
The charge over-current protection reset unit 17 added in the first embodiment of the present invention comprises FET switch P1 and pull-up resistor R4, and this resistance R4 is called as charge over-current protection and removes resistance.This resistance R4 is very large to make the charging current after charging overcurrent protection very little, such as 1 megaohm.Wherein, the charging current direction after charging overcurrent protection is as shown in the direction of arrow in Fig. 2.The grid of FET switch P1 is connected with the output of level translator, source electrode and V dDport is connected, and drains to be connected with one end of resistance R4, and the other end of resistance R4 is connected with V_ port.
After rechargeable battery protector enters charge over-current guard mode, under the effect of the first logical block 7, FET switch P1 is opened, and charge over-current protection reset unit 17 is switched on.Because resistance R4 is very large, this makes the pressure drop at now R2 two ends almost nil, thus makes the voltage of V_ port still be similar to the voltage of V_ port under normal charging condition, namely equal with charger negative terminal voltage.If charger is removed or charger recovers normal after FET switch P1 is opened, due to the pull-up effect of resistance R4, therefore the voltage rise of V_ port exceedes charging over-current detection voltage Vdet4, and that is, now V_ pin voltage can be drawn high to V by built-in pull-up resistor R4 dDvoltage (when charger is removed) or the voltage (when charger current is recovered normal) higher than Vdet4, C oUTport becomes high level, thus makes charge circuit CFET switch automatically revert to conducting state.During usual state, FET switch P1 turns off, and namely this charge over-current reset resistor circuit is turned off.Only have after charge over-current protection occurs, the just conducting of this resistance circuit.
Second embodiment
The first embodiment of the present invention is described in detail below in conjunction with Fig. 3.Fig. 3 describes the rough schematic view with the protection IC of charge over-current protection reset unit according to a second embodiment of the present invention.In figure 3, discharge over-current detector VD3, electric discharge logical circuit 11, charge overcurrent detector VD4, recharge logic circuit 8 and level translator 9 etc. are reduced to charge/discharge overcurrent protection reset circuit.
In the second embodiment of the present invention; in the circuit of the rechargeable battery protector of prior art as described in Figure 3; add charging overcurrent protection reset unit; and charge over-current in the pull down resistor R3 in discharge over-current protection reset circuit in prior art and the first embodiment of the present invention protected the pull-up resistor R4 in reset circuit to merge into an overcurrent protection to remove resistance R34 ', thus make circuit simpler.
In the second embodiment of the present invention, during usual state, FET switch P1 and N1 turns off.Only have after charge over-current protection occurs, FET switch P1 is opened, but FET switch N1 is still in off state; Only have after discharge over-current protection occurs, FET switch N1 is opened, but FET switch P1 is still in off state.
As shown in Figure 3, at V_ pin and V sSbetween pin, have the discharge over-current protection reset unit 16 that built-in, comprise FET switch N1 and resistance R34 ', this resistance R34 ' is called as overcurrent protection and removes resistance.The grid of FET switch N1 is connected with the output of electric discharge logical circuit 11, source electrode and V sSport is connected, and drain electrode is connected with one end of resistance R34 ', and the other end of resistance R34 ' is connected with V_ port.After discharge over-current or load short circuits being detected; under the effect of the second logical block 10; FET switch N1 is opened; discharge over-current protection reset unit 16 is switched on; if remove the factor causing discharge over-current or short circuit after FET switch N1 is opened, V_ pin voltage can be pulled low to V by under resistance R34 ' sSvoltage, D oUTpin becomes high level, thus makes discharge loop DFET switch automatically revert to conducting state.During usual state, FET switch N1 turns off, and namely this discharge over-current reset resistor circuit is turned off.Only have when discharge over-current or load short circuits being detected, the just conducting of this resistance circuit.
The charge over-current protection reset unit 17 added in the second embodiment of the present invention comprises FET switch P1 and overcurrent protection removes resistance R34 '.This resistance R34 ' is very large to make the charging current after charging overcurrent protection very little, such as 1 megaohm.Wherein, the charging current direction after charging overcurrent protection is as shown in the direction of arrow in Fig. 3.The grid of FET switch P1 is connected with the output of level translator 9, source electrode and V dDport is connected, and drain electrode is connected with one end of resistance R34 ', and the other end of resistance R34 ' is connected with V_ port.
After rechargeable battery protector enters charge over-current guard mode, under the effect of the first logical block 7, FET switch P1 is opened, and charge over-current protection reset unit 17 is switched on.Because resistance R34 ' is very large, this makes the pressure drop at now R2 two ends almost nil, thus makes the voltage of V_ port still be similar to the voltage of V_ port under normal charging condition, namely equal with charger negative terminal voltage.If charger is removed or charger recovers normal after FET switch P1 is opened, due to the pull-up effect of resistance R34, therefore the voltage rise of V_ port exceedes charging over-current detection voltage Vdet4, and that is, now V_ pin voltage can be drawn high to V by built-in resistor R34 dDvoltage (when charger is removed) or the voltage (when charger current is recovered normal) higher than Vdet4, C oUTport becomes high level, thus makes charge circuit CFET switch automatically revert to conducting state.During usual state, FET switch P1 turns off, and namely this charge over-current reset resistor circuit is turned off.Only have after charge over-current protection occurs, the just conducting of this resistance circuit.
Although the present invention discloses as above with preferred embodiment; but be not for limiting the present invention, any person of ordinary skill in the field, without departing from the spirit and scope of the present invention; can do a little change and retouching, what therefore protection scope of the present invention defined with claim is as the criterion.

Claims (6)

1. a rechargeable battery protector, is characterized in that, comprising:
V dDport, is connected with described rechargeable battery positive pole via resistance R1;
V sSport, described V sSport is connected with described negative electrode of rechargeable batteries, and described V sSport ground connection;
D oUTport, is connected with discharge loop switch (DFET);
C oUTport, is connected with charge circuit switch (CFET);
V_ port, be connected with the negative terminal of external circuits via resistance R2, wherein, the one end of flowing out from external load when the negative terminal of described external circuits is the electric discharge of described rechargeable battery, or be the negative power end of charger to described charger during described rechargeable battery charging;
Relative reference voltage generating unit, one end of described relative reference voltage generating unit and described V dDport is connected, the other end and described V sSport is connected, and exports overcharge respectively and detects relative reference voltage and overdischarge detection relative reference voltage;
First fixed reference potential generation unit, one end of described first fixed reference potential generation unit and described V sSport is connected, and the other end of described first fixed reference potential generation unit exports overcharge detection threshold threshold voltage (V respectively dET1) and overdischarge detection threshold voltage (V dET2);
Second fixed reference potential generation unit, one end of described second fixed reference potential generation unit and described V sSport is connected, and the other end of described second fixed reference potential generation unit exports discharge over-current detection threshold voltage (V dET3);
3rd fixed reference potential generation unit, one end of described 3rd fixed reference potential generation unit is connected with described V_ port, and the other end of described 3rd fixed reference potential generation unit exports charge over-current detection threshold voltage (V dET4);
Overcharge detector (VD1), one end in the input of described overcharge detector (VD1) receives the described overcharge detection relative reference voltage that described relative reference voltage generating unit exports, and the other end in the input of described overcharge detector (VD1) receives the overcharge detection threshold voltage (V exported in the other end of described first fixed reference potential generation unit dET1);
Overdischarge detector (VD2), one end in the input of described overdischarge detector (VD2) receives the described overdischarge detection relative reference voltage that described relative reference voltage generating unit exports, and the other end in the input of described overdischarge detector (VD2) receives the overdischarge detection threshold voltage (V exported in the other end of described first fixed reference potential generation unit dET2);
Discharge over-current detector (VD3), one end in the input of described discharge over-current detector (VD3) is connected with described V_ port, and the other end in the input of described discharge over-current detector (VD3) and described second fixed reference potential generation unit export discharge over-current detection threshold voltage (V dET3) the other end be connected;
Charge overcurrent detector (VD4), the one end in the input of described charge overcurrent detector (VD4) and described V sSport is connected, and the other end in the input of described charge overcurrent detector (VD4) and described 3rd fixed reference potential generation unit export charge over-current detection threshold voltage (V dET4) the other end be connected;
Load short circuits detector, the input of described load short circuits detector is connected with described V_ port;
First logical block, comprise recharge logic circuit and level translator, the first end of described recharge logic circuit is connected with the output of described overcharge detector (VD1), second end of described recharge logic circuit is connected with the output of described charge overcurrent detector (VD4), 4th end of described recharge logic circuit is connected with the first end of described level translator, the second end of described level translator and described C oUTport is connected;
Second logical block, comprise electric discharge logical circuit and delay circuit, the first end of described electric discharge logical circuit is connected with the output of described overdischarge detector (VD2), second end of described electric discharge logical circuit is connected with the output of described discharge over-current detector (VD3), 3rd end of described electric discharge logical circuit is connected with described load short circuits detector via delay circuit, the five terminal of described electric discharge logical circuit and described D oUTport is connected;
Delay decrease circuit, the second end of described delay decrease circuit is connected with described V_ port;
Oscillator sum counter, the first end of described oscillator, second end, 3rd end and the 4th end respectively with the output of described overcharge detector (VD1), the output of described overdischarge detector (VD2), the output of described discharge over-current detector (VD3), the output of described charge overcurrent detector (VD4) is connected, 6th end of described oscillator is connected with the first end of described delay decrease circuit, the five terminal of described oscillator is connected with the first end of described counter, second end of described counter is connected with the 4th end of described electric discharge logical circuit with the 3rd end of described recharge logic circuit respectively with the 3rd end,
Discharge over-current protection reset unit, comprise FET switch N1 and resistance R3, the grid of described FET switch N1 is connected with the output of described electric discharge logical circuit, the source electrode of described FET switch N1 and described V sSport is connected, and the drain electrode of described FET switch N1 is connected with one end of described resistance R3, and the other end of described resistance R3 is connected with described V_ port;
Charge over-current protection reset unit, comprise FET switch P1 and resistance R4, the grid of described FET switch P1 is connected with the output of described level translator, the source electrode of described FET switch P1 and described V dDport is connected, and the drain electrode of described FET switch P1 is connected with one end of described resistance R4, and the other end of described resistance R4 is connected with described V_ port.
2. rechargeable battery protector as claimed in claim 1, is characterized in that,
Described overcharge detector (VD1) detects the described overcharge detection threshold voltage (V of relative reference voltage and described first fixed reference potential generation unit generation according to the described overcharge that described relative reference voltage generating unit produces dET1) value, detect the voltage swing of rechargeable battery when charging, when described overcharge detects relative reference voltage higher than described overcharge detection threshold voltage (V dET1), start described oscillator and described counter, and after arriving corresponding delay time, described rechargeable battery protector, under the effect of described recharge logic circuit and described level translation device, enters additives for overcharge protection state, described C oUTport becomes low level, and described charge circuit MOS switch is turned off;
Described overdischarge detector (VD2) detects the described overdischarge detection threshold voltage (V of relative reference voltage and described first fixed reference potential generation unit generation according to the described overdischarge that described relative reference voltage generating unit produces dET2) value, detect the voltage swing of rechargeable battery when discharging, when described overdischarge detects relative reference voltage lower than described overdischarge detection threshold voltage (V dET2), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described electric discharge logical circuit, enters over state, described D oUTport becomes low level, and described discharge loop MOS switch is turned off;
The described discharge over-current detection threshold voltage (V that described discharge over-current detector (VD3) produces according to the voltage of described V_ port and described second fixed reference potential generation unit dET3), detect the size of current of rechargeable battery when discharging, when the voltage of described V_ port is higher than described discharge over-current detection threshold voltage (V dET3), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described second logical block, enters discharge over-current guard mode, described D oUTport becomes low level, and described discharge loop MOS switch is turned off;
Described short circuit detector, according to the short-circuit detecting threshold voltage (V that voltage and the described second fixed reference potential generation unit of described V_ port produce short), detect the size of current of rechargeable battery when discharging, when the voltage of described V_ port is higher than described short circuit current detection threshold voltage (V short), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described second logical block, enters short-circuit protection state, described D oUTport becomes low level, and described discharge loop MOS switch is turned off;
The described charge over-current detection threshold voltage (V that described charge overcurrent detector (VD4) produces according to the voltage of described V_ port and described 3rd fixed reference potential generation unit dET4), detect the size of current of rechargeable battery when charging, when the voltage of described V_ port is lower than described charge over-current detection threshold voltage (V dET4), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described first logical block, enters charge over-current guard mode, described C oUTport becomes low level, and described charge circuit MOS switch is turned off.
3. rechargeable battery protector as claimed in claim 2, is characterized in that,
After described rechargeable battery protector enters discharge overcurrent state; under the effect of described second logical block; described FET switch N1 is opened; described discharge over-current protection reset unit is switched on; if external load is removed or described external load recovers normal after described FET switch N1 is opened; then under the effect of described discharge over-current protection reset unit, the voltage of described V_ port is pulled down to described V by described resistance R3 sSthe voltage of port, then described D oUTport becomes high level, and described discharge loop switch (DFET) is opened;
After described rechargeable battery protector enters charge overcurrent state; under the effect of described first logical block; described FET switch P1 is opened; described charge over-current protection reset unit is switched on; if charger is removed or charger recovers normal after described FET switch P1 is opened; then under the effect of described charge over-current protection reset unit, the voltage of described V_ port is pulled to described V by described resistance R4 dDthe voltage of port, then described C oUTport becomes high level, and described charge circuit switch (CFET) is opened.
4. a rechargeable battery protector, is characterized in that, comprising:
V dDport, is connected with described rechargeable battery positive pole via resistance R1;
V sSport, described V sSport is connected with described negative electrode of rechargeable batteries, and described V sSport ground connection;
D oUTport, is connected with discharge loop switch (DFET);
C oUTport, is connected with charge circuit switch (CFET);
V_ port, be connected with the negative terminal of external circuits via resistance R2, wherein, the one end of flowing out from external load when the negative terminal of described external circuits is the electric discharge of described rechargeable battery, or be the negative power end of charger to described charger during described rechargeable battery charging;
Relative reference voltage generating unit, one end of described relative reference voltage generating unit and described V dDport is connected, the other end and described V sSport is connected, and exports overcharge respectively and detects relative reference voltage and overdischarge detection relative reference voltage;
First fixed reference potential generation unit, one end of described first fixed reference potential generation unit and described V sSport is connected, and the other end of described first fixed reference potential generation unit exports overcharge detection threshold voltage (V respectively dET1) and overdischarge detection threshold voltage (V dET2);
Second fixed reference potential generation unit, one end of described second fixed reference potential generation unit and described V sSport is connected, and the other end of described second fixed reference potential generation unit exports discharge over-current detection threshold voltage (V dET3);
3rd fixed reference potential generation unit, one end of described 3rd fixed reference potential generation unit is connected with described V_ port, and the other end of described 3rd fixed reference potential generation unit exports charge over-current detection threshold voltage (V dET4);
Overcharge detector (VD1), one end in the input of described overcharge detector (VD1) receives the described overcharge detection relative reference voltage that described relative reference voltage generating unit exports, and the other end in the input of described overcharge detector (VD1) receives the overcharge detection threshold voltage (V exported in the other end of described first fixed reference potential generation unit dET1);
Overdischarge detector (VD2), one end in the input of described overdischarge detector (VD2) receives the described overdischarge detection relative reference voltage that described relative reference voltage generating unit exports, and the other end in the input of described overdischarge detector (VD2) receives the overdischarge detection threshold voltage (V exported in the other end of described first fixed reference potential generation unit dET2);
Discharge over-current detector (VD3), one end in the input of described discharge over-current detector (VD3) is connected with described V_ port, and the other end in the input of described discharge over-current detector (VD3) and described second fixed reference potential generation unit export discharge over-current detection threshold voltage (V dET3) the other end be connected;
Charge overcurrent detector (VD4), the one end in the input of described charge overcurrent detector (VD4) and described V sSport is connected, and the other end in the input of described charge overcurrent detector (VD4) and described 3rd fixed reference potential generation unit export charge over-current detection threshold voltage (V dET4) the other end be connected;
Load short circuits detector, the input of described load short circuits detector is connected with described V_ port;
First logical block, comprise recharge logic circuit and level translator, the first end of described recharge logic circuit is connected with the output of described overcharge detector (VD1), second end of described recharge logic circuit is connected with the output of described charge overcurrent detector (VD4), 4th end of described recharge logic circuit is connected with the first end of described level translator, the second end of described level translator and described C oUTport is connected;
Second logical block, comprise electric discharge logical circuit and delay circuit, the first end of described electric discharge logical circuit is connected with the output of described overdischarge detector (VD2), second end of described electric discharge logical circuit is connected with the output of described discharge over-current detector (VD3), 3rd end of described electric discharge logical circuit is connected with described load short circuits detector via delay circuit, the five terminal of described electric discharge logical circuit and described D oUTport is connected;
Delay decrease circuit, the second end of described delay decrease circuit is connected with described V_ port;
Oscillator sum counter, the first end of described oscillator, second end, 3rd end and the 4th end respectively with the output of described overcharge detector (VD1), the output of described overdischarge detector (VD2), the output of described discharge over-current detector (VD3), the output of described charge overcurrent detector (VD4) is connected, 6th end of described oscillator is connected with the first end of described delay decrease circuit, the five terminal of described oscillator is connected with the first end of described counter, second end of described counter is connected with the 4th end of described electric discharge logical circuit with the 3rd end of described recharge logic circuit respectively with the 3rd end,
Discharge over-current protection reset unit, comprise FET switch N1 and resistance R34 ', the grid of described FET switch N1 is connected with the output of described electric discharge logical circuit, the source electrode of described FET switch N1 and described V sSport is connected, and the drain electrode of described FET switch N1 is connected with one end of described resistance R34 ', and the other end of described resistance R34 ' is connected with described V_ port;
Charge over-current protection reset unit, the grid comprising FET switch P1 and described resistance R34 ', described FET switch P1 is connected with the output of described level translator, the source electrode of described FET switch P1 and described V dDport is connected, and the drain electrode of described FET switch P1 is connected with one end of described resistance R34 ', and the other end of described resistance R34 ' is connected with described V_ port.
5. rechargeable battery protector as claimed in claim 4, is characterized in that,
Described overcharge detects (VD1) detects relative reference voltage and described first fixed reference potential generation unit generation described overcharge detection threshold voltage (V according to the described overcharge that described relative reference voltage generating unit produces dET1) value, detect the voltage swing of rechargeable battery when charging, when described overcharge detects relative reference voltage higher than described overcharge detection threshold voltage (V dET1), start described oscillator and described counter, and after arriving corresponding delay time, described rechargeable battery protector, under the effect of described recharge logic circuit and described level translation device, enters additives for overcharge protection state, described C oUTport becomes low level, and described charge circuit MOS switch is turned off;
Described overdischarge detects (VD2) detects relative reference voltage and described first fixed reference potential generation unit generation described overdischarge detection threshold voltage (V according to the described overdischarge that described relative reference voltage generating unit produces dET2) value, detect the voltage swing of rechargeable battery when discharging, when described overdischarge detects relative reference voltage lower than described overdischarge detection threshold voltage (V dET2), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described electric discharge logical circuit, enters over state, described D oUTport becomes low level, and described discharge loop MOS switch is turned off;
The described discharge over-current detection threshold voltage (V that described discharge over-current detector (VD3) produces according to the voltage of described V_ port and described second fixed reference potential generation unit dET3), detect the size of current of rechargeable battery when discharging, when the voltage of described V_ port is higher than described discharge over-current detection threshold voltage (V dET3), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described second logical block, enters discharge over-current guard mode, described D oUTport becomes low level, and described discharge loop MOS switch is turned off;
Described short circuit detector, according to the short-circuit detecting threshold voltage (V that voltage and the described second fixed reference potential generation unit of described V_ port produce short), detect the size of current of rechargeable battery when discharging, when the voltage of described V_ port is higher than described short circuit current detection threshold voltage (V short), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described second logical block, enters short-circuit protection state, described D oUTport becomes low level, and described discharge loop MOS switch is turned off;
The described charge over-current detection threshold voltage (V that described charge overcurrent detector (VD4) produces according to the voltage of described V_ port and described 3rd fixed reference potential generation unit dET4), detect the size of current of rechargeable battery when charging, when the voltage of described V_ port is lower than described charge over-current detection threshold voltage (V dET4), after arriving corresponding delay time, described rechargeable battery protector, under the effect of described first logical block, enters charge over-current guard mode, described C oUTport becomes low level, and described charge circuit MOS switch is turned off.
6. rechargeable battery protector as claimed in claim 5, is characterized in that,
After described rechargeable battery protector enters discharge overcurrent state; under the effect of described second logical block; described FET switch N1 is opened; described discharge over-current protection reset unit is switched on; if external load is removed or described external load recovers normal after described FET switch N1 is opened; then under the effect of described discharge over-current protection reset unit, the voltage of described V_ port is pulled down to described V by described resistance R34 ' sSthe voltage of port, then described D oUTport becomes high level, and described discharge loop switch (DFET) is opened;
After described rechargeable battery protector enters charge overcurrent state; under the effect of described first logical block; described FET switch P1 is opened; described charge over-current protection reset unit is switched on; if charger is removed or charger recovers normal after described FET switch P1 is opened; then under the effect of described charge over-current protection reset unit, the voltage of described V_ port is pulled to described V by described resistance R34 ' dDthe voltage of port, then described C oUTport becomes high level, and described charge circuit switch (CFET) is opened.
CN201310205329.7A 2013-05-29 2013-05-29 Rechargeable battery protector Pending CN104218536A (en)

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CN104779669A (en) * 2015-04-13 2015-07-15 深圳市格瑞普电池有限公司 Lithium ion battery pack provided with charging protection circuit
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