CN104218152A - Manufacturing method of organic thin-film transistor - Google Patents
Manufacturing method of organic thin-film transistor Download PDFInfo
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- CN104218152A CN104218152A CN201410437792.9A CN201410437792A CN104218152A CN 104218152 A CN104218152 A CN 104218152A CN 201410437792 A CN201410437792 A CN 201410437792A CN 104218152 A CN104218152 A CN 104218152A
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/80—Constructional details
- H10K10/82—Electrodes
- H10K10/84—Ohmic electrodes, e.g. source or drain electrodes
Landscapes
- Thin Film Transistor (AREA)
Abstract
A manufacturing method of an organic thin-film transistor includes the steps of selecting a substrate; manufacturing a gate electrode layer on the substrate; manufacturing a gate dielectric layer on the gate electrode layer; manufacturing a semiconductor active layer on the gate dielectric layer; manufacturing a source-drain micro-channel layer, having micro-channel grooves, on the semiconductor active layer; manufacturing a source and a drain on the source-drain micro-channel layer. Conductive material in a liquid form replaces original solid-state source-drain electrodes through the manufactured micro-channels by a microfluidic technology, the organic thin-film transistor with the top contact structure is manufactured, the manufacturing method is simplified, manufacturing cost is lowered, the common defects of the organic thin-film transistor with the top contact structure are well overcome on the premise of ensuring original advantages of the organic thin-film transistor with the top contact structure, namely the defect that the influence occurs to the semiconductor material during electrode deposition is overcome, and the performance of a device is further improved.
Description
Technical field
The present invention relates to field of transistors, be specifically related to a kind of preparation method of OTFT.
Background technology
Along with deepening continuously of information technology, electronic product has entered each part in people's life and work.Traditional devices difficult based on inorganic semiconductor material meets people for can portable, low cost, flexible demand.And device prepared by organic semiconducting materials has, and material source is extensive, manufacture craft is relatively simple, cost of manufacture is lower, have the features such as good compatibility with flexible substrate.This makes people more and more pay close attention to organic micro-electronic technology based on organic polymer semiconductor material.
OTFT generally includes gate electrode, is in the insulating barrier between gate electrode and semiconductor, is prepared from the semiconductor layer be between source-drain electrode by organic semiconducting materials, and source electrode and these parts of drain electrode.Different with position according to the characteristic of gate electrode, OTFT can be divided into bottom gate thin film transistor (bottom-gate), top-gate thin-film transistors (top-gate), side gate thin-film transistors (side-gate) and liquid gate thin-film transistors (liquid-gate).Current modal OTFT is the thin-film transistor of bottom gate configuration, main because the chemistry of semiconductor layer and physical property generally unstable, can exert an adverse impact to the form of semiconductor layer and quality during fabricate devices dielectric layer, thus reduce device performance.So the preparation of semiconductor layer is usually after dielectric layer preparation, namely adopt bottom-gate device configuration.
Different according to source-drain electrode and semiconductor deposition order, thin-film transistor can be divided into top contact structure and end contact structures.Top contact structure is at the first depositing semiconductor layers of substrate surface, then at semiconductor surface sedimentary origin drain electrode, and end contact structures to be source-drain electrodes be structured on dielectric layer, then depositing semiconductor layers on source-drain electrode.The transistor of these two kinds of structures respectively has pluses and minuses, at the bottom of the source-drain electrode of the transistor of top contact structure and the contact gear ratio of semiconductor layer, contact structures will get well, and semiconductor layer is greater than the structure of source-drain electrode at bottom by the area of gate electrode electric field influence, period is caused to have higher carrier mobility.In top contact structure, active layer is not subject to the impact of source-drain electrode in addition, can on dielectric layer surface large-area deposition, but also functional modification can be carried out by physics or chemical method to dielectric layer surface, to improve structure and the pattern of semiconductor layer film, to improve the carrier mobility of film transistor device.But this structure is in electrode deposition process, electrode material can be diffused in active layer, causes transistor device off-state current to increase, and on-off ratio declines, and especially for narrow channel device, this phenomenon is more obvious.
The operation principle of OTFT make use of field effect to realize the work of device.Field effect utilizes the electric field vertical with semiconductor surface to modulate the phenomenon of the electric current in the conductivity of semi-conducting material or semi-conducting material.When to be applied to the grid voltage on gate electrode (Vg) be zero, because the intrinsic conductivity of semiconductor is very low, even if apply source-drain voltage (Vds) at building electrode, leakage current (Ids) is not almost had to pass through yet, now transistor is in closed condition, and under this state, the leakage current of transistor is off-state current (Ioff).When gate electrode applies a negative pressure, according to capacitor effect, semiconductor layer can be injected from source electrode in the hole of source electrode end under gate voltage effect, and accumulates at the interface of semiconductor layer and dielectric layer.Now between source electrode and drain electrode, apply a negative voltage, then will travel motion under the driving at source-drain voltage in the hole of channel region accumulation, form electric current, device is now in opening.Along with source-drain voltage increase and when reaching certain value, channel region is by pinch off, because the channel resistance of pinch off region is very large, therefore the source-drain voltage increased nearly all puts on pinch off region, and the voltage at conducting channel two ends does not change substantially, and then channel current also no longer increases along with the increase of source-drain voltage, channel current reaches capacity.
Since first time in 1986 reports OTFT, this field receives the concern of increasing researcher, and achieves important breakthrough.Organic semiconducting materials performance improves year by year.Because the synthesis of high mobility organic semi-conducting material in recent years, thin film physics and device build the fast development of the aspect researchs such as technique, the performance such as mobility, switch current ratio of OTFT, especially mobility is improved largely, and makes OTFT become possibility in the application of reality.
Summary of the invention
the technical problem solved:for the deficiencies in the prior art, the object of the present invention is to provide a kind of preparation method of OTFT, adopt the thin-film transistor of top contact structure, by the combination with microflow control technique, can under the prerequisite of advantage ensureing top contact structure thin-film transistor, for the shortcoming of the impact of semiconductor material surface when effectively avoiding electrode deposition, thus prepare high performance device.
technical scheme:for solving prior art problem, the technical scheme that the present invention takes is:
A preparation method for OTFT, comprises the following steps:
Select substrate;
Prepare gate electrode layer over the substrate;
Described gate electrode layer prepares gate dielectric layer;
Described gate dielectric layer prepares semiconductor active layer;
The source and drain microchannel layers of preparation band microchannel grooves on semiconductor active layer;
Described source and drain microchannel layers prepares source electrode and drain electrode, spacing between described source electrode and drain electrode is less than or equal to 200 μm, punching above the microchannel grooves of source and drain microchannel layers, again with epoxide-resin glue by hole and isodiametric hollow tubing conductor adhesion integral, finally at one end injection material of conduit, other end pressurised extraction, finally forms source electrode and drain electrode in source and drain microchannel layers.
As improvement, described semiconductor active layer prepares interface-modifying layer.
The material of described gate electrode layer is the one in silver, gold, aluminium, copper, poly-3,4-ethylene dioxythiophene or poly styrene sulfonate; Preparation method is the one in Vacuum Heat physical deposition, inkjet printing, spin coating, electron beam deposition or sputtering.
The material of described gate dielectric layer is the one in silica, silicon nitride, aluminium oxide, tantalum oxide, polyimides, polyvinyl pyrrolidone or polymethyl acrylate; Preparation method is the one in low-pressure chemical vapor deposition, inkjet printing, sputtering, ald, electron beam evaporation, ion assisted deposition or spin coating technique.
The material of described semiconductor active layer is the one of poly-3-in base thiophene P3HT, pentacene or titan bronze; Preparation method is the one in vacuum thermal evaporation, spin coating, inkjet printing or a painting.
The material of described interface-modifying layer is molybdenum oxide MoO
3; Preparation method is the one in vacuum thermal evaporation, spin coating or inkjet printing.
The material of described source and drain microchannel layers is the one in polyamide, polymethyl methacrylate, Merlon, PETG or dimethyl silicone polymer; Preparation method is the one in method of moulding, pressure sintering, LIGA technology, laser ablation method or soft lithographic.
Described source and drain microchannel layers and interface-modifying layer paste integral after, in source and drain microchannel, prepare source electrode and drain electrode.
The material of described source electrode and drain electrode is the one in conductive silver ink, conductive gold ink, copper ink, graphene solution or poly-3,4-ethylene dioxythiophene.
beneficial effect
This method preparing OTFT provided by the invention, employ the OTFT of traditional top contact structure, can ensure that top contact structure thin-film transistor contact resistance is less than the transistor of end contact structures, the semiconductor layer of top contact structure is large by gate electrode electric field influence area, have than end contact structures thin-film transistor more high mobility and in top contact structure semiconductor layer by the impact of source-drain electrode, can in the large-area deposition of dielectric layer surface, functional modification can be carried out to dielectric layer surface by physics or chemical method, to improve structure and the pattern of semiconductor layer film, thus under improving the prerequisite of the advantage of thin-film transistor carrier mobility, for the shortcoming of the impact of semiconductor material surface when effectively avoiding electrode deposition, thus prepare high performance device.
Accompanying drawing explanation
Fig. 1 is the vertical view of source and drain microchannel layers modelling schematic diagram;
Fig. 2 is the side view of source and drain microchannel layers modelling schematic diagram;
Fig. 3 is the structural representation of OTFT, wherein, and 1, substrate, 2, gate electrode layer, 3, gate dielectric layer, 4, semiconductor active layer, 5, interface-modifying layer, 6, microchannel grooves, 7, source and drain microchannel layers.
Embodiment
The following examples can make the present invention of those skilled in the art comprehend, but do not limit the present invention in any way.
The present invention utilizes microflow control technique, the electric conducting material of liquid form is used to replace original Solid Source drain electrode by the microchannel prepared, thus complete the OTFT of top contact structure, not only simplify preparation method, reduce the cost of fabricate devices, and under the prerequisite ensureing the original advantage of top contact structure OTFT, well solve for the ubiquitous defect of top contact structure OTFT, namely due to during depositing electrode for the shortcoming of the impact of semi-conducting material, further increase the performance of device.
As shown in Fig. 1, by the microchannel model needed for SolidWorks Software for Design, what this figure represented is one three-channelly to design a model, due to passage need end to end drip conducting liquid, so the head and tail width of the passage of design needs at least to be greater than 1mm, to facilitate dropping conducting liquid.Shown in the mid portion of model, three passage parallel zone separations are 60um, and the channel width of the right and left is respectively 1mm, and center-aisle width is 60um.Many passages can be designed to realize the preparation of the OTFT of array form according to different needs.After completing the design of channel pattern, select curing type polymer---dimethyl silicone polymer (PDMS) produces the flexible source and drain microchannel layers with passage by soft lithography, as shown in Figure 2.
Embodiment 1
A preparation method for OTFT, comprises the following steps:
Select insulating glass sheet as substrate 1; Gate electrode layer 2 is prepared thereon by inkjet technology, silver nanoparticle ink is completed patterned preparation by piezoelectric inkjet printer on insulating glass sheet, after printed gate electrode, insulating glass sheet is placed on 200 DEG C of thermal annealings in thermal station and within 1 hour, prepares the thick gate electrode layer of 100nm 2; By piezoelectric ink jet printing technique, be printed on by PVP solution and prepare gate electrode layer 2, after having printed, the thermal annealing be placed on by insulating glass sheet through 200 DEG C in thermal station prepares the thick gate dielectric layer of 600nm 3 for 1 hour; By vacuum thermal evaporation methods by titan bronze CuPc evaporation on PVP gate dielectric layer 3, form the thick semiconductor active layer 4 of 60nm; By vacuum thermal evaporation methods by molybdenum trioxide evaporation on titan bronze CuPc semiconductor active layer 4, form the thick interface-modifying layer 5 of 40nm; By according to the good microchannel model of Software for Design through soft lithography, prepare the flexible PDMS source and drain microchannel layers 7 with microchannel grooves 6, the one side then PDMS with microchannel grooves 6 after 10 minutes, is covered through UV ozone process on interface-modifying layer 5; In microchannel grooves 6, pass into silver-colored ink prepared by conductive silver nano particle, complete the preparation of source electrode and drain electrode.
Embodiment 2
A preparation method for OTFT, comprises the following steps::
Select insulating glass sheet as substrate 1; Through the UVO of 10 minutes
3after process, aluminium is completed patterned preparation by vacuum thermal evaporation methods on insulating glass sheet, form the aluminum gate electrode layer 2 that 100nm is thick; By the method for spin coating, be spin-coated on by PVP solution and prepare on gate electrode layer 2, rotating speed is 4000RPM, and the time is 30S, then the thermal annealing be placed on by insulating glass sheet through 200 DEG C in thermal station prepares the thick gate dielectric layer of 600nm 3 for 1 hour; By vacuum thermal evaporation methods by titan bronze CuPc evaporation on PVP gate dielectric layer 3, form the thick semiconductor active layer 4 of 60nm; By vacuum thermal evaporation methods by molybdenum trioxide evaporation on titan bronze CuPc semiconductor active layer, form the thick interface-modifying layer 5 of 40nm; By according to the good microchannel model of Software for Design through soft lithography, prepare the flexible PDMS source and drain microchannel layers 7 with microchannel grooves 6, the one side then PDMS with microchannel grooves 6 after 10 minutes, is covered through UV ozone process on interface-modifying layer; In microchannel grooves 6, pass into silver-colored ink prepared by conductive silver nano particle, complete the preparation of source electrode and drain electrode.
Embodiment 3
A preparation method for OTFT, comprises the following steps:
Select insulating glass sheet as substrate 1; Through the UVO of 10 minutes
3after process, 3,4-ethylene dioxythiophene solution will be gathered according to rotating speed 2000rpm, be spin-coated on substrate 1 under the condition of duration 30s, form the poly-3,4-ethylene dioxythiophene gate electrode layer 2 that 200nm is thick; By the method for spin coating, be spin-coated on by PVP solution and prepare on gate electrode layer 2, rotating speed is 4000RPM, and the time is 30S, then the thermal annealing be placed on by insulating glass sheet through 200 DEG C in thermal station prepares the thick gate dielectric layer of 600nm 3 for 1 hour; By piezoelectric ink jet printing technique, P3HT is prepared on PVP gate dielectric layer 3 as semiconductor active material; Select single-nozzle, under the condition of 35V voltage, 40 μm of dot spacings, print individual layer P3HT layer, print and carry out according to vertical setting of types, form the semiconductor active layer 4 that 60nm is thick, in thermal station after having printed in glove box, in a nitrogen environment according to the annealing temperature 1 hour of 70 DEG C; By vacuum thermal evaporation methods by molybdenum trioxide evaporation on P3HT semiconductor active layer 4, form the thick interface-modifying layer 5 of 40nm; By according to the good microchannel model of Software for Design through soft lithography, prepare the flexible PDMS source and drain microchannel layers 7 with microchannel grooves 6, the one side then PDMS with microchannel grooves 6 after 10 minutes, is covered through UV ozone process on interface-modifying layer 5; In microchannel grooves 6, pass into the golden ink of leading gold and silver nano particle and preparing, complete the preparation of source electrode and drain electrode.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. a preparation method for OTFT, comprises the following steps:
Select substrate;
Prepare gate electrode layer over the substrate;
Described gate electrode layer prepares gate dielectric layer;
Described gate dielectric layer prepares semiconductor active layer;
The source and drain microchannel layers of preparation band microchannel grooves on semiconductor active layer;
Described source and drain microchannel layers prepares source electrode and drain electrode,
It is characterized in that: the spacing between described source electrode and drain electrode is less than or equal to 200 μm, punching above the microchannel grooves of source and drain microchannel layers, again with epoxide-resin glue by hole and isodiametric hollow tubing conductor adhesion integral, finally at one end injection material of conduit, other end pressurised extraction, finally forms source electrode and drain electrode in source and drain microchannel layers.
2. the preparation method of OTFT according to claim 1, is characterized in that: on described semiconductor active layer, prepare interface-modifying layer.
3. the preparation method of OTFT according to claim 1, is characterized in that: the material of described gate electrode layer is the one in silver, gold, aluminium, copper, poly-3,4-ethylene dioxythiophene or poly styrene sulfonate; Preparation method is the one in Vacuum Heat physical deposition, inkjet printing, spin coating, electron beam deposition or sputtering.
4. the preparation method of OTFT according to claim 1, is characterized in that: the material of described gate dielectric layer is the one in silica, silicon nitride, aluminium oxide, tantalum oxide, polyimides, polyvinyl pyrrolidone or polymethyl acrylate; Preparation method is the one in low-pressure chemical vapor deposition, inkjet printing, sputtering, ald, electron beam evaporation, ion assisted deposition or spin coating technique.
5. the preparation method of OTFT according to claim 1, is characterized in that: the material of described semiconductor active layer is the one of poly-3-in base thiophene P3HT, pentacene or titan bronze; Preparation method is the one in vacuum thermal evaporation, spin coating, inkjet printing or a painting.
6. the preparation method of OTFT according to claim 2, is characterized in that: the material of described interface-modifying layer is molybdenum oxide MoO
3; Preparation method is the one in vacuum thermal evaporation, spin coating or inkjet printing.
7. the preparation method of OTFT according to claim 1, is characterized in that: the material of described source and drain microchannel layers is the one in polyamide, polymethyl methacrylate, Merlon, PETG or dimethyl silicone polymer; Preparation method is the one in method of moulding, pressure sintering, LIGA technology, laser ablation method or soft lithographic.
8. the preparation method of OTFT according to claim 1, is characterized in that: described source and drain microchannel layers and semiconductor active layer paste integral after, in source and drain microchannel, prepare source electrode and drain electrode.
9. the preparation method of OTFT according to claim 1, is characterized in that: the material of described source electrode and drain electrode is the one in conductive silver ink, conductive gold ink, copper ink, graphene solution or poly-3,4-ethylene dioxythiophene.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410437792.9A CN104218152A (en) | 2014-09-01 | 2014-09-01 | Manufacturing method of organic thin-film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410437792.9A CN104218152A (en) | 2014-09-01 | 2014-09-01 | Manufacturing method of organic thin-film transistor |
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| Publication Number | Publication Date |
|---|---|
| CN104218152A true CN104218152A (en) | 2014-12-17 |
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Cited By (5)
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| CN104914141A (en) * | 2015-01-30 | 2015-09-16 | 南京工业大学 | Novel low density lipoprotein cholesterol electrochemistry immunosensor preparation and application thereof |
| CN107029565A (en) * | 2017-05-25 | 2017-08-11 | 合肥工业大学 | Optical drive double-layered compound film based on graphene oxide and preparation method and application |
| CN107046097A (en) * | 2017-05-11 | 2017-08-15 | 京东方科技集团股份有限公司 | Display panel manufacture method, the manufacturing equipment of display panel and display panel |
| CN111122661A (en) * | 2020-01-08 | 2020-05-08 | 湖北大学 | Based on MoO3Preparation method and application of room-temperature FET type hydrogen sensitive element with nano-belt modified graphene |
| CN115105966A (en) * | 2021-03-23 | 2022-09-27 | 京东方科技集团股份有限公司 | Filter membrane, preparation method thereof and microfluidic chip |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104914141A (en) * | 2015-01-30 | 2015-09-16 | 南京工业大学 | Novel low density lipoprotein cholesterol electrochemistry immunosensor preparation and application thereof |
| CN104914141B (en) * | 2015-01-30 | 2017-10-17 | 南京工业大学 | A kind of preparation and application of novel low density lipoprotein cholesterol electrochemical immunosensor |
| CN107046097A (en) * | 2017-05-11 | 2017-08-15 | 京东方科技集团股份有限公司 | Display panel manufacture method, the manufacturing equipment of display panel and display panel |
| CN107029565A (en) * | 2017-05-25 | 2017-08-11 | 合肥工业大学 | Optical drive double-layered compound film based on graphene oxide and preparation method and application |
| CN107029565B (en) * | 2017-05-25 | 2019-10-11 | 合肥工业大学 | Optical drive double-layered compound film based on graphene oxide and the preparation method and application thereof |
| CN111122661A (en) * | 2020-01-08 | 2020-05-08 | 湖北大学 | Based on MoO3Preparation method and application of room-temperature FET type hydrogen sensitive element with nano-belt modified graphene |
| CN115105966A (en) * | 2021-03-23 | 2022-09-27 | 京东方科技集团股份有限公司 | Filter membrane, preparation method thereof and microfluidic chip |
| CN115105966B (en) * | 2021-03-23 | 2024-02-27 | 京东方科技集团股份有限公司 | Filtering membrane, preparation method thereof and microfluidic chip |
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