CN104200765B - Flicker picture component generation method based on FPGA - Google Patents
Flicker picture component generation method based on FPGA Download PDFInfo
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- CN104200765B CN104200765B CN201410378619.6A CN201410378619A CN104200765B CN 104200765 B CN104200765 B CN 104200765B CN 201410378619 A CN201410378619 A CN 201410378619A CN 104200765 B CN104200765 B CN 104200765B
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- 238000000034 method Methods 0.000 title claims abstract description 20
- 239000011159 matrix material Substances 0.000 claims abstract description 9
- 239000004973 liquid crystal related substance Substances 0.000 claims description 23
- 230000001360 synchronised effect Effects 0.000 claims description 16
- 238000010408 sweeping Methods 0.000 claims 1
- 239000003086 colorant Substances 0.000 abstract 2
- 238000007405 data analysis Methods 0.000 abstract 2
- 238000004458 analytical method Methods 0.000 abstract 1
- 238000001514 detection method Methods 0.000 description 4
- 230000003993 interaction Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
Abstract
The invention discloses a Flicker picture component generating method, which comprises the following steps of 1, determining horizontal and vertical points of a Flicker picture dot matrix in an upper computer, determining picture vertex coordinates, and filling colors of the points; 2. the upper computer transmits the point number, the vertex coordinates, the color of each point and the module resolution to a data analysis module for analysis; 3. the data analysis module transmits the analyzed data to the image signal generator; 4. the RAM of the image signal generator takes the serial number of each pixel point of the picture lattice as an address and writes color; 5. scanning a region corresponding to a picture in an image signal generator, and calculating the address of each pixel point in the scanning region mapped in a picture dot matrix; 6. and taking the address mapped by each pixel point in the scanning area in the dot matrix as an RAM reading address, reading the color value of each pixel point of the picture dot matrix, and assigning colors to each pixel point. The invention can utilize FPGA to generate a logic picture which is complicated like a Flicker picture.
Description
Technical field
The present invention relates to the technical field of measurement and test of liquid crystal module, in particular to one based on FPGA (Field-
Programmable Gate Array, i.e. field programmable gate array) Flicker (flicker) screen component generate method.
Background technology
Along with the ever more popular of home theater, giant-screen, high-resolution liquid crystal display are increasingly becoming main flow, at liquid crystal
In display production process, need to be detected by picture signal generator.
Traditional picture signal generator is using bmp (Bitmap) image as image source, at detection giant-screen and high-resolution
During rate liquid crystal display, corresponding bmp image data amount is very big, the highest to signal generator hardware requirement, causes detection process
The slack phenomenon of middle picture.On the premise of not increasing hardware cost, occur in that in the industry and (produce picture based on FPGA with FPGA
The hardware configuration of data as it is shown in figure 1, include host computer, human-computer interaction module, data resolution module, picture signal generator,
Synchronous DRAM, synchronous dynamic random storage control and encoded output image module, wherein, data parsing mould
Block, picture signal generator, synchronous DRAM, synchronous dynamic random storage control and encoded output image module
It is the intraware of FPGA) produce picture data, i.e. logic picture and replace the scheme of part bmp image, but be only limitted to produce
Raw simplest logic picture is (as changeless in patterns such as horizontal gradient image, rectangular shaped rim image and Rectangle filling images
Image), thus there is the problem insufficient to liquid crystal display detection.FPGA can't be utilized at present to generate Flicker group
The logic picture that part is so complicated.
Summary of the invention
Present invention aim to provide a kind of Flicker screen component based on FPGA to generate method, the method energy
FPGA is utilized to generate the logic picture that Flicker assembly is so complicated.
For realizing this purpose, the Flicker screen component based on FPGA designed by the present invention generates method, and its feature exists
In, it comprises the steps:
Step 1: user determines that the level in Flicker picture point array element is counted and vertically as required in host computer
Count, in host computer, determine the apex coordinate of Flicker picture simultaneously as required, and as required by above-mentioned Flicker
Each point in picture point array element fills corresponding color；
Step 2: the level of above-mentioned Flicker picture point array element is counted and vertically counted by host computer, Flicker picture
Apex coordinate, each point is corresponding in Flicker picture point array element color value, liquid crystal module resolution is by predetermined data
Structural transmission is to data resolution module；
Step 3: data resolution module parse the level of above-mentioned Flicker picture point array element count and vertically count,
The color value of each some correspondence, liquid crystal module resolution in the apex coordinate of Flicker picture, Flicker picture point array element,
And the level of the Flicker picture point array element parsed counted and vertically counts, the apex coordinate of Flicker picture,
Color value, liquid crystal module resolution that in Flicker picture point array element, each point is corresponding are transferred to picture signal generator；
Step 4: picture signal generator is internally generated a block RAM (random access memory, random access memory),
And with the numbered address of each pixel of Flicker picture point array element in described RAM, write the color of above-mentioned correspondence
Value；
Step 5: according to horizontal coordinate and the vertical coordinate on Flicker picture summit, in picture signal generator to
The region that Flicker picture is corresponding is scanned, and in calculating above-mentioned scanning area each pixel at Flicker picture dot matrix
The address mapped in unit；
Step 6: reflect in Flicker picture point array element with each pixel in the scanning area that calculates in step 5
The address penetrated is the reading address of above-mentioned RAM, reads the color value that each pixel of Flicker picture point array element is corresponding, and will
In picture signal generator, each pixel of Flicker picture point array element gives the color value of above-mentioned correspondence, i.e. defines
Flicker screen component.
The present invention adopts and achieves the logic that generation Flicker screen component based on FPGA is so complicated in manner just described
Picture.And the data volume of these complex logic pictures produced is the least, applicant is only designed as 8192 bytes in force, no
Being only capable of improving the speed that in FPGA, picture generates, it is also possible to reduce buffer memory capacity, (traditional approach is schemed with bmp to reduce hardware cost
As image source, data volume is big, and high to signal generator hardware requirement, during often causing detection, picture is slack
Phenomenon).And the logic picture speed that the Flicker screen component generated by FPGA is so complicated is fast so that test giant-screen,
Response speed during high-resolution liquid crystal module also can be very fast, improves the fluency of picture during liquid crystal module detects.
Accompanying drawing explanation
Fig. 1 is the existing hardware architecture diagram producing picture data based on FPGA；
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail:
A kind of Flicker screen component based on FPGA generates method, and it comprises the steps:
Step 1: user determines that the level in Flicker picture point array element is counted and vertically as required in host computer
Count, in host computer, determine the apex coordinate of Flicker picture simultaneously as required, and as required by above-mentioned Flicker
Each point in picture point array element fills corresponding color；
Step 2: the level of above-mentioned Flicker picture point array element is counted and vertically counted by host computer, Flicker picture
Apex coordinate, each point is corresponding in Flicker picture point array element color value, liquid crystal module resolution is by predetermined data
Structure (formulated according to practical situation by FPGA engineer, gives the number selected by this enforcement in table 1 below by this data structure
According to structure) it is transferred to data resolution module；
Step 3: data resolution module parse the level of above-mentioned Flicker picture point array element count and vertically count,
The color value of each some correspondence, liquid crystal module resolution in the apex coordinate of Flicker picture, Flicker picture point array element,
And the level of the Flicker picture point array element parsed counted and vertically counts, the apex coordinate of Flicker picture
Color value that in (apex coordinate for position Flicker picture), Flicker picture point array element, each point is corresponding,
Liquid crystal module resolution is transferred to picture signal generator；
Step 4: picture signal generator is internally generated a block RAM, and with Flicker picture dot matrix list in described RAM
The numbered address of each pixel of unit, writes the color value of above-mentioned correspondence；
Step 5: according to horizontal coordinate and the vertical coordinate on Flicker picture summit, in picture signal generator to
The region that Flicker picture is corresponding is scanned, and in calculating above-mentioned scanning area each pixel at Flicker picture dot matrix
The address mapped in unit；
Step 6: reflect in Flicker picture point array element with each pixel in the scanning area that calculates in step 5
The address penetrated is the reading address of above-mentioned RAM, reads the face that each pixel (i.e. coordinate points) of Flicker picture point array element is corresponding
Colour, and give the color value of above-mentioned correspondence by each pixel of Flicker picture point array element in picture signal generator,
I.e. define Flicker screen component；
Step 7: the above-mentioned Flicker screen component generated is controlled by picture signal generator by synchronous dynamic random storage
Device processed stores synchronous DRAM, and encoded output image module, according to the time sequence parameter of liquid crystal module, produces video
Graphic array signal (VGA, Video Graphics Array), and it is sequentially generated the read signal of synchronous DRAM,
The above-mentioned Flicker screen component generated is converted into low-voltage differential signal (LVDS, Low-Voltage Differential
Signaling) output.
In the step 5 of technique scheme, the regional extent being scanned is differentiated by the liquid crystal module parsed in step 3
Rate (the resolution i.e. number of picture photo vegetarian refreshments) determines.
In the step 5 of technique scheme, in picture signal generator, the region corresponding with Flicker picture is carried out
Scanning order be in picture signal generator the left side of above-mentioned corresponding region to right side, then in picture signal generator
State the upper end of corresponding region to lower end.
In the step 5 of technique scheme, picture signal generator generates data and effectively indicates, and these data effectively indicate use
In the effectiveness of unlabeled data, the pixel in scanning the regional extent specified in step 5, data effectively indicate pixel
Point is denoted as effectively, and it is invalid to be otherwise denoted as；Meanwhile, it is invalid that the pixel that the gap in scanning process produces also is denoted as；
In the step 7 of technique scheme, when data are effectively denoted as effective, picture signal generator will generate
Above-mentioned Flicker screen component store synchronous DRAM, image by synchronous dynamic random storage control
Output coding module, according to the time sequence parameter of liquid crystal module, produces Video Graphics Array signal, and be sequentially generated synchronous dynamic with
The read signal of machine memorizer, is converted into low-voltage differential signal output by the above-mentioned Flicker screen component generated.
The present invention can reduce the principle of image source data amount: for BMP image, and human-computer interaction module needs to input BMP
The image information of each pixel in image, along with the raising of screen resolution, data volume will be increasing.And the present invention
The Flicker screen component of middle generation is logical image, it have only to input Flicker picture point array element level count and
Vertically count, each point is corresponding in the apex coordinate of Flicker picture, Flicker picture point array element color value, liquid crystal mould
Component resolution.This data volume is the least, and does not relies on the size of screen resolution, and picture is generated by FPGA.
Table 1: predetermined data structure
Remarks: pixel0～pixel15 puts in order as from left to right, from top to bottom.As shown in the table, for 2x2,
3x3,4x4 lattice pixels permutation table.
Other arrangement lattice types such as: 2x3,3x2 etc. arrange in a similar way, FPGA with dot matrix as elementary cell,
Repeat in the position range specified, draw Flicker image.
The content that this specification is not described in detail belongs to prior art known to professional and technical personnel in the field.
Claims (5)
1. a Flicker screen component based on FPGA generates method, it is characterised in that it comprises the steps:
Step 1: user determines that the level in Flicker picture point array element is counted and vertical point as required in host computer
Number, determines the apex coordinate of Flicker picture simultaneously as required in host computer, and is drawn by above-mentioned Flicker as required
Each point in cake array element fills corresponding color；
Step 2: the level of above-mentioned Flicker picture point array element is counted and vertically counted by host computer, the top of Flicker picture
Color value, liquid crystal module resolution that in point coordinates, Flicker picture point array element, each point is corresponding press predetermined data structure
It is transferred to data resolution module；
Step 3: data resolution module parse the level of above-mentioned Flicker picture point array element count and vertically count,
The color value of each some correspondence, liquid crystal module resolution in the apex coordinate of Flicker picture, Flicker picture point array element,
And the level of the Flicker picture point array element parsed counted and vertically counts, the apex coordinate of Flicker picture,
Color value, liquid crystal module resolution that in Flicker picture point array element, each point is corresponding are transferred to picture signal generator；
Step 4: picture signal generator is internally generated a block RAM, and with Flicker picture point array element in described RAM
The numbered address of each pixel, writes the color value of above-mentioned correspondence；
Step 5: according to horizontal coordinate and the vertical coordinate on Flicker picture summit, in picture signal generator to
The region that Flicker picture is corresponding is scanned, and in calculating above-mentioned scanning area each pixel at Flicker picture dot matrix
The address mapped in unit；
Step 6: map in Flicker picture point array element with each pixel in the scanning area that calculates in step 5
Address is the reading address of above-mentioned RAM, reads the color value that each pixel of Flicker picture point array element is corresponding, and by image
In signal generator, each pixel of Flicker picture point array element gives the color value of above-mentioned correspondence, i.e. defines
Flicker screen component.
Flicker screen component based on FPGA the most according to claim 1 generates method, it is characterised in that: described step
In rapid 5, the regional extent being scanned is determined by the liquid crystal module resolution parsed in step 3.
Flicker screen component based on FPGA the most according to claim 1 and 2 generates method, it is characterised in that: described
Step 7 is also included: the above-mentioned Flicker screen component generated is passed through synchronous dynamic random by picture signal generator after step 6
Storage control stores synchronous DRAM, and encoded output image module, according to the time sequence parameter of liquid crystal module, is produced
Raw Video Graphics Array signal, and it is sequentially generated the read signal of synchronous DRAM, the above-mentioned Flicker generated is drawn
Face assembly is converted into low-voltage differential signal output.
Flicker screen component based on FPGA the most according to claim 1 and 2 generates method, it is characterised in that: described
In step 5, the order being scanned the region corresponding with Flicker picture in picture signal generator is for from picture signal
In generator, the left side of above-mentioned corresponding region is to right side, then in picture signal generator the upper end of above-mentioned corresponding region to
End.
Flicker screen component based on FPGA the most according to claim 3 generates method, it is characterised in that: described step
In rapid 5, picture signal generator generates data and effectively indicates, and these data effectively indicate the effectiveness for unlabeled data, when sweeping
Retouching the pixel in the regional extent specified in step 5, data effectively indicate and are denoted as pixel effectively, being otherwise denoted as
Invalid；Meanwhile, it is invalid that the pixel that the gap in scanning process produces also is denoted as；
In described step 7, when data are effectively denoted as effective, the above-mentioned Flicker that picture signal generator will generate
Screen component stores synchronous DRAM, encoded output image module root by synchronous dynamic random storage control
According to the time sequence parameter of liquid crystal module, produce Video Graphics Array signal, and be sequentially generated the reading letter of synchronous DRAM
Number, the above-mentioned Flicker screen component generated is converted into low-voltage differential signal output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410378619.6A CN104200765B (en) | 2014-08-01 | Flicker picture component generation method based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410378619.6A CN104200765B (en) | 2014-08-01 | Flicker picture component generation method based on FPGA |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104200765A CN104200765A (en) | 2014-12-10 |
| CN104200765B true CN104200765B (en) | 2017-01-04 |
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Address after: Hubei Province, Wuhan City, South Lake Road 430070 Hongshan District No. 53 WCMC agricultural city shop floor 4 Patentee after: Wuhan fine test electronics group Limited by Share Ltd Address before: Hubei Province, Wuhan City, South Lake Road 430070 Hongshan District No. 53 WCMC agricultural city shop floor 4 Patentee before: Wuhan Jingce Electronic Technology Co., Ltd. |