CN104168705A - LED driver without electrolytic capacitor - Google Patents

Abstract

The invention belongs to the technical field of electronic circuits, and particularly relates to an LED driver without an electrolytic capacitor. The LED driver without the electrolytic capacitor comprises a rectification bridge, a reference voltage generation module, a drive module, an LED, a power tube, an operational amplifier, an analog multiplier, a current amplifier, a zero-cross detection device (ZCD), an MOS tube, a resistor and the like. A circuit in the driver works in an inductance and current critical conduction mode, power factor correction is automatically achieved, the peak value of input power is lowered through a harmonic component, a capacitance element with a small capacity value can be used, and accordingly use of the high-capacity electrolytic capacitor is avoided. Meanwhile, by means of a method for transiently responding to an enhanced network, load transient response speed is very high, interference resistance is enhanced, the load adjustment rate is high, and meanwhile output voltage can be stabilized without the high-capacity electrolytic capacitor.

Description

A kind of LED driver without electrolytic capacitor

technical field

The invention belongs to the technical field of electronic circuits, and in particular relates to an LED driver without an electrolytic capacitor.

Background technique

At present, the working life of LED driving power mainly depends on the large-capacity electrolytic capacitor in the circuit. The life of electrolytic capacitors is generally only a few thousand hours, while the life of LEDs can reach tens of thousands of hours. The life of electrolytic LEDs is seriously mismatched, so the life of LED drive power is affected. On the other hand, the volume of the electrolytic capacitor is large, which leads to a large volume of the LED driving device, which does not take advantage of miniaturization. For some occasions, the volume is too large, which is not conducive to installation and application.

Contents of the invention

The object of the present invention is to provide an LED driver without electrolytic capacitors to solve the problems existing in the electrolytic capacitors in the current LED drivers.

Technical solution of the present invention: as shown in Figure 2, a LED driver without electrolytic capacitor is characterized in that it includes a rectifier bridge, a reference voltage generating module, a driving module, an LED module, a switching tube Q1, a PMOS tube PM1, and an NMOS tube MN1, first operational amplifier, second operational amplifier, third operational amplifier, first error operational amplifier, second error operational amplifier, first multiplier, second multiplier, third multiplier, RS flip-flop, current amplifier , Zero-crossing detection module ZCD, resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, capacitors C1, C2, C3, C4, C5, diodes D5 and inductance L; where,

The input terminal of the rectifier bridge is connected to an external AC power supply, and its output terminal is connected to the anode of the diode D5 after passing through the inductor L; the connection point between the inductor L and the output terminal of the rectifier bridge passes through R1 and R2 in turn and then grounded; the connection point between R1 and R2 is connected to the first operation The positive input terminal of the amplifier; the negative input terminal of the first operational amplifier is grounded after passing through R3 and R4 in turn, its output terminal is connected to its negative input terminal, and its output terminal is also connected to the first input terminal of the first multiplier, the first The second input end of a multiplier, the first input end of the second multiplier; The output end of the first multiplier is connected to the second input end of the second multiplier; The output end of the second multiplier is connected to the second through R5 The inverting input terminal of the operational amplifier; the connection point of R3 and R4 is connected to the positive input terminal of the second operational amplifier after passing through R7; the connection point of R7 and the positive input terminal of the second operational amplifier passes through R8 and then grounded; the connection point of the second operational amplifier The reverse input end is solved its output end by R6, and its output end connects the first input end of the 3rd multiplier; The second input end of the 3rd multiplier connects the output end of the first error operational amplifier; The output end of the first error operational amplifier The negative input terminal is connected to the output terminal of the reference voltage generation module, and its positive input terminal is connected to the cathode of diode D5 after passing through R11. Positive input terminal; the second input terminal of the third multiplier is connected to the positive input terminal of the first error amplifier after passing through C2 and R9 in sequence; the output terminal of the third multiplier is connected to the inverting input terminal of the third operational amplifier; the second The positive input terminal of the three operational amplifiers is connected to the source of the switch tube Q1, and its output terminal is connected to the R input terminal of the RS flip-flop; the S output terminal of the RS flip-flop is connected to the zero-crossing detection module ZCD, and its Q output terminal is connected to the drive module. Input terminal; the output terminal of the drive module is connected to the gate of the switch tube Q1; the drain of the switch tube Q1 is connected to the connection point between the inductor L and the positive pole of the diode D5, and the connection point between the source and the positive input terminal of the third operational amplifier passes through R10 Grounding; the cathode of the diode D5 is connected to the source of the PMOS transistor PM1; the connection point between the cathode of the diode D5 and the source of the PMOS transistor PM1 passes through C3 and then grounded; the gate of the PMOS transistor PM1 is connected to the output terminal of the second error operational amplifier and the NMOS transistor MN1 The drain is connected to the LED module; the reverse input terminal of the second error operational amplifier is connected to the output terminal of the reference voltage module, and its positive input terminal is connected to the drain of the PMOS transistor PM1 after passing through R14; R14 is connected to the second error The connection point of the positive input terminal of the operational amplifier is grounded after passing through R15; the source of the NMOS tube MN1 is grounded, and its gate is connected to the output terminal of the current amplifier; the current amplifier is connected in parallel with R13, and its input terminal is connected to the drain of the PMOS tube PM1 through C4 ; C5 is connected in parallel with the LED module.

The beneficial effects of the present invention are that without using large-capacity electrolytic capacitors, the reliability and life of the power supply can be improved, automatic power factor adjustment can be performed, the load transient response speed is fast, the anti-interference ability is strong, and the load adjustment rate is high. .

Description of drawings

Figure 1 is the input and output waveform diagram when the power factor is 1;

Fig. 2 is the circuit structure diagram of embodiment 1;

Fig. 3 is a parameter waveform diagram in embodiment 1;

FIG. 4 is a structural diagram of the second embodiment.

Detailed ways

Below in conjunction with accompanying drawing and embodiment the present invention is described in detail

Attached Figure 1 shows the waveforms of input voltage, input current, input power, and output power when PF=1. From the figure, we can know that the input power is pulsating and the output power is constant. Therefore, a capacitor with a large capacity is needed to balance the input power and output power.

Example 1

As shown in Figure 2, this embodiment includes a rectifier bridge, a reference voltage generation module, a drive module, LED, power transistor, operational amplifier, analog multiplier, current amplifier, inductor, zero-crossing detection module ZCD, MOS transistor, resistor, etc.

Specifically, the AC input Vin is connected to the inductor L through a rectifier bridge, and connected to GND through a resistor R1 and a resistor R2. The other end of the inductor L is connected to the drain end of the switch tube Q1, and at the same time connected to the positive phase end of the diode D5, the source of the switch tube Q1 is connected to GND through the resistor R10; the negative end of the diode D5 is connected to the capacitor C3, and the capacitor C3 Connect the other end to GND. The end connected to resistor R1 and R2 is connected to the non-inverting terminal of operational amplifier 1, the negative terminal and output terminal of operational amplifier 1 are connected to resistor R3, and then connected to GND through resistor R4. The output terminal of the operational amplifier 1 is input to the two ports of the multiplier 1 to realize squaring, the output terminal of the multiplier 1 and the operational amplifier 1 are respectively input to the input terminal of the multiplier 2, and the output terminal of the multiplier 2 is connected to the operation terminal through R5 The negative terminal of the amplifier 2; the connection section of the resistors R3 and R4 is connected to the non-inverting terminal of the operational amplifier 2 through R7, and the non-inverting terminal of the operational amplifier 2 is connected to GND through R8. The negative terminal of the operational amplifier 2 is connected to the output terminal through a resistor R6; the output terminal of the operational amplifier 2 is input to the input terminal of the multiplier 3, and the other input terminal of the multiplier 3 is connected to the output terminal of the error amplifier 1; the multiplier 3 The output terminal of the operational amplifier is connected to the negative terminal of the operational amplifier 3, the source of the switch tube Q1 is connected to the non-inverting terminal of the operational amplifier 3, the output of the operational amplifier 3 is connected to the R terminal of the RS flip-flop, and the S terminal of the RS flip-flop is connected to the inductor current Zero-crossing detection circuit ZCD. The output terminal of the RS flip-flop is connected to the driving module, and the driving module drives the gate of the switching tube Q1; the negative terminal of the diode is connected to GND through the resistor R11 and the resistor R12. The connection between the resistor R11 and the resistor R12 is connected to the non-inverting terminal of the error amplifier 1, and the inverting terminal of the error amplifier 1 is connected to the reference voltage VREF; the non-inverting terminal of the error amplifier is connected to the output terminal of the error amplifier through the capacitor C1, and the resistor R9 and the capacitor C2 is connected in series and then in parallel across capacitor C1. The negative terminal of the diode is connected to the source of the PMOS transistor PM1, the drain of the PMOS transistor PM1 is connected to the capacitor C4, the capacitor C4 is input to the input terminal of the current amplifier CA, and the resistor R13 is connected across the input terminal and the output terminal of the current amplifier. The output end of the amplifier CA is connected to the gate of the NMOS transistor NM1, and the source of the NM1 is connected to GND. The drain of NM1 is connected to the gate of PMOS transistor PM1, and the drain of PMOS transistor PM1 is connected to GND through resistor R14 and resistor R15. The negative input terminal of is connected to the reference voltage VREF. The drain end of PM1 is connected to capacitor C5, and the other end of C5 is connected to GND. The drain terminal of PM1 is connected to the positive terminal of LED1, the negative terminal of LED1 is connected to the non-inverting terminal of LED2, LED1, LED2...LEDN are connected in sequence, and the inverting terminal of LEDN is connected to GND. The reference voltage module provides the reference voltage VREF for the circuit.

This example works as follows:

Resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, op amp 1, op amp 2, op amp 3, multiplier 1, multiplier 2, multiplier 3, RS flip-flop, error Amplifier 1, capacitors C1, C2, C3, diodes D1, D2, D3, D4, D5, inductor L and other circuits constitute a power factor corrector. Properly reducing the input power factor can reduce the capacity of the output energy storage capacitor. Through the harmonic injection method, the input power factor is reduced, thereby reducing the capacity of the output energy storage capacitor. When the injected third harmonic content is 48.4% of the fundamental wave, the input power factor is 0.9, meeting the standards required by different countries for power factor, while the output capacitor capacity is reduced to 65.6% of the original.

In the attached picture

v _a ＝V _in *k _a *|sinωt|

v _b ＝V _in *k _b *|sinωt|

${\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; *</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}$

${\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}$

Among them, V _in is the magnitude of the input voltage, k _a , and k _b are proportional coefficients. v _a is the output voltage of operational amplifier 1, and v _b is obtained by dividing the voltage v _a by resistors R3 and R4.

After v _a is multiplied twice, v _a ³ is obtained. Resistors R5, R6, R7, R8 and operational amplifier 2 form a subtractor, where R5=R6=R7=R8, and finally the output of the subtractor

v _r ＝V _in k _b *|sinωt|-V _in ³ k _a ³ *|sinωt| ³

The output v _r of the subtractor contains the third harmonic, and v _r is multiplied by the output signal of the output voltage error amplifier. Work in the critical conduction mode of the inductor current. Guaranteed k _b :(V _in ² *k _a ³ )＝2.45:1.94, then the amplitude of the third harmonic in v _r is 48.4% of the fundamental amplitude. The main waveforms of the harmonic injection circuit are shown in Figure 2:

Capacitor C4, current amplifier CA, NMOS transistor MN1, and resistor 13 constitute a transient response enhancement network. The main function of the capacitor C4 is to convert the change of the output voltage into a current, convert the current into a voltage through the transimpedance amplifier, and then convert it into a current through NM1, so that the current is input to the gate of the power adjustment tube after passing through the amplifier , to charge the gate capacitor, so that the transient response is very fast, no large electrolytic capacitor is needed to smooth the output voltage, only a ceramic capacitor or film capacitor with a small value can stabilize the output voltage.

As shown in FIG. 3 , the waveform diagram of the circuit parameters in the first embodiment, it can be seen that the voltage in Vc already contains the third harmonic component.

As shown in FIG. 4 , it is a schematic structural diagram of Embodiment 2. In Embodiment 1, the output is a constant voltage. In some cases, a constant current drive is required for LEDs. Therefore, the present embodiment 2 is given. In this example, the LED driver can drive the LED with a constant current pair, the driving current is

I _LED =VREF/R13

The present invention provides two embodiments, the first is a constant voltage output, and the second is a constant current output. The capacitors in the two embodiments are ceramic capacitors or film capacitors, and large-capacity electrolytic capacitors are not needed.

In summary, the present invention proposes a LED driver without an electrolytic capacitor, which includes a rectifier bridge, a reference voltage generating module, a driving module, LED, a power transistor, an operational amplifier, an analog multiplier, a current amplifier, and a zero-crossing detection module ZCD, MOS tube, resistor, etc. The circuit in the present invention works in the critical conduction mode of the inductance current, automatically realizes power factor correction, uses harmonic components to reduce the peak value of input power, and can use capacitive elements with small capacitance, avoiding the use of large-capacity electrolytic capacitors, At the same time, the transient response enhancement network method is used to make the load transient response very fast, the anti-interference ability is enhanced, and the load regulation rate is high. It is also possible to avoid the use of large-capacity electrolytic capacitors to stabilize the output voltage. The failure of large-capacity electrolytic capacitors is an important reason for the failure rate of the power supply, so the greatest benefit of the present invention is to improve the reliability and life of the power supply.

Claims (1)

1. An LED driver without electrolytic capacitor is characterized by comprising a rectifier bridge, a reference voltage generation module, a driving module, an LED module, a switching tube Q1, a PMOS tube PM1, an NMOS tube MN1, a first operational amplifier, a second operational amplifier, a third operational amplifier, a first error operational amplifier, a second error operational amplifier, a first multiplier, a second multiplier, a third multiplier, an RS trigger, a current amplifier, a zero-crossing detection module ZCD, a resistor R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, a capacitor C1, C2, C3, C4, C5, a diode D5 and an inductor L; wherein,

the input end of the rectifier bridge is connected with an external alternating current power supply, and the output end of the rectifier bridge is connected with the anode of a diode D5 through an inductor L; the connection point of the inductor L and the output end of the rectifier bridge is grounded after passing through R1 and R2 in sequence; the connection point of R1 and R2 is connected with the positive input end of the first operational amplifier; the inverting input end of the first operational amplifier is grounded after passing through R3 and R4 in sequence, the output end of the first operational amplifier is connected with the inverting input end of the first operational amplifier, and the output end of the first operational amplifier is also connected with the first input end of the first multiplier, the second input end of the first multiplier and the first input end of the second multiplier; the output end of the first multiplier is connected with the second input end of the second multiplier; the output end of the second multiplier is connected with the inverting input end of the second operational amplifier after passing through R5; the connection point of R3 and R4 is connected with the positive input end of the second operational amplifier after passing through R7; the connection point of the R7 and the positive input end of the second operational amplifier is grounded after passing through the R8; the inverting input end of the second operational amplifier is connected with the output end of the second operational amplifier through the R6, and the output end of the second operational amplifier is connected with the first input end of the third multiplier; the second input end of the third multiplier is connected with the output end of the first error operational amplifier; the reverse input end of the first error operational amplifier is connected with the output end of the reference voltage generating module, the positive input end of the first error operational amplifier is connected with the cathode of the diode D5 after passing through R11, the connection point of the positive input end of the first error operational amplifier and R11 is connected with the ground after passing through R12, and the output end of the first error operational amplifier is connected with the positive input end of the first error operational amplifier after passing through C1; the second input end of the third multiplier is connected with the positive input end of the first error amplifier after passing through C2 and R9 in sequence; the output end of the third multiplier is connected with the reverse input end of the third operational amplifier; the positive input end of the third operational amplifier is connected with the source electrode of the switching tube Q1, and the output end of the third operational amplifier is connected with the R input end of the RS trigger; the S output end of the RS trigger is connected with the zero-crossing detection module ZCD, and the Q output end of the RS trigger is connected with the input end of the driving module; the output end of the driving module is connected with the grid electrode of the switching tube Q1; the drain electrode of the switching tube Q1 is connected with the connection point of the inductor L and the anode of the diode D5, and the connection point of the source electrode of the switching tube Q1 and the positive input end of the third operational amplifier is grounded after passing through R10; the cathode of the diode D5 is connected with the source electrode of the PMOS tube PM 1; the connection point of the cathode of the diode D5 and the source electrode of the PMOS tube PM1 is grounded after passing through C3; the grid electrode of the PMOS tube PM1 is connected with the output end of the second error operational amplifier and the drain electrode of the NMOS tube MN1, and the drain electrode of the PMOS tube PM1 is connected with the LED module; the reverse input end of the second error operational amplifier is connected with the output end of the reference voltage module, and the forward input end of the second error operational amplifier is connected with the drain electrode of the PMOS tube PM1 through R14; the connection point of the R14 and the positive input end of the second error operational amplifier is grounded after passing through the R15; the source electrode of the NMOS tube MN1 is grounded, and the grid electrode of the NMOS tube MN1 is connected with the output end of the current amplifier; the current amplifier is connected with the R13 in parallel, and the input end of the current amplifier is connected with the drain electrode of the PMOS transistor PM1 after passing through the C4; c5 is connected in parallel with the LED module.