CN104158165A - Surge protector and surge protection circuit with counting display - Google Patents
Surge protector and surge protection circuit with counting display Download PDFInfo
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- CN104158165A CN104158165A CN201410401771.1A CN201410401771A CN104158165A CN 104158165 A CN104158165 A CN 104158165A CN 201410401771 A CN201410401771 A CN 201410401771A CN 104158165 A CN104158165 A CN 104158165A
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Abstract
The invention discloses a surge protector and a surge protection circuit with counting display. The surge protection circuit with counting display comprises a base circuit used for receiving and outputting signals and distributing lightning energy discharged by discharge circuits of all stages in the surge protection circuit, a first-stage discharge circuit used for discharging lightning electricity, a second-stage discharge circuit used for discharging remaining residual voltage of the first-stage discharge circuit, a leakage detection circuit used for detecting whether the second-stage discharge circuit leaks electricity, a sampling and counting circuit used for recording the number of discharge times of the first-stage discharge circuit, a central processing circuit used for processing signals transmitted by the sampling and counting circuit and the leakage detection circuit, a display circuit used for giving a prompt on whether a surge discharge element needs to be replaced, and a power supply circuit used for supplying power to the sampling and counting circuit directly and supplying power to the central processing circuit, the leakage detection circuit and the display circuit through a switch. The surge protection circuit with counting display can self-check the service life of the surge discharge element and prompt replacement of the surge discharge element.
Description
Technical field
The present invention relates to a kind of surge protection field, particularly relate to a kind of Surge Protector and surge protection circuit showing with counting.
Background technology
Along with the development of computer technology, automatic control technology, information technology, the application of various forms of electronic systems day by day increase, this system has been widely used in industrial many departments and the sizable factory of scale complexity, because the operating voltage of these electronic system equipment is only several volts, electric current arrives a milliampere order of magnitude at microampere, the atmospheric electrical phenomena that occurring in nature often has and complicated on-the-spot interference signal are easy to cause loss of data, damage electronic system equipment, cause the serious accident of whole control system interruption, plant downtime.
In order to prevent the interference of thunder and lightning, can in electronic system, add Surge Protector.And common Surge Protector all cannot detect the life-span voluntarily at present, and cannot observe directly whether need to change Surge Protector, in the time changing, can exert an influence to original signal simultaneously.
Summary of the invention
The technical problem to be solved in the present invention be to provide a kind of can detect surge release element life-span, can point out and need to change the surge element of releasing, and the surge protection circuit that shows of the band counting that can not exert an influence to original signal while changing.
Be necessary in addition to provide a kind of Surge Protector of applying foregoing circuit.
For addressing the above problem, the invention provides a kind of surge protection circuit showing with counting, the surge protection circuit that described band counting shows comprises:
One-level discharge circuit, for the thunder and lightning electric weight of releasing;
Secondary discharge circuit, for the one-level discharge circuit residue residual voltage of releasing;
Whether electric-leakage detection circuit, leak electricity for detection of secondary discharge circuit;
Sampling counting circuit, for recording the number of times of releasing of one-level discharge circuit;
Central processing circuit, the signal of telecommunication sending for the treatment of sampling counting circuit and electric-leakage detection circuit;
Display circuit, central processing circuit shows the number of times of releasing of one-level discharge circuit for the signal controlling display circuit sending according to sampling counting circuit, or the maximum times that can release according to one-level discharge circuit judges whether to need to change and show the code of this one-level discharge circuit that need to change; The information whether described central processing circuit also leaks electricity for receiving the detected secondary discharge circuit of electric-leakage detection circuit, and detect that at electric-leakage detection circuit secondary discharge circuit when electric leakage controls the code of secondary discharge circuit that display circuit shows this electric leakage to point out this secondary discharge circuit to need to change.
Base circuit, for distributing the size of one-level discharge circuit and secondary thunder energy that discharge circuit is released;
Power circuit, for giving the power supply of sampling counting circuit, and powers to central processing circuit, electric-leakage detection circuit and display circuit by switch.
Further, described base circuit comprises that two are coordinated resistance R 1, R2, coordinate one end of resistance R 1 and the first end of one-level discharge circuit and input node S+ to be electrically connected, one end of described coordination resistance R 2 is electrically connected with the second end and the input node S-of described one-level discharge circuit, the other end of described coordination resistance R 2 is electrically connected with described secondary discharge circuit and output node P-, and the other end of described coordination resistance R 1 is electrically connected with described secondary discharge circuit and output node P+.
Further, described one-level discharge circuit comprises at least one gas discharge tube SA1, the first end of described gas discharge tube SA1 and the second end are all electrically connected with base circuit, and the 3rd end of described gas discharge tube SA1 is by the armature winding ground connection of current transformer in sampling counting circuit.
Further, described secondary discharge circuit comprises capacitor C 3, three sampling diode D2, D4, D5 and Transient Suppression Diode D3, one end of described capacitor C 3 is electrically connected with the anode of described sampling diode D2, the other end of described capacitor C 3 is connected with the cathodic electricity of described sampling diode D2, and the negative electrode of sampling diode D2 is electrically connected with electric-leakage detection circuit, the negative electrode of described sampling diode D4 is electrically connected with the anode of described sampling diode D5, the negative electrode of described sampling diode D5 is electrically connected with the anode of described sampling diode D2, the anode of described sampling diode D4 is connected with the cathodic electricity of described sampling diode D2, and the anode of described sampling diode D4 is electrically connected with the anode of described Transient Suppression Diode D3, the negative electrode of described Transient Suppression Diode D3 is electrically connected with base circuit, one end of described capacitor C 3 is electrically connected with described base circuit.
Further, described sampling counting circuit comprises current transformer T1, six resistance R 14, R26, R8, R27, R10, R19, two capacitor C 4, C5, two cycling circuits and chip IC 1, described current transformer T1 secondary winding and two resistance R 26, R14 are in parallel, one end of described current transformer T1 secondary winding is also electrically connected with one end of resistance R 8, and the other end of described current transformer T1 secondary winding is electrically connected with one end of resistance R 27, one end of described current transformer T armature winding is electrically connected with the 3rd end of one-level discharge circuit, the other end ground connection of described current transformer T1 armature winding, described two resistance R 8, the other end of R27 is connected with cycling circuit electrical connection by two, between described two cycling circuits, be provided with signals collecting node, and this node is electrically connected with the clock pins of chip IC 1, described resistance R 10 and capacitor C 4 parallel connections, and one end of described resistance R 10 is electrically connected with the clock pins of described chip IC 1, the other end of described resistance R 10 is directly electrically connected with the power supply in described power circuit, the reseting pin RST of described chip IC 1 connects with reference to ground by resistance R 19, the reseting pin RST of described chip IC 1 connects power circuit electrical connection by capacitor C 5, wherein nine output pin P1 to P9 of described chip IC 1 are electrically connected with described central processing circuit.
Further, described cycling circuit comprises that transient state suppresses voltage stabilizing didoe D8, three resistance R 9, R11, R12, capacitor C 7 and a triode Q3, described resistance R 11 and capacitor C 7 parallel connections, one end of described resistance R 11 is connected with the cathodic electricity that transient state suppresses voltage stabilizing didoe D8, the other end of described resistance R 11 is electrically connected with the anode that transient state suppresses voltage stabilizing didoe D8, one end of described resistance R 11 is electrically connected with one end of resistance R 12 by resistance R 9, the other end of described resistance R 11 is electrically connected with the other end of resistance R 12, one end of described resistance R 12 is electrically connected with the base stage of described triode Q3, the emitter of described triode Q3 is electrically connected with the other end of described resistance R 12, the collector electrode of described triode Q3 is electrically connected with the clock pins CLK of described chip IC 1.
Further, described electric-leakage detection circuit comprises five resistance R 3 to R6, R29, diode D6 and triode Q1, one end of described resistance R 29 is electrically connected with described secondary discharge circuit, the other end of described resistance R 29 is electrically connected with the anode of described diode D6 and the base stage of triode Q1, the negative electrode of described diode D6 is electrically connected with one end of described resistance R 6, and another termination of described resistance R 6 is with reference to ground; The collector electrode of described triode Q1 is electrically connected with central processing circuit by resistance R 5, the collector electrode of described triode Q1 is electrically connected with power circuit by resistance R 4, emitter one end of described triode Q1 is electrically connected with one end of described resistance R 3, and another termination of described resistance R 3 is with reference to ground.
Further, described central processing circuit comprises single-chip microcomputer U6, multiple energy-saving circuit, two capacitor C 13, C30 and resistance R 28; The power pin DVCC of described single-chip microcomputer U6 and with reference to being electrically connected by described capacitor C 30 between ground pin DVSS, described power pin DVCC be electrically connected with power circuit, described with reference to pin DVSS and reference be electrically connected; Wherein four I/O pin P1.0, P1.1, P1.2, P1.3, input pin XIN, test data input pin TDO, test clock output pin TCLK, test clock input pin TCK and the test pattern base pin selection TMS of described single-chip microcomputer U6 and the output corresponding electrical connection one by one of multiple energy-saving circuits; The earth terminal of described multiple energy-saving circuits all with reference to ground is electrically connected, the input of described multiple energy-saving circuits respectively with sample multiple outputs of counting circuit and be electrically connected; The reseting pin RST of described single-chip microcomputer U6 connects with reference to ground by capacitor C 13, and described reseting pin RST is electrically connected with power circuit by resistance R 28; Wherein five I/O pin P2.0, P2.1, P2.2, P2.3, the P2.4 of described single-chip microcomputer U6 are all electrically connected with described display circuit; One of them I/O pin P2.5 of described single-chip microcomputer U6 is electrically connected with the resistance R 5 in electric-leakage detection circuit.
Further, described each energy-saving circuit comprises field effect transistor Q2 and resistance R 18, the drain electrode of described field effect transistor Q2 is electrically connected with power circuit by resistance R 18, and the grid of described field effect transistor Q2 is electrically connected with output in sampling counting circuit, and the source electrode of described field effect transistor Q2 connects with reference to ground.
The present invention also provides a kind of Surge Protector;: described Surge Protector comprises the surge of upper shell, lower house, the component life of can self-inspection releasing release module, display and base; the described surge module of releasing is fixed in described upper shell; described base is fixed in described lower house; the described surge module of releasing is electrically connected with base by inserting terminal; described display is fixed on described surge and releases in module, and described display and the described surge module of releasing is electrically connected.
The surge leadage circuit that the present invention can release in module by surge detects the life-span of the element of releasing voluntarily, and testing result is shown by display, in the time that replacing surge is released module, base circuit can normally be worked, and therefore can not affect the transmission of original signal simultaneously.
Brief description of the drawings
Fig. 1 is the structural representation of the preferred embodiments of Surge Protector of the present invention.
Fig. 2 is the circuit theory diagrams of the preferred embodiments of the surge protection circuit of band counting of the present invention demonstration.
Fig. 3 is the schematic diagram of base circuit, one-level discharge circuit and secondary discharge circuit.
Fig. 4 is the schematic diagram of sampling counting circuit.
Fig. 5 is the schematic diagram of electric-leakage detection circuit.
Fig. 6 is the schematic diagram of central processing circuit.
Fig. 7 is the schematic diagram of energy-saving circuit and power circuit.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described.
As depicted in figs. 1 and 2; the preferred embodiments of Surge Protector of the present invention comprises the surge of upper shell 11, lower house 12, the component life of can self-inspection releasing release module 13, display 15 and base 14; the described surge module 13 of releasing is fixed in described upper shell 11; described base 14 is fixed in described lower house 12; the described surge module 13 of releasing is electrically connected with base 14 by inserting terminal; described display 15 is fixed on described surge and releases in module 13, and described display 15 and the described surge module 13 of releasing is electrically connected.
Described base 14 is provided with the base circuit 2 for connecting signal input and output, in described display 15, is provided with display circuit 9; The described surge module 13 of releasing is provided with surge leadage circuit, and described base circuit 2 be electrically connected the surge protection circuit that forms band and count demonstration with display circuit 9 by described surge leadage circuit.Described surge leadage circuit comprises: for the one-level discharge circuit 3 of the thunder and lightning electric weight of releasing, for the one-level discharge circuit 3 of releasing remain the secondary discharge circuit 4 of residual voltage, the electric-leakage detection circuit 6 that whether leaks electricity for detection of secondary discharge circuit 4, for detection of one-level discharge circuit 3 release the sampling counting circuit 5 of number of times, central processing circuit 7, display circuit 9 and the power circuit 8 of the signal that sends for the treatment of sampling counting circuit 5 and electric-leakage detection circuit 6.
Described secondary discharge circuit 4 is electrically connected with one-level discharge circuit 3 by base circuit 2, described power circuit 8 is provided with first node VCC and Section Point VDD, described first node VCC is directly electrically connected with power supply, described Section Point VDD is electrically connected with power supply by switch S 1, described power circuit 8 is given sampling counting circuit 5, central processing circuit 7, electric-leakage detection circuit 6 and display circuit 9 are powered, and sampling counting circuit 5 is directly electrically connected with power supply, described switch S 1 is for controlling central processing circuit 7, electric-leakage detection circuit 6 and display circuit 9, be described sampling counting circuit 5 first node VCC electrical connections, described central processing circuit 7, electric-leakage detection circuit 6 and display circuit 9 are electrically connected with Section Point VDD.
As shown in Figure 3, described base circuit 2 comprises that two are coordinated resistance R 1, R2, described coordination electricity group R1, one end of R2 is equipped with signal input node, described coordination resistance R 1, the other end of R2 is equipped with signal output node, coordinate one end of resistance R 1 and the first end of one-level discharge circuit 3 and input node S+ to be electrically connected, one end of described coordination resistance R 2 is electrically connected with the second end and the input node S-of described one-level discharge circuit 3, the other end of described coordination resistance R 2 is electrically connected with input and the output node P-of described secondary discharge circuit 4, the other end of described coordination resistance R 1 is electrically connected with output and the output node P+ of described secondary discharge circuit 4.
Described one-level discharge circuit 3 is gas discharge tube SA1, the first end of described gas discharge tube SA1 is electrically connected with one end of described coordination resistance R 1, the second end of described gas discharge tube SA1 is electrically connected with the one end of coordinating resistance R 2, and the 3rd end of described gas discharge tube SA1 is electrically connected with the current transformer in sampling counting circuit.In the time that applied voltage increases to the dielectric strength that exceedes gas in gas discharge tube SA1; the gap of two interpolars is by discharge breakdown; be converted into conduction state by original state of insulation; voltage after conducting between the each utmost point of discharge tube maintains the residual voltage level that electric arc channel determines of putting; therefore can play over-voltage and the Lightning Transient overcurrent effect of releasing, can protective circuit be struck by lightning.Certainly, in other embodiments, one-level discharge circuit 3 can be two or more gas discharge tube SA1.
Described secondary discharge circuit 4 comprises capacitor C 3, three sampling diode D2, D4, D5 and Transient Suppression Diode D3, one end of described capacitor C 3 is electrically connected with the anode of described sampling diode D2, the other end of described capacitor C 3 is connected with the cathodic electricity of described sampling diode D2, and the negative electrode of sampling diode D2 is electrically connected with electric-leakage detection circuit 6, the negative electrode of described sampling diode D4 is electrically connected with the anode of described sampling diode D5, the negative electrode of described sampling diode D5 is electrically connected with the anode of described sampling diode D2, the anode of described sampling diode D4 is connected with the cathodic electricity of described sampling diode D2, and the anode of described sampling diode D4 is electrically connected with the anode of described Transient Suppression Diode D3, the negative electrode of described Transient Suppression Diode D3 is electrically connected with the other end of the resistance R 1 of base circuit 2, one end of described electric capacity R3 is electrically connected with the other end of the resistance R 2 of described base circuit 2.Described secondary discharge circuit 4 is that the residual voltage that one-level discharge circuit 3 is stayed is discharged, and it is mainly the electric discharge between line and line.In the time that the two poles of the earth of moment twin zener dioder D3 are subject to transient state high energy impact events; it can be with 10 the speed of bearing 12 power second-times; the high impedance of its two interpolar is become to Low ESR; absorb the surge power up to thousands of watts; make the voltage clamp of two interpolars in a predetermined value; effectively protect the precision components in electronic circuit, avoid the damage of various surge pulses.
As shown in Figure 4, described sampling counting circuit 5 comprises current transformer T1, six resistance R 14, R26, R8, R27, R10, R19, two capacitor C 4, C5, two cycling circuits 51 and chip IC 1.The present embodiment chips IC1 adopts CD4040BCM, can also adopt in other embodiments other models that can substitute this chip IC 1, linage-counter such as more than ten low-power consumption binary string such as such as CD4060, CD4020 etc.
Described current transformer T1 secondary winding and two resistance R 26, R14 are in parallel, and one end of described current transformer T1 secondary winding is also electrically connected with one end of resistance R 8, and the other end of described current transformer T1 secondary winding is electrically connected with one end of resistance R 27; One end of described current transformer T armature winding is electrically connected with the 3rd end of one-level discharge circuit 3, i.e. the 3rd end of gas discharge tube SA1, the other end ground connection of described current transformer T1 armature winding.Described two resistance R 8, the other end of R27 is connected with cycling circuit 51 by two and is electrically connected, between described two cycling circuits 51, be provided with signals collecting node, and this acquisition node is electrically connected with the clock pins of chip IC 1, described resistance R 10 and capacitor C 4 parallel connections, and one end of described resistance R 10 is electrically connected with the clock pins of described chip IC 1, the other end of described resistance R 10 is directly electrically connected with the power supply in described power circuit 8, the reseting pin RST of described chip IC 1 connects with reference to ground by the 4th resistance R 19, the reseting pin RST of described chip IC 1 connects the first node of power circuit by capacitor C 5.Wherein nine output pin P1 to P9 of described chip IC 1 are electrically connected with described central processing circuit 7.
Described each cycling circuit 51 comprises that transient state suppresses voltage stabilizing didoe D8, three resistance R 9, R11, R12, capacitor C 7 and triode Q3.Described resistance R 11 and capacitor C 7 parallel connections, one end of described resistance R 11 is connected with the cathodic electricity that transient state suppresses voltage stabilizing didoe D8, the other end of described resistance R 11 is electrically connected with the anode that transient state suppresses voltage stabilizing didoe D8, one end of described resistance R 11 is electrically connected with one end of resistance R 12 by resistance R 9, the other end of described resistance R 11 is electrically connected with the other end of resistance R 12, one end of described resistance R 12 is electrically connected with the base stage of described triode Q3, the emitter of described triode Q3 is electrically connected with the other end of described resistance R 12, the collector electrode of described triode Q3 is electrically connected with the clock pins CLK of described chip IC 1.
When the gas discharge tube SA1 thunderstorm hour of releasing, the secondary meeting generation current of current transformer T1, make it produce a low level pulse at signals collecting node, chip IC 1 records this pulse signal, and chip IC 1 often receives pulsatile once signal and releases number of times with regard to increase once, and the number of times of simultaneously releasing is sent to central processing circuit 7 by signal.The sense of current that while releasing because of it, current transformer T1 time level produces is at every turn all likely different, therefore two cycling circuits 51 are set to ensure that release can record at every turn, detects accurately the number of times of releasing of gas discharge tube SA1.
As shown in Figure 5, described electric-leakage detection circuit 6 comprises five resistance R 3 to R6, R29, diode D6 and triode Q1, one end of described resistance R 29 is connected with the cathodic electricity that samples diode D2 in described secondary discharge circuit 4, the other end of described resistance R 29 is electrically connected with the anode of described diode D6 and the base stage of triode Q1, the negative electrode of described diode D6 is electrically connected with one end of described resistance R 6, and another termination of described resistance R 6 is with reference to ground; The collector electrode of described triode Q1 is electrically connected with central processing circuit 7 by resistance R 5, the collector electrode of described triode Q1 is electrically connected with the Section Point VDD of power circuit 8 by resistance R 4, emitter one end of described triode Q1 is electrically connected with one end of described resistance R 3, and another termination of described resistance R 3 is with reference to ground.The current potential at the negative pole place of described diode D4 is 0 under normal circumstances, described in the time of described transient diode D3 electric leakage, the current potential at the negative electrode place of diode D4 can raise along with the increase of transient diode D3 electric leakage, triode Q1 conducting in the time reaching set-point, the collector electrode output low level of triode Q1.
Please refer to Fig. 6, described central processing circuit 7 comprises single-chip microcomputer U6, multiple energy-saving circuit 71, two capacitor C 13, C30 and resistance R 28.In the present embodiment, single-chip microcomputer U6 adopts MSP430G2332, can also adopt in other embodiments other models that can substitute this single-chip microcomputer, for example ADUC7060, PIC16F616,80C51 etc.
The power pin DVCC of described single-chip microcomputer U6 and with reference to being electrically connected by described capacitor C 30 between ground pin DVSS, described power pin DVCC is electrically connected with receiver voltage VDD with power circuit 8, described with reference to ground pin DVSS and reference be electrically connected.Wherein four I/O pin P1.0, P1.1, P1.2, P1.3, input pin XIN, test data input pin TDO, test clock output pin TCLK, test clock input pin TCK and the test pattern base pin selection TMS of described single-chip microcomputer U6 and the output corresponding electrical connection one by one of multiple energy-saving circuits 71, the earth terminal of described multiple energy-saving circuit 71 all with reference to ground is electrically connected, and the input of described multiple energy-saving circuits 71 is electrically connected with the output interface that samples counting circuit 5 chips IC1 respectively.The reseting pin RST of described single-chip microcomputer U6 connects with reference to ground by capacitor C 13, and described reseting pin RST is electrically connected with power circuit 8 by resistance R 28.Wherein five I/O pin P2.0, P2.1, P2.2, P2.3, the P2.4 of described single-chip microcomputer U6 are all electrically connected with described display circuit 9; The tenth pin P2.5 of described single-chip microcomputer U6 is electrically connected with the resistance R 5 in electric-leakage detection circuit 6.
Please refer to Fig. 7, described each energy-saving circuit 71 comprises field effect transistor Q2 and resistance R 18, the drain electrode of described field effect transistor Q2 is electrically connected with power circuit 8 by resistance R 18, the grid of described field effect transistor Q2 is electrically connected with the output interface of sampling counting circuit 5 chips IC1, and the source electrode of described field effect transistor Q2 connects with reference to ground.Can find out that by power circuit 8 power supply is to be provided by battery, switch S 1 is generally in off-state, therefore under general state, only has the sampling counting circuit work to take power of low-power consumption, if the low and high level of its chip IC 1 output pin Q1-Q9 output is directly electrically connected with single-chip microcomputer U1, whether single-chip microcomputer works all can make shorter battery life by generation current, metal-oxide-semiconductor field effect transistor is voltage control device, the voltage range inner grid that can bear at metal-oxide-semiconductor field effect transistor and source electrode can generation currents, therefore the energy-saving circuit 71 that contains field effect transistor Q2 is set between chip IC 1 and single-chip microcomputer U6, thereby extend the useful life of battery.
Because described display circuit 9 is existing routine techniques, therefore do not repeat them here.
Particularly, in the time that gas discharge tube SA1 releases thunder and lightning electric weight, generation current in sampling counting circuit 5, chip IC 1 clock pins CLK will receive low level pulse, often receive pulsatile once signal, chip IC 1 just increases the record of once releasing, in the time pressing switch S 1, sample counting circuit 5 and send the signal of the number of times of releasing to single-chip microcomputer U6, after single-chip microcomputer U6 processes and receives the signal that chip IC 1 sends, to after signal conversion, send display circuit to, final its numerical value of releasing of screen display that shows, in the time that numerical value reaches the first preset value, display 15 shows replace, represent surge release module 13 need change, in the time that numerical value reaches the first preset value, display 15 shows fail, the module 13 of releasing expression surge lost efficacy and can not work and need change immediately.Electric-leakage detection circuit 6 sends voltage signal to single-chip microcomputer U6, in the time that its voltage signal exceedes the 3rd preset value, single-chip microcomputer U6 controls display 15 and is shown as replace, and in the time that its voltage signal exceedes the 4th preset value, single-chip microcomputer U6 controls display 15 and is shown as fail.When replacing surge is released module 13, release in module 13 because base circuit 2 is not arranged on surge, therefore in the time changing, can not affect the circuit of its signal transmission.For keeping the operating time of testing longer, therefore switch S 1 is set in power circuit 8, ensure, under the normal operation of sampling count detection circuit 5, to save to greatest extent power supply.
The present invention is by detecting the number of times of releasing of gas discharge tube SA1, whether detect the life-span of gas discharge tube SA1, by detected transient diode, whether D3 leaks electricity, carry out detected transient diode D3 and damage, there is self-checking function, in the time that replacing surge is released module 13, can not affect signal transmission simultaneously.
These are only embodiments of the present invention; not thereby limit the scope of the claims of the present invention; every equivalent structure that utilizes specification of the present invention and accompanying drawing content to do, is directly or indirectly used in other relevant technical fields, all in like manner within scope of patent protection of the present invention.
Claims (10)
1. the surge protection circuit showing with counting, is characterized in that: the surge protection circuit that described band counting shows comprises:
One-level discharge circuit, for the thunder and lightning electric weight of releasing;
Secondary discharge circuit, for the one-level discharge circuit residue residual voltage of releasing;
Whether electric-leakage detection circuit, leak electricity for detection of secondary discharge circuit;
Sampling counting circuit, for recording the number of times of releasing of one-level discharge circuit;
Central processing circuit, the signal of telecommunication sending for the treatment of sampling counting circuit and electric-leakage detection circuit;
Display circuit, central processing circuit shows the number of times of releasing of one-level discharge circuit for the signal controlling display circuit sending according to sampling counting circuit, or the maximum times that can release according to one-level discharge circuit judges whether to need to change and show the code of this one-level discharge circuit that need to change; The information whether described central processing circuit also leaks electricity for receiving the detected secondary discharge circuit of electric-leakage detection circuit, and detect that at electric-leakage detection circuit secondary discharge circuit when electric leakage controls the code of secondary discharge circuit that display circuit shows this electric leakage to point out this secondary discharge circuit to need to change.
Base circuit, for distributing the size of one-level discharge circuit and secondary thunder energy that discharge circuit is released;
Power circuit, for giving the power supply of sampling counting circuit, and powers to central processing circuit, electric-leakage detection circuit and display circuit by switch.
2. the surge protection circuit that band counting as claimed in claim 1 shows; it is characterized in that: described base circuit comprises that two are coordinated resistance R 1, R2; coordinate one end of resistance R 1 and the first end of one-level discharge circuit and input node S+ to be electrically connected; one end of described coordination resistance R 2 is electrically connected with the second end and the input node S-of described one-level discharge circuit; the other end of described coordination resistance R 2 is electrically connected with described secondary discharge circuit and output node P-, and the other end of described coordination resistance R 1 is electrically connected with described secondary discharge circuit and output node P+.
3. the surge protection circuit that band counting as claimed in claim 1 shows; it is characterized in that: described one-level discharge circuit comprises at least one gas discharge tube SA1; the first end of described gas discharge tube SA1 and the second end are all electrically connected with base circuit, and the 3rd end of described gas discharge tube SA1 is by the armature winding ground connection of current transformer in sampling counting circuit.
4. the surge protection circuit that band counting as claimed in claim 1 shows, it is characterized in that: described secondary discharge circuit comprises capacitor C 3, three sampling diode D2, D4, D5 and Transient Suppression Diode D3, one end of described capacitor C 3 is electrically connected with the anode of described sampling diode D2, the other end of described capacitor C 3 is connected with the cathodic electricity of described sampling diode D2, and the negative electrode of sampling diode D2 is electrically connected with electric-leakage detection circuit, the negative electrode of described sampling diode D4 is electrically connected with the anode of described sampling diode D5, the negative electrode of described sampling diode D5 is electrically connected with the anode of described sampling diode D2, the anode of described sampling diode D4 is connected with the cathodic electricity of described sampling diode D2, and the anode of described sampling diode D4 is electrically connected with the anode of described Transient Suppression Diode D3, the negative electrode of described Transient Suppression Diode D3 is electrically connected with base circuit, one end of described capacitor C 3 is electrically connected with described base circuit.
5. the surge protection circuit that band counting as claimed in claim 1 shows, it is characterized in that: described sampling counting circuit comprises current transformer T1, six resistance R 14, R26, R8, R27, R10, R19, two capacitor C 4, C5, two cycling circuits and chip IC 1, described current transformer T1 secondary winding and two resistance R 26, R14 are in parallel, one end of described current transformer T1 secondary winding is also electrically connected with one end of resistance R 8, and the other end of described current transformer T1 secondary winding is electrically connected with one end of resistance R 27, one end of described current transformer T armature winding is electrically connected with the 3rd end of one-level discharge circuit, the other end ground connection of described current transformer T1 armature winding, described two resistance R 8, the other end of R27 is connected with cycling circuit electrical connection by two, between described two cycling circuits, be provided with signals collecting node, and this node is electrically connected with the clock pins of chip IC 1, described resistance R 10 and capacitor C 4 parallel connections, and one end of described resistance R 10 is electrically connected with the clock pins of described chip IC 1, the other end of described resistance R 10 is directly electrically connected with the power supply in described power circuit, the reseting pin RST of described chip IC 1 connects with reference to ground by resistance R 19, the reseting pin RST of described chip IC 1 connects power circuit electrical connection by capacitor C 5, wherein nine output pin P1 to P9 of described chip IC 1 are electrically connected with described central processing circuit.
6. the surge protection circuit that band counting as claimed in claim 5 shows, it is characterized in that: described cycling circuit comprises that transient state suppresses voltage stabilizing didoe D8, three resistance R 9, R11, R12, capacitor C 7 and a triode Q3, described resistance R 11 and capacitor C 7 parallel connections, one end of described resistance R 11 is connected with the cathodic electricity that transient state suppresses voltage stabilizing didoe D8, the other end of described resistance R 11 is electrically connected with the anode that transient state suppresses voltage stabilizing didoe D8, one end of described resistance R 11 is electrically connected with one end of resistance R 12 by resistance R 9, the other end of described resistance R 11 is electrically connected with the other end of resistance R 12, one end of described resistance R 12 is electrically connected with the base stage of described triode Q3, the emitter of described triode Q3 is electrically connected with the other end of described resistance R 12, the collector electrode of described triode Q3 is electrically connected with the clock pins CLK of described chip IC 1.
7. the surge protection circuit that band counting as claimed in claim 1 shows, it is characterized in that: described electric-leakage detection circuit comprises five resistance R 3 to R6, R29, diode D6 and triode Q1, one end of described resistance R 29 is electrically connected with described secondary discharge circuit, the other end of described resistance R 29 is electrically connected with the anode of described diode D6 and the base stage of triode Q1, the negative electrode of described diode D6 is electrically connected with one end of described resistance R 6, and another termination of described resistance R 6 is with reference to ground; The collector electrode of described triode Q1 is electrically connected with central processing circuit by resistance R 5, the collector electrode of described triode Q1 is electrically connected with power circuit by resistance R 4, emitter one end of described triode Q1 is electrically connected with one end of described resistance R 3, and another termination of described resistance R 3 is with reference to ground.
8. the surge protection circuit that band counting as claimed in claim 1 shows, is characterized in that: described central processing circuit comprises single-chip microcomputer U6, multiple energy-saving circuit, two capacitor C 13, C30 and resistance R 28; The power pin DVCC of described single-chip microcomputer U6 and with reference to being electrically connected by described capacitor C 30 between ground pin DVSS, described power pin DVCC be electrically connected with power circuit, described with reference to pin DVSS and reference be electrically connected; Wherein four I/O pin P1.0, P1.1, P1.2, P1.3, input pin XIN, test data input pin TDO, test clock output pin TCLK, test clock input pin TCK and the test pattern base pin selection TMS of described single-chip microcomputer U6 and the output corresponding electrical connection one by one of multiple energy-saving circuits; The earth terminal of described multiple energy-saving circuits all with reference to ground is electrically connected, the input of described multiple energy-saving circuits respectively with sample multiple outputs of counting circuit and be electrically connected; The reseting pin RST of described single-chip microcomputer U6 connects with reference to ground by capacitor C 13, and described reseting pin RST is electrically connected with power circuit by resistance R 28; Wherein five I/O pin P2.0, P2.1, P2.2, P2.3, the P2.4 of described single-chip microcomputer U6 are all electrically connected with described display circuit; One of them I/O pin P2.5 of described single-chip microcomputer U6 is electrically connected with the resistance R 5 in electric-leakage detection circuit.
9. the surge protection circuit that band counting as claimed in claim 8 shows; it is characterized in that: described each energy-saving circuit comprises field effect transistor Q2 and resistance R 18; the drain electrode of described field effect transistor Q2 is electrically connected with power circuit by resistance R 18; the grid of described field effect transistor Q2 is electrically connected with output in sampling counting circuit, and the source electrode of described field effect transistor Q2 connects with reference to ground.
10. a Surge Protector; it is characterized in that: described Surge Protector comprises the surge of upper shell, lower house, the component life of can self-inspection releasing release module, display and base; the described surge module of releasing is fixed in described upper shell; described base is fixed in described lower house; the described surge module of releasing is electrically connected with base by inserting terminal; described display is fixed on described surge and releases in module, and described display and the described surge module of releasing is electrically connected.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410401771.1A CN104158165B (en) | 2014-08-14 | 2014-08-14 | Surge protector and surge protection circuit with counting display |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410401771.1A CN104158165B (en) | 2014-08-14 | 2014-08-14 | Surge protector and surge protection circuit with counting display |
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| CN104158165A true CN104158165A (en) | 2014-11-19 |
| CN104158165B CN104158165B (en) | 2017-05-03 |
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| CN201410401771.1A Active CN104158165B (en) | 2014-08-14 | 2014-08-14 | Surge protector and surge protection circuit with counting display |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105720568A (en) * | 2016-04-13 | 2016-06-29 | 重庆正博仪器工业有限公司 | Conveniently-replaced on-site surge protective device with automatic service life detection function |
| CN108683170A (en) * | 2018-06-11 | 2018-10-19 | 重庆正博仪器工业有限公司 | Surge protection circuit with failure anticipation function |
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| US4743999A (en) * | 1987-02-13 | 1988-05-10 | Curtis Manufacturing Company, Inc. | Rotary telephone line surge protector and system |
| CN1744406A (en) * | 2005-06-27 | 2006-03-08 | 孙巍巍 | On-line integral pluggable signal circuit surge protector |
| CN101394083A (en) * | 2007-09-20 | 2009-03-25 | 孙巍巍 | Surge protector having novel mounting mode |
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| CN105720568B (en) * | 2016-04-13 | 2018-02-02 | 重庆正博仪器工业有限公司 | A kind of tape lifetime Autonomous test and the live Surge Protector being conveniently replaceable |
| CN108683170A (en) * | 2018-06-11 | 2018-10-19 | 重庆正博仪器工业有限公司 | Surge protection circuit with failure anticipation function |
| CN108683170B (en) * | 2018-06-11 | 2019-06-18 | 重庆正博仪器工业有限公司 | Surge protection circuit with failure anticipation function |
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|---|---|
| CN104158165B (en) | 2017-05-03 |
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