CN104142886B - ARM assembly codes debug processing method and processing device - Google Patents
ARM assembly codes debug processing method and processing device Download PDFInfo
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Abstract
The embodiment of the present invention provides a kind of ARM assembly codes debugging processing method and processing device, and this method includes：According to transformation rule, it is the ARM assembly codes represented using C++ grammatical forms that ARM assembly codes are converted into ARM compilation simulation codes ASC, the ASC；Open environment is integrated using C++ to debug the ASC.In the embodiment of the present invention, ARM assembly codes are converted to by ASC according to transformation rule, then can application C++IDE debugs to the ASC, without depending on the specific emulator of specialty again, quick support ARM latest command collection can also be realized so that the exploitation of Related product is more flexible, expansible.
Description
Technical field
The present invention relates to the communication technology, more particularly to a kind of ARM assembly codes debugging processing method and processing device.
Background technology
Advanced Reduced Instruction Set machine（Advanced RISC Machines, abbreviation ARM）Architecture is big at present
Area is used in mobile platform, such as mobile phone, tablet personal computer etc..Due to the sensitiveness to power consumption, exploitation low-power consumption, high-performance
Application turn into one of critical path of lifting Consumer's Experience.
It is general to be entered using compilation and its variant, such as inline assembler, Intrinsic modes for performance-sensitive code
Row is write, and wherein Intrinsic is the grammer for being used to substitute inline assembler specific to certain compiler.Inline assembler and
Intrinsic is required for specific compiler to support, especially, different compiler branch is also needed to for different Intrinsic
Hold, therefore the portability of code can be reduced using Intrinsic.And common compilation then only needs corresponding assembler to support
, transplant better performances.But writing for assembly code easily malfunctions relative to writing for the codes such as C++, thus collect
The debugging of code is particularly important.As ARM instruction set framework constantly upgrades, if carrying out single-step debug without emulator,
So enter that line function, functional module are integrated will to become abnormal difficult.
In the prior art, it is to use corresponding isa simulator for the debugging of ARM assembly instructions, such as WinCE institutes
The Visual Studio used, Saipan（Symbian）The Real View external members of Carbide, ARM official used in system.
But using the method for prior art, if exploitation, debugging new instruction set code and needing to wait simulated environment
Renewal, and the renewal time of these environment can not also ensure, often influence the development progress of product.
The content of the invention
The present invention provides a kind of ARM assembly codes debugging processing method and processing device, must make for solving ARM assembly codes
The problem of being debugged with particular simulator.
First aspect of the embodiment of the present invention provides a kind of ARM assembly codes debugging processing method, including：
According to transformation rule, ARM assembly codes are converted into ARM compilation simulation codes ASC, the ASC to use C++ languages
The ARM assembly codes that method form represents；
Open environment is integrated using C++ to debug the ASC.
With reference in a first aspect, in the first possible embodiment of first aspect, the transformation rule includes following
One or a combination set of each conversion sub-rule：
ARM ordinary instructions conversion sub-rule, ARM registers conversion sub-rule, ARM constants conversion sub-rule, the barrel-shaped shiftings of ARM
Position device conversion sub-rule, NEON scalars conversion sub-rule, ARM Neon instruction conversion sub-rules.
With reference to the first possible embodiment of first aspect, in second of possible embodiment of first aspect
In, the ARM ordinary instructions conversion sub-rule includes：The ARM ordinary instructions are converted to the function in C++ grammatical forms.
With reference to the first possible embodiment of first aspect, in the third possible embodiment of first aspect
In, the ARM registers conversion sub-rule includes：The ARM registers are converted to the global variable in C++ grammatical forms.
With reference to the first possible embodiment of first aspect, in the 4th kind of possible embodiment of first aspect
In, the ARM constants conversion sub-rule includes：The ARM constants are converted to the constant in C++ grammatical forms.
With reference to the first possible embodiment of first aspect, in the 5th kind of possible embodiment of first aspect
In, the NEON scalars conversion sub-rule includes：The NEON scalars are converted to the array and constant in C++ grammatical forms,
Wherein, the constant is the index of the array.
With reference to the first possible embodiment of first aspect, in the 6th kind of possible embodiment of first aspect
In, the ARM barrel shifters conversion sub-rule includes：The ARM barrel shifters are converted to piece in C++ grammatical forms
Act value.
With reference to the first possible embodiment of first aspect, in the 7th kind of possible embodiment of first aspect
In, the ARM Neon instructions conversion sub-rule includes：ARM Neon instructions are converted to the object in C++ grammatical forms
And member function.
Second aspect of the embodiment of the present invention provides a kind of ARM assembly codes debugging processing unit, including：
Modular converter, for according to transformation rule, ARM assembly codes are converted into ARM compilation simulation codes ASC, it is described
ASC is the ARM assembly codes represented using C++ grammatical forms；
Debugging module, integrate open environment for application C++ and the ASC is debugged.
With reference to second aspect, in the first possible embodiment of second aspect, the transformation rule includes following
One or a combination set of each conversion sub-rule：
ARM ordinary instructions conversion sub-rule, ARM registers conversion sub-rule, ARM constants conversion sub-rule, the barrel-shaped shiftings of ARM
Position device conversion sub-rule, NEON scalars conversion sub-rule, ARM Neon instruction conversion sub-rules.
With reference to the first possible embodiment of second aspect, in second of possible embodiment of second aspect
In, the ARM ordinary instructions conversion sub-rule includes：The ARM ordinary instructions are converted to the function in C++ grammatical forms.
With reference to the first possible embodiment of second aspect, in the third possible embodiment of second aspect
In, the ARM registers conversion sub-rule includes：The ARM registers are converted to the global variable in C++ grammatical forms.
With reference to the first possible embodiment of second aspect, in the 4th kind of possible embodiment of second aspect
In, the ARM constants conversion sub-rule includes：The ARM constants are converted to the constant in C++ grammatical forms.
With reference to the first possible embodiment of second aspect, in the 5th kind of possible embodiment of second aspect
In, the NEON scalars conversion sub-rule includes：The NEON scalars are converted to the array and constant in C++ grammatical forms,
Wherein, the constant is the index of the array.
With reference to the first possible embodiment of second aspect, in the 6th kind of possible embodiment of second aspect
In, the ARM barrel shifters conversion sub-rule includes：The ARM barrel shifters are converted to piece in C++ grammatical forms
Act value.
With reference to the first possible embodiment of second aspect, in the 7th kind of possible embodiment of second aspect
In, the ARM Neon instructions conversion sub-rule includes：ARM Neon instructions are converted to the object in C++ grammatical forms
And member function.
In the embodiment of the present invention, ARM assembly codes are converted to by ASC according to transformation rule, then can application C++
IDE debugs to the ASC, without depending on the specific emulator of specialty again, can also realize that quick support ARM is newest
Instruction set so that the exploitation of Related product is more flexible, expansible.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are this hairs
Some bright embodiments, for those of ordinary skill in the art, without having to pay creative labor, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the schematic flow sheet that ARM assembly codes provided by the invention debug processing method embodiment one；
Fig. 2 is the structural representation that ARM assembly codes provided by the invention debug processing unit embodiment one.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
Part of the embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
Fig. 1 is the schematic flow sheet that ARM assembly codes provided by the invention debug processing method embodiment one, such as Fig. 1 institutes
Show, the flow includes：
S101, according to transformation rule, ARM assembly codes are converted into ARM compilation simulation codes（ARM Simulated
Code, abbreviation ASC）, the ASC is the ARM assembly codes represented using C++ grammatical forms.
The transformation rule is the rule that ARM assembly codes are converted to the ARM assembly codes represented according to C++ grammatical forms
Then.
S102, using C++ integrate open environment（C++Integrated Development Environment, abbreviation C+
+IDE）Above-mentioned ASC is debugged.
In the present embodiment, ARM assembly codes are converted to by ASC according to transformation rule, then C++IDE pairs of can application
The ASC is debugged, and without depending on the emulator of specialty again, can also realize quick support ARM latest command collection so that
The exploitation of Related product is more flexible, expansible.
Further, above-mentioned transformation rule includes one or a combination set of following conversion sub-rule：ARM ordinary instructions are changed
Sub-rule, ARM registers conversion sub-rule, ARM constants conversion sub-rule, ARM barrel shifters conversion sub-rule, NEON scalars
Change sub-rule, ARM Neon instruction conversion sub-rules.
According to above-mentioned conversion sub-rule, when realizing conversion, ARM assembly codes are divided into ARM ordinary instructions, ARM is posted
Storage, ARM constants, ARM barrel shifters, NEON scalars, ARM Neon instructions, so enter respectively according to above-mentioned conversion sub-rule
Row conversion, to obtain the ASC after changing, it can so utilize the global variable in C++ codes, function, grand, enumerated value, heavy duty
Etc. characteristic, the code that can be debugged in C++IDE is obtained according to above-mentioned transformation rule.
For example, ARM ordinary instructions conversion sub-rule can be converted to ARM ordinary instructions in C++ grammatical forms
Function, such as " add " is converted to " add () ", " add " is ARM ordinary instructions, and " add () " is in C++ grammatical forms
Function.
Similarly, ARM registers conversion sub-rule can be to be converted to the ARM registers in C++ grammatical forms
Global variable, for example, by " r0, r1, r2 " are converted to " r0, r1, r2 "；By " q8, d0, d4 " are converted to " q8, d0, d4 ".
ARM constants conversion sub-rule can be that the ARM constants are converted to the constant in C++ grammatical forms, for example, will
" #2 " is converted to " 2 ".
NEON scalars conversion sub-rule can be that the NEON scalars are converted into array in C++ grammatical forms and often
Amount, such as the NEON scalars " d30 [0] " in ARM assembly codes are converted to " d30,0 ", wherein " 0 " represents array d30's
Index.
ARM barrel shifters conversion sub-rule can be to be converted to the ARM barrel shifters in C++ grammatical forms
Enumerated value, such as " lsl " is converted to " lsl ".
ARM Neon instruction conversion sub-rules can be that ARM Neon instructions are converted to pair in C++ grammatical forms
As with member function for example, " vmull.u16 " is converted to " vmull.u16 ".
Certainly, it is not limited during specific implementation with above-mentioned example.
After above-mentioned ASC is got, in order that being run after the ASC energy in C++IDE, further added in ASC
Program runs the time limit, when being run with obtaining the ASC that can be run in C++IDE（ASC Run Time, abbreviation ASC RT）.
Specifically, above-mentioned transformation rule can be represented with transformation rule table, can refer to table 1.
Table 1
Based on above-mentioned transformation rule, the front and rear code of explanation conversion by taking table 2 as an example.
Table 2
| ARM assembly codes | ASC |
| Add r0, r1, r2,1sl#2 | add(r0,r1,r2,ls1,2); |
| vmull.u16q8,d24,d30[0] | vmull.u16(q8,d24,d30,0); |
| Vmull.s32 q8, d0, d4 | vmull.s32(q8,d0,d4); |
It should be noted that by above-mentioned ASC RT into C++IDE after, ASC RT can be based on C++, realize that ASC is respectively emulated
The actual functional capability of instruction.Illustrate：
Example 1：Instruct, be implemented as follows for ARM elementary instructions add：
Example 2：For Neon vmull.u16 emulator commands, it is implemented as follows：
void VMULL::u16(Qd, Dn, Dm, lane)
{
Extract Dn [0] high and low 16
Extract Dn [1] high and low 16
Low 16 of Dn [0] are multiplied with Dm the lane element, is as a result put into Qd [0]
High 16 of Dn [0] are multiplied with Dm the lane element, is as a result put into Qd [1]
Low 16 of Dn [1] are multiplied with Dm the lane element, is as a result put into Qd [2]
Low 16 of Dn [1] are multiplied with Dm the lane element, is as a result put into Qd [3]
}
Example 3：For Neon vmull.s32 emulator commands, it is implemented as follows：
void VMULL::s32(Qd,Dn,Dm)
{
Extract Dn high and low 16
Extract Dm high and low 16
64 multiplications are carried out by low the 16 of Dn, Dm, are as a result put into low 32 of Qd
64 multiplications are carried out by high the 16 of Dn, Dm, are as a result put into the high 32 of Qd
}
Further, debugged based on C++IDE, ASC RT can be in any C++IDE debuggers（Debugger）In
Debugged, by taking the actual code fragment in Table 3 below as an example, illustrated.
Table 3
Start C++IDE, it is assumed that run to " vmull.s32 (q8, d0, d4)；" sentence, the sentence is debugged, below
Code is the actual code logic of vmull.s32 (q8, d0, d4) in ASC RT：
Wherein, Qd, Dn, Dm are three parameters, are consistent on grammatical form with actual parameter q8, d0, d4.Test table
Bright, result after the debugging of above-mentioned sentence and the result debugged in true ARM environment are consistent.Sentence debugging finishes, and enters
And carry out next statement " vmull.s32 (q9, d1, d5)；" debugging.
Fig. 2 is the structural representation that ARM assembly codes provided by the invention debug processing unit embodiment one, such as Fig. 2 institutes
Show, described device includes：Modular converter 201 and debugging module 202, wherein：
Modular converter 201, for according to transformation rule, ARM assembly codes to be converted into ARM compilation simulation code ASC, institute
It is the ARM assembly codes represented using C++ grammatical forms to state ASC；Debugging module 202, open environment pair is integrated for application C++
The ASC is debugged.
Above-mentioned module is used to perform preceding method embodiment, and its implementing principle and technical effect is similar, will not be repeated here.
Further, the transformation rule includes one or a combination set of following conversion sub-rule：ARM ordinary instructions are changed
Sub-rule, ARM registers conversion sub-rule, ARM constants conversion sub-rule, ARM barrel shifters conversion sub-rule, NEON scalars
Change sub-rule, ARM Neon instruction conversion sub-rules.
Illustrate：The ARM ordinary instructions conversion sub-rule includes：The ARM ordinary instructions are converted into C++ grammers
Function in form.The ARM registers conversion sub-rule includes：The ARM registers are converted in C++ grammatical forms
Global variable.The ARM constants conversion sub-rule includes：The ARM constants are converted to the constant in C++ grammatical forms.Institute
Stating NEON scalars conversion sub-rule includes：The NEON scalars are converted to the array and constant in C++ grammatical forms, wherein,
The constant is the index of the array.The ARM barrel shifters conversion sub-rule includes：By the ARM barrel shifters
Be converted to the enumerated value in C++ grammatical forms.The ARM Neon instructions conversion sub-rule includes：The ARM Neon are instructed
Be converted to the object and member function in C++ grammatical forms.
The embodiment of the present invention also provides a kind of ARM assembly codes debugging processing unit, including：Processor.
The processor is used for according to transformation rule, and ARM assembly codes are converted into ARM compilation simulation codes ASC, described
ASC is the ARM assembly codes represented using C++ grammatical forms；Open environment is integrated using C++ to debug the ASC.
Wherein, the transformation rule includes one or a combination set of following conversion sub-rule：ARM ordinary instructions change cuckoo
Then, ARM registers conversion sub-rule, ARM constants conversion sub-rule, ARM barrel shifters conversion sub-rule, the conversion of NEON scalars
Sub-rule, ARM Neon instruction conversion sub-rules.
Specifically, for example, ARM ordinary instructions conversion sub-rule includes：The ARM ordinary instructions are converted to
Function in C++ grammatical forms.The ARM registers conversion sub-rule includes：The ARM registers are converted into C++ grammers
Global variable in form.The ARM constants conversion sub-rule includes：The ARM constants are converted in C++ grammatical forms
Constant.The NEON scalars conversion sub-rule includes：The NEON scalars are converted into array in C++ grammatical forms and often
Amount, wherein, the constant is the index of the array.The ARM barrel shifters conversion sub-rule includes：By the ARM buckets
Shape shift unit is converted to the enumerated value in C++ grammatical forms.The ARMNeon instructions conversion sub-rule includes：By the ARM
Neon instructions are converted to object and member function in C++ grammatical forms.
The device is used to perform preceding method embodiment, and its implementing principle and technical effect is similar, will not be repeated here.
In several embodiments provided by the present invention, it should be understood that disclosed apparatus and method, it can be passed through
Its mode is realized.For example, device embodiment described above is only schematical, for example, the division of the unit, only
Only a kind of division of logic function, there can be other dividing mode when actually realizing, such as multiple units or component can be tied
Another system is closed or is desirably integrated into, or some features can be ignored, or do not perform.It is another, it is shown or discussed
Mutual coupling or direct-coupling or communication connection can be the INDIRECT COUPLINGs or logical by some interfaces, device or unit
Letter connection, can be electrical, mechanical or other forms.
The unit illustrated as separating component can be or may not be physically separate, show as unit
The part shown can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple
On NE.Some or all of unit therein can be selected to realize the mesh of this embodiment scheme according to the actual needs
's.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, can also
That unit is individually physically present, can also two or more units it is integrated in a unit.Above-mentioned integrated list
Member can both be realized in the form of hardware, can also be realized in the form of hardware adds SFU software functional unit.
The above-mentioned integrated unit realized in the form of SFU software functional unit, can be stored in one and computer-readable deposit
In storage media.Above-mentioned SFU software functional unit is stored in a storage medium, including some instructions are causing a computer
Equipment（Can be personal computer, server, or network equipment etc.）Or processor（processor）It is each to perform the present invention
The part steps of embodiment methods described.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage（Read-
Only Memory, ROM）, random access memory（Random Access Memory, RAM）, magnetic disc or CD etc. it is various
Can be with the medium of store program codes.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than its limitations；To the greatest extent
The present invention is described in detail with reference to foregoing embodiments for pipe, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, either which part or all technical characteristic are entered
Row equivalent substitution；And these modifications or replacement, the essence of appropriate technical solution is departed from various embodiments of the present invention technology
The scope of scheme.
Claims (2)
1. a kind of ARM assembly codes debug processing method, it is characterised in that including：
According to transformation rule, ARM assembly codes are converted into ARM compilation simulation codes ASC, the ASC to use C++ grammer shapes
The ARM assembly codes that formula represents；
Open environment is integrated using C++ to debug the ASC；
The transformation rule includes one or a combination set of following conversion sub-rule：
ARM ordinary instructions conversion sub-rule, ARM registers conversion sub-rule, ARM constants conversion sub-rule, ARM barrel shifters
Change sub-rule, NEON scalars conversion sub-rule, ARM Neon instruction conversion sub-rules；
The ARM ordinary instructions conversion sub-rule includes：The ARM ordinary instructions are converted to the function in C++ grammatical forms；
The ARM registers conversion sub-rule includes：The ARM registers are converted to the global variable in C++ grammatical forms；
The ARM constants conversion sub-rule includes：The ARM constants are converted to the constant in C++ grammatical forms；
The NEON scalars conversion sub-rule includes：The NEON scalars are converted to the array and constant in C++ grammatical forms,
Wherein, the constant is the index of the array；
The ARM barrel shifters conversion sub-rule includes：The ARM barrel shifters are converted in C++ grammatical forms
Enumerated value；
The ARM Neon instructions conversion sub-rule includes：ARM Neon instructions are converted to pair in C++ grammatical forms
As and member function.
2. a kind of ARM assembly codes debug processing unit, it is characterised in that including：
Modular converter, for according to transformation rule, ARM assembly codes are converted into ARM compilations simulation code ASC, the ASC to be
The ARM assembly codes represented using C++ grammatical forms；
Debugging module, integrate open environment for application C++ and the ASC is debugged；
The transformation rule includes one or a combination set of following conversion sub-rule：
ARM ordinary instructions conversion sub-rule, ARM registers conversion sub-rule, ARM constants conversion sub-rule, ARM barrel shifters
Change sub-rule, NEON scalars conversion sub-rule, ARM Neon instruction conversion sub-rules；
The ARM ordinary instructions conversion sub-rule includes：The ARM ordinary instructions are converted to the letter in C++ grammatical forms
Number；
The ARM registers conversion sub-rule includes：The ARM registers are converted to the global variable in C++ grammatical forms；
The ARM constants conversion sub-rule includes：The ARM constants are converted to the constant in C++ grammatical forms；
The NEON scalars conversion sub-rule includes：The NEON scalars are converted to the array and constant in C++ grammatical forms,
Wherein, the constant is the index of the array；
The ARM barrel shifters conversion sub-rule includes：The ARM barrel shifters are converted in C++ grammatical forms
Enumerated value；
The ARM Neon instructions conversion sub-rule includes：ARM Neon instructions are converted to pair in C++ grammatical forms
As and member function.
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| CN1228560A (en) * | 1998-01-30 | 1999-09-15 | 日本电气株式会社 | Source code converter processing method and machine-readable media storing it |
| CN101251823A (en) * | 2008-03-17 | 2008-08-27 | 北京天碁科技有限公司 | DSP assembly language program verification method and device |
| CN102830975A (en) * | 2012-08-15 | 2012-12-19 | 深圳市翌日科技有限公司 | Method and device for code conversion from assembly language to high-level language |
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| US7516441B2 (en) * | 2001-06-04 | 2009-04-07 | Microsoft Corporation | Method and system for program editing and debugging in a common language runtime environment |
| US20050114638A1 (en) * | 2003-11-25 | 2005-05-26 | Chen Ernest P. | Hardware assisted assembly code debugging |
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| CN1228560A (en) * | 1998-01-30 | 1999-09-15 | 日本电气株式会社 | Source code converter processing method and machine-readable media storing it |
| CN101251823A (en) * | 2008-03-17 | 2008-08-27 | 北京天碁科技有限公司 | DSP assembly language program verification method and device |
| CN102830975A (en) * | 2012-08-15 | 2012-12-19 | 深圳市翌日科技有限公司 | Method and device for code conversion from assembly language to high-level language |
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