CN104104379B - A kind of logic level signal transmission method and device - Google Patents

A kind of logic level signal transmission method and device Download PDF

Info

Publication number
CN104104379B
CN104104379B CN201410324072.1A CN201410324072A CN104104379B CN 104104379 B CN104104379 B CN 104104379B CN 201410324072 A CN201410324072 A CN 201410324072A CN 104104379 B CN104104379 B CN 104104379B
Authority
CN
China
Prior art keywords
logic level
level signal
signal
triode
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201410324072.1A
Other languages
Chinese (zh)
Other versions
CN104104379A (en
Inventor
陈守和
刘凌云
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huizhou Foryou General Electronics Co Ltd
Original Assignee
Huizhou Foryou General Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huizhou Foryou General Electronics Co Ltd filed Critical Huizhou Foryou General Electronics Co Ltd
Priority to CN201410324072.1A priority Critical patent/CN104104379B/en
Publication of CN104104379A publication Critical patent/CN104104379A/en
Application granted granted Critical
Publication of CN104104379B publication Critical patent/CN104104379B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The present invention provides a kind of logic level signal transmission method and device, and method includes:Produced after first logic level signal of transmission is overlapped with the second logic level signal and be superimposed logic level signal, the 3rd logic level signal and the 4th logic level signal will be separated into after superposition logic level signal transmission, the 3rd logic level signal or the 4th logic level signal are received by response;First logic level signal and the second logic level signal are identical with the 3rd logic level signal and the 4th logic level signal respectively, and the transmission of the second logic level signal is carried out after the first logic level signal completes transmission.The present invention after two-way logic level signal is overlapped by transmitting, two-way logic level signal is separated into again, realize with a signal wire transmitting two paths logical signal, reduce the number of pins of the connector between the split machine host and display screen of Vehicular entertainment navigation system, structure design difficulty is reduced, the reliability of signal connection is improved.

Description

A kind of logic level signal transmission method and device
Technical field
The present invention relates to signal transmission technology field, more particularly to a kind of logic level signal transmission method and device.
Background technology
In current Vehicular entertainment navigation system, occur main frame and panel split more and more, use between the two Cable carries out electrically connected split air conditioner;Contain on general main frame and contain MPU and interlock circuit on MCU and interlock circuit, panel. And the signal that the main frame and panel of split air conditioner are connected to each other is very more, including the signal such as audio frequency and video, control, communication, thus Ask the pin PIN of the connector used must be enough, so as to cause connector type selecting difficult, corresponding structure design also becomes Complexity, and then cause the signal connection reliability of split air conditioner to reduce.
In the connection signal of split air conditioner, have many signals need not simultaneous transmission, such as, and the face of Vehicular entertainment navigation system Reset key is designed with plate, when abnormal (as crashed) occurs for system, a reset signal is produced by this reset key, to MCU, MPU integral resets, make it return to normal condition;Meanwhile, the MCU on main frame also has the MPU on independent counter plate to be resetted Signal wire.Both reset signals are not just simultaneous transmissions, but in existing technical scheme, to realize that above two is answered Bit function, it is necessary to transmit two kinds of reset signals using two signal lines.
The content of the invention
The present invention provides a kind of logic level signal transmission method and device, solves and is patrolled with a signal wire completion two-way Collect the technical problem of level signal transmission.
To reach above-mentioned purpose, the technical solution used in the present invention is:
One aspect of the present invention provides a kind of logic level signal transmission method, it is characterised in that including:
Produced after first logic level signal of transmission is overlapped with the second logic level signal and be superimposed logic level Signal, will be separated into the 3rd logic level signal and the 4th logic level signal after the superposition logic level signal transmission, the Three logic level signals or the 4th logic level signal are received by response;
First logic level signal and the second logic level signal are electric with the 3rd logic level signal and the 4th logic respectively Ordinary mail number is identical, and the transmission of the second logic level signal is carried out after the first logic level signal completes transmission.
Further, before above-mentioned logic level signal transmitting step, in addition to:
It is normality logic level to configure the first logic level signal sent and the second logic level signal;
Arrange parameter, the 3rd logic level signal and the 4th logic level signal for making reception is normality logic level;
It is configured to effective logic level signal of response;
The first logic level signal or the second logic level signal is controlled to be changed into effective logic from normality logic level signal Level signal.
After above-mentioned logic level signal transmitting step, in addition to:
The first logic level signal sent or the second logic level signal is set to be reverted to by effective logic level signal Between the response of the recovery time of normality logic level signal and the 3rd logic level signal of reception or the 4th logic level signal Every the time, the recovery time is less than or equal to the interresponse time.
Another aspect of the present invention provides a kind of logic level signal transmitting device, including first group of signal input and output connects Mouth, logic level signal supercircuit, logic level signal split circuit, second group of signal input output interface;
First group of signal input output interface includes the first logic level signal output interface and the second logic level signal Output interface, the first logic level signal input and the second logic level that logic level signal supercircuit is connected respectively is believed Number input, for the first logic level signal and the second logic level signal to be sent into logic level signal supercircuit;
Logic level signal supercircuit, for the first logic level signal to be overlapped with the second logic level signal Superposition logic level signal is produced afterwards, and the superposition logic level signal is transferred to logic electricity by superposed signal output end The superposed signal input of flat demultiplexing circuit;
Logic level signal split circuit, for the superposition logic level signal to be separated into the 3rd logic level signal With the 4th logic level signal, it is defeated by the 3rd logic level signal output end and the 4th logic level signal output end respectively Go out;
Second group of signal input output interface includes the 3rd logic level signal input interface and the 4th logic level signal Input interface, connects the 3rd logic level signal output end and the 4th logic level letter of logic level signal split circuit respectively Number output end, the 3rd logic level signal or the 4th logic level signal are received for responding.
Further, in addition to the first microcontroller and the second microcontroller;
First microcontroller, believes for first group of signal input output interface to be configured into first logic level Number output interface and the second logic level signal output interface;And for first configuring the first logic level signal and second of transmission Logic level signal is normality logic level, then controls the first logic level signal or the second logic level signal by normality logic Level signal is changed into effective logic level signal;
Second microcontroller, believes for second group of signal input output interface to be configured into the 3rd logic level Number input interface and the 4th logic level signal input interface;And it is configured to effective logic level signal of response.
Further, in addition to the first microcontroller and the second microcontroller;
First microcontroller, for setting the first logic level signal sent or the second logic level signal by having Effect logic level signal reverts to the recovery time of normality logic level signal;
Second microcontroller, the interresponse time for setting the effective logic level signal received, the 3rd patrols It is effective logic level signal to collect level signal or the 4th logic level signal;
The recovery time is set to less than or equal to the interresponse time.
Further, another structure of the logic level signal transmitting device is:
First group of signal input output interface connecting valve, the first logic for controlling to send by the switch
Level signal or the second logic level signal are changed into effective logic level signal from normality logic level signal.
Further, the first logic level signal input of the logic level signal supercircuit connects through first resistor Power supply, is grounded through second resistance;
Second logic level signal input of the logic level signal supercircuit is through the electricity of the 4th resistance connection the 3rd One end of resistance, another termination power of 3rd resistor;
The butt end of first resistor and second resistance and the butt end of 3rd resistor and the 4th resistance are connected as logic level The superposed signal output end of superimposed signal circuit.
Further, the superposed signal input of the logic level signal split circuit connects the superposed signal output End, the logic level signal split circuit has the first triode, the second triode, the 3rd triode;
The superposed signal input connects the emitter stage of the first triode, is gone here and there between the base stage and power supply of the first triode The 5th resistance is associated with, the 6th resistance, the colelctor electrode and power supply of the first triode are in series between the base stage and ground of the first triode Between be in series with the 7th resistance, the colelctor electrode of the first triode connects the 3rd logic level signal input interface;
The superposed signal input connects the base stage of the 3rd triode through the 8th resistance, and the two ends of the 8th resistance are simultaneously The first electric capacity is associated with, the base stage of the 3rd triode is through the 9th resistance eutral grounding;The grounded emitter of 3rd triode;3rd triode Colelctor electrode connect the base stage of the second triode, the base stage of the second triode connects the superposed signal through the tenth resistance and inputted End, the base stage of the second triode is through the second capacity earth;The grounded emitter of second triode;The colelctor electrode warp of second triode 11st resistance connects power supply, and the colelctor electrode of the second triode connects the 4th logic level signal input interface.
The present invention is patrolled by producing superposition logic level signal after two-way logic level signal is overlapped, then by superposition Two-way logic level signal is separated into after collecting level signal transmission, realizes with a signal wire transmitting two paths logical signal, reduces The number of pins of connector between the split machine host and display screen of Vehicular entertainment navigation system, reduces structure design difficulty, carries The reliability of high RST connection.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the logic level signal transmission method of the present invention;
Fig. 2 is the structural representation of the logic level signal transmitting device of the present invention;
Fig. 3 is the electrical block diagram of the logic level signal transmitting device of the present invention;
Fig. 4 is the structural representation of another embodiment of the logic level signal transmitting device of the present invention.
Embodiment
Specifically illustrate embodiments of the present invention below in conjunction with the accompanying drawings, accompanying drawing is only for reference and explanation is used, do not constitute pair The limitation of scope of patent protection of the present invention.
Embodiment 1:
As shown in figure 1, the present embodiment provides a kind of logic level signal transmission method, including:By the first logic of transmission Level signal produces after being overlapped with the second logic level signal and is superimposed logic level signal, by the superposition logic level letter The 3rd logic level signal and the 4th logic level signal are separated into after number transmission, and the 3rd logic level signal or the 4th logic are electric Ordinary mail number is received by response;
First logic level signal and the second logic level signal are electric with the 3rd logic level signal and the 4th logic respectively Ordinary mail number is identical, and the transmission of the second logic level signal is carried out after the first logic level signal completes transmission.
In an embodiment of the present invention, before above-mentioned logic level signal transmitting step, in addition to:
It is normality logic level to configure the first logic level signal sent and the second logic level signal;In the present embodiment In, by the way that first group of signal input output interface, second group of signal input output interface are configured into vacantly (Floating) shape State is realized;
Arrange parameter, the 3rd logic level signal and the 4th logic level signal for making reception is normality logic level; In the present embodiment, the normality for making the two-way logic level signal of reception is high level;
It is configured to effective logic level signal of response;In the present embodiment, when logic level by high level becomes low Just responded during level, effective logic level is low level;
The first logic level signal or the second logic level signal is controlled to be changed into effective logic from normality logic level signal Level signal.In the present embodiment, by the way that first group of signal input output interface or second group of signal input output interface are drawn It is low to realize.
In an embodiment of the present invention, after above-mentioned logic level signal transmitting step, in addition to:
First microprocessor sets the first logic level signal sent or the second logic level signal by effective logic electricity Ordinary mail number reverts to the recovery time t2 of normality logic level signal, and the second microprocessor sets the 3rd logic level letter received Number or the 4th logic level signal interresponse time t1, the recovery time t2 be less than or equal to the interresponse time t1.In the present embodiment, in the responding time intervals after responding the 3rd logic level signal or the input of the 4th logic level signal Between ignore it in t1 and input again;After the first logic level signal of transmission or the second logic level signal output low level Normality is restored it into recovery time t2.
The logic level signal transmission method that the present embodiment is provided can be applied to the car entertainment navigation system of split air conditioner form System, is transmitted specifically for the signal between the main frame and panel of split air conditioner, such as overall to the MPU on the MCU and panel on main frame The transmission for the reset signal that MPU in the reset signal of reset and independent counter plate resets, can be using the present embodiment with one Signal wire is successively transmitted, without simultaneous transmission.
The present embodiment is patrolled by producing superposition after being overlapped the first logic level signal and the second logic level signal Level signal is collected, then the 3rd logic level signal and the 4th logic level letter will be separated into after superposition logic level signal transmission Number, realize with a signal wire transmitting two paths logical signal, reduce the split machine host and display screen of Vehicular entertainment navigation system Between connector pin PIN numbers, reduce structure design difficulty, improve signal connection reliability.
Embodiment 2:
As shown in Fig. 2 the present embodiment provides a kind of logic level signal transmitting device, including first group of signal input and output Interface, logic level signal supercircuit, logic level signal split circuit, second group of signal input output interface;
First group of signal input output interface includes the first logic level signal output interface I/O11 and the second logic level Signal output interface I/O12, connects the first logic level signal input and second of logic level signal supercircuit respectively Logic level signal input, for the first logic level signal and the second logic level signal to be sent into logic level signal Supercircuit;
Logic level signal supercircuit, for the first logic level signal to be overlapped with the second logic level signal Superposition logic level signal is produced afterwards, and the superposition logic level signal is transferred to logic electricity by superposed signal output end The superposed signal input of flat demultiplexing circuit;
Logic level signal split circuit, for the superposition logic level signal to be separated into the 3rd logic level signal With the 4th logic level signal, it is defeated by the 3rd logic level signal output end and the 4th logic level signal output end respectively Go out;
Second group of signal input output interface includes the 3rd logic level signal input interface I/O21 and the 4th logic level Signal input interface I/O22, connects the 3rd logic level signal output end and the 4th of logic level signal split circuit respectively Logic level signal output end, the 3rd logic level signal or the 4th logic level signal are received for responding.
As shown in Fig. 2 in an embodiment of the present invention, in addition to the first microcontroller and the second microcontroller;
First microcontroller, believes for first group of signal input output interface to be configured into first logic level Number output interface I/O11 and the second logic level signal output interface I/O12;And for first configuring the first logic level of transmission Signal A1 and the second logic level signal B1 is normality logic level, then controls the first logic level signal A1 or the second logic electricity Ordinary mail B1 is changed into effective logic level signal from normality logic level signal;
Second microcontroller, believes for second group of signal input output interface to be configured into the 3rd logic level Number input interface I/O21 and the 4th logic level signal input interface I/O22;And it is configured to effective logic level letter of response Number.
In the present embodiment, in addition to the first microcontroller and the second microcontroller;
First microcontroller, for setting the first logic level signal A1 or the second logic level signal A2 that send The recovery time of normality logic level signal is reverted to by effective logic level signal;
Second microcontroller, the interresponse time for setting the effective logic level signal received, the 3rd patrols It is effective logic level signal to collect level signal A2 or the 4th logic level signal B2;
The recovery time is set to less than or equal to the interresponse time.
In the present embodiment, as shown in Fig. 2 first microcontroller, first group of signal input output interface I/O11, I/O12, logic level signal supercircuit belong to transmitting terminal;The logic level signal split circuit, second group of signal input Output interface I/O21, I/O22, the second microcontroller belong to receiving terminal.
As shown in figure 3, in an embodiment of the present invention, the first logic level letter of the logic level signal supercircuit Number input connects power supply through first resistor R11, is grounded through second resistance R12;
Second logic level signal input of the logic level signal supercircuit is through the 4th resistance R14 connections the 3rd Resistance R13 one end, 3rd resistor R13 another termination power;
First resistor R11 and second resistance R12 butt end connect with 3rd resistor R13 and the 4th resistance R14 butt end It is connected in the superposed signal output end of logic level signal supercircuit.
As shown in figure 3, in an embodiment of the present invention, the superposed signal input of the logic level signal split circuit The superposed signal output end is connected, the logic level signal split circuit has the first triode Q21, the second triode Q22, the 3rd triode Q23;
The superposed signal input connects the first triode Q21 emitter stage, the first triode Q21 base stage and power supply Between be in series with the 5th resistance R21, be in series with the 6th resistance R22, the first triode between the first triode Q21 base stage and ground The 7th resistance R23 is in series between Q21 colelctor electrode and power supply, the first triode Q21 colelctor electrode connects the 3rd logic Level signal input interface I/O21;First triode Q21 colelctor electrode is used as the 3rd logic level signal output end.
The base stage of the triode Q23 of the 8th resistance R24 connections of superposed signal input the 3rd, the 8th resistance R24 Two ends be parallel with the first electric capacity C21, the 3rd triode Q23 base stage is grounded through the 9th resistance R25;3rd triode Q23's Grounded emitter;3rd triode Q23 colelctor electrode connects the second triode Q22 base stage, the second triode Q22 base stage warp The tenth resistance R26 connections superposed signal input, the second triode Q22 base stage is grounded through the second electric capacity C22;Two or three Pole pipe Q22 grounded emitter;Second triode Q22 colelctor electrode connects power supply, the second triode Q22 through the 11st resistance R27 Colelctor electrode connect the 4th logic level signal input interface I/O22;Second triode Q22 colelctor electrode is patrolled as the 4th Collect level signal output end.
Triode is more than or equal to 0.7V from turn-on threshold voltage in Fig. 3.
The course of work of logic level signal transmitting device that the present embodiment is provided is:
By configuring the first microcontroller so that first group of signal input output interface I/O11, I/O12 normality are outstanding Empty (Floating) state;By configuring the second microcontroller so that second group of signal input output interface I/O21, I/O22's State is input.In the present embodiment, the power supply of logic level signal supercircuit is 3.3V, so that superposed signal output end The output voltage of (i.e. node 1 in Fig. 2) is 3.3V, because the first triode Q21 emitter voltage is equal to the electricity of node 1 Pressure, base voltage is that 3.3V is obtained after resistance R21, R22 partial pressure, is 1.05V, therefore the first triode Q21 ends, the 3rd Logic level A2 is high level 3.3V;3rd triode Q23 base voltage is the voltage of node 1 through resistance R24, R25 partial pressure After obtain, be 1.115V, therefore the 3rd triode Q23 is turned on so that the second triode Q22 base earth and end, the Four logic level B2 are high level 3.3V.This is the original state of logic level signal transmitting device.
Situation is divided to illustrate the course of work of logic level signal transmitting device below:
Situation 1:
First microcontroller is by the first logic level signal output interface I/O11 from being vacantly changed into low level 0, the second logic Level signal output interface I/O12 is free position, then the voltage of superposed signal output end (node 1) is 0V, the first triode Q21 emitter voltage is equal to the voltage of node 1, and base voltage is that 3.3V is obtained after resistance R21, R22 partial pressure, is 1.05V, so that the first triode Q21 is turned on, the 3rd logic level A2 is changed into low level 0V from original high level 3.3V, the Two triode Q22 base voltage is 0V, thus is ended, and the 4th logic level B2 remains high level;
Second microcontroller judges the 3rd logic level A2 inputs for effectively input, and the 4th logic level B2 input is nothing Effect input;Second microcontroller no longer responds the 3rd logic level A2 input in interresponse time t1 (5ms);
First microcontroller is in recovery time t2 (5ms) by the first logic level signal output interface I/O11 state Vacant state is reverted to by low level 0V.In the present embodiment, interresponse time t1 is equal to recovery time t2.
Situation 2:
First logic level signal output interface I/O11 keeps vacant state, and the first microcontroller is by the second logic level Signal output interface I/O12 is from being vacantly changed into low level 0, then the voltage of superposed signal output end (node 1) is 3.3V through resistance Obtained after R13, R14 partial pressure, be 1.115V, the first triode Q21 emitter voltage is equal to the voltage of node 1, base voltage Obtained after resistance R21, R22 partial pressure, be 1.05V, therefore the first triode Q21 ends, the 3rd logic level A2 remains height Level;3rd triode Q23 base voltage is that the voltage of node 1 is obtained after resistance R24, R25 partial pressure, is 0.377V, because This 3rd triode Q23 ends, and the second triode Q22 base voltage is 1.115V, so that the second triode Q22 is led Logical, the 4th logic level B2 is changed into low level 0V from original high level 3.3V;
Second microcontroller judges the 4th logic level B2 inputs for effectively input, and the 3rd logic level A2 input is nothing Effect input;Second microcontroller no longer responds the 4th logic level B2 input in interresponse time t1 (5ms);
First microcontroller is in recovery time t2 (5ms) by the second logic level signal output interface I/O12 state Vacant state is reverted to by low level 0V.In the present embodiment, interresponse time t1 is equal to recovery time t2.
Embodiment 3:
In the present embodiment, as shown in figure 4, the present embodiment and the difference of embodiment 2 are:The logic electricity is provided Another structure of flat signal transmitting apparatus:
First group of signal input output interface connecting valve S11, controls send first to patrol by the switch S11 Collect level signal or the second logic level signal is changed into effective logic level signal from normality logic level signal.
The logic level signal transmitting device provided in the present embodiment can be applied to the car entertainment navigation of split air conditioner form System, is transmitted specifically for the signal between the main frame and panel of split air conditioner, such as whole to the MPU on the MCU and panel on main frame The transmission for the Software reset signal that the MPU on mechanical return signal and independent counter plate that body resets resets, using the present embodiment Successively transmitted with a signal wire, without simultaneous transmission.
As shown in figure 4, in the present embodiment, switch S11 is mechanical switch, make that resistance R11 is connected with R12 after pressing one End ground connection, so as to produce low level reset signal.
Triode is more than or equal to 0.7V from turn-on threshold voltage in Fig. 4.
Reset signal can be set to low level or high level is effective according to being actually needed for system.In the present embodiment, if Put reset signal effective for low level.
In the present embodiment, the first logic level signal is mechanical return signal A1, and the second logic level signal is software Reset signal B1, the 3rd logic level signal is mechanical return signal A2, and the 4th logic level signal is Software reset signal B2.
The course of work of the logic level signal transmitting device of the present embodiment is:
1) circuit original state:As mechanical return signal A1, Software reset signal B1 all invalid (i.e. high level 3.3V), The voltage of node 1 is 3.3V, and because the first triode Q21 emitter voltage is equal to the voltage of node 1, base voltage is 3.3V Obtained after resistance R21, R22 partial pressure, be 1.05V, therefore the first triode Q21 ends, mechanical return signal A2 is high electricity It is flat;3rd triode Q23 base voltage is that the voltage of node 1 is obtained after resistance R24, R25 partial pressure, is 1.115V, therefore 3rd triode Q23 turn on so that the second triode Q22 base earth and end, Software reset signal B2 be high level.
2) when mechanical return signal A1 is effective:Mechanical return signal A1 is changed into low level 0V from high level 3.3V, then node 1 Voltage be 0V, the first triode Q21 emitter voltage is equal to the voltage of node 1, base voltage be 3.3V through resistance R21, Obtained after R22 partial pressures, be 1.05V, therefore the first triode Q21 is turned on, reset signal A2 is become by original high level 3.3V For low level 0V;Second triode Q22 base voltage is 0V, thus is ended, and Software reset signal B2 remains high level.
3) when Software reset signal B1 is effective:Software reset signal B1 is changed into low level 0V from high level 3.3V, then node 1 Voltage be that 3.3V is obtained after resistance R13, R14 partial pressure, be 1.115V, the first triode Q21 emitter voltage is to be equal to The voltage of node 1, base voltage is obtained after resistance R21, R22 partial pressure, is 1.05V, therefore the first triode Q21 ends, machinery Reset signal A2 is high level;3rd triode Q23 base voltage is that the voltage of node 1 is obtained after resistance R24, R25 partial pressure Arrive, be 0.377V, therefore Q23 ends, and Q22 base voltage is 1.115V, thus conducting, Software reset signal B2 is low electricity It is flat.
Above disclosed is only presently preferred embodiments of the present invention, it is impossible to the rights protection model of the present invention is limited with this Enclose, therefore the equivalent variations made according to scope of the present invention patent, still belong to the scope that the present invention is covered.

Claims (7)

1. a kind of logic level signal transmission method, it is characterised in that including:
Produced after first logic level signal of transmission is overlapped with the second logic level signal and be superimposed logic level signal, The 3rd logic level signal and the 4th logic level signal, the 3rd logic will be separated into after the superposition logic level signal transmission Level signal or the 4th logic level signal are received by response;
First logic level signal and the second logic level signal are believed with the 3rd logic level signal and the 4th logic level respectively It is number identical, the transmission of the second logic level signal is carried out after the first logic level signal completes transmission:
Before above-mentioned steps, in addition to:
It is normality logic level to configure the first logic level signal sent and the second logic level signal;
Arrange parameter, the 3rd logic level signal and the 4th logic level signal for making reception is normality logic level;
It is configured to effective logic level signal of response;
The first logic level signal or the second logic level signal is controlled to be changed into effective logic level from normality logic level signal Signal.
2. logic level signal transmission method according to claim 1, it is characterised in that:
After the above step, in addition to:
The first logic level signal sent or the second logic level signal is set to revert to normality by effective logic level signal During the responding time intervals of the recovery time of logic level signal and the 3rd logic level signal received or the 4th logic level signal Between, the recovery time is less than or equal to the interresponse time.
3. a kind of logic level signal transmitting device, it is characterised in that:Including first group of signal input output interface, logic level Superimposed signal circuit, logic level signal split circuit, second group of signal input output interface;
First group of signal input output interface includes the first logic level signal output interface and the second logic level signal is exported Interface, the first logic level signal input and the second logic level signal that logic level signal supercircuit is connected respectively is defeated Enter end, for the first logic level signal and the second logic level signal to be sent into logic level signal supercircuit;
Logic level signal supercircuit, for being produced after being overlapped the first logic level signal and the second logic level signal Raw superposition logic level signal, and the superposition logic level signal is transferred to logic level letter by superposed signal output end The superposed signal input of number split circuit;
Logic level signal split circuit, for the superposition logic level signal to be separated into the 3rd logic level signal and the Four logic level signals, are exported by the 3rd logic level signal output end and the 4th logic level signal output end respectively;
Second group of signal input output interface includes the 3rd logic level signal input interface and the 4th logic level signal is inputted Interface, the 3rd logic level signal output end and the 4th logic level signal that logic level signal split circuit is connected respectively is defeated Go out end, the 3rd logic level signal or the 4th logic level signal are received for responding:
Also include the first microcontroller and the second microcontroller;
First microcontroller, it is defeated for first group of signal input output interface to be configured into first logic level signal Outgoing interface and the second logic level signal output interface;And for first configuring the first logic level signal and the second logic of transmission Level signal is normality logic level, then controls the first logic level signal or the second logic level signal by normality logic level Signal is changed into effective logic level signal;
Second microcontroller, it is defeated for second group of signal input output interface to be configured into the 3rd logic level signal Incoming interface and the 4th logic level signal input interface;And it is configured to effective logic level signal of response.
4. logic level signal transmitting device according to claim 3, it is characterised in that:
First microcontroller, for setting the first logic level signal sent or the second logic level signal by effectively patrolling Collect the recovery time that level signal reverts to normality logic level signal;
Second microcontroller, the interresponse time for setting the effective logic level signal received, the 3rd logic electricity Ordinary mail number or the 4th logic level signal are effective logic level signal;
The recovery time is set to less than or equal to the interresponse time.
5. logic level signal transmitting device according to claim 3, it is characterised in that:
First group of signal input output interface connecting valve, the first logic level signal for controlling to send by the switch Or second logic level signal effective logic level signal is changed into from normality logic level signal.
6. the logic level signal transmitting device according to any one of preceding claims 3-5, it is characterised in that:
First logic level signal input of the logic level signal supercircuit connects power supply through first resistor (R11), warp Second resistance (R12) is grounded;
Second logic level signal input of the logic level signal supercircuit is through the electricity of the 4th resistance (R14) connection the 3rd Hinder the one end of (R13), another termination power of 3rd resistor (R13);
The butt end of first resistor (R11) and second resistance (R12) and 3rd resistor (R13) and the 4th resistance (R14's) docks End is connected as the superposed signal output end of logic level signal supercircuit.
7. the logic level signal transmitting device according to any one of preceding claims 3-5, it is characterised in that:
The superposed signal input of the logic level signal split circuit connects the superposed signal output end, the logic electricity Flat demultiplexing circuit has the first triode (Q21), the second triode (Q22), the 3rd triode (Q23);
The superposed signal input connects the emitter stage of the first triode (Q21), the base stage and power supply of the first triode (Q21) Between be in series with the 5th resistance (R21), be in series with the 6th resistance (R22), first between the base stage and ground of the first triode (Q21) The 7th resistance (R23), the colelctor electrode connection of the first triode (Q21) are in series between the colelctor electrode and power supply of triode (Q21) The 3rd logic level signal input interface;
The superposed signal input connects the base stage of the 3rd triode (Q23), the 8th resistance through the 8th resistance (R24) (R24) two ends are parallel with the first electric capacity (C21), and the base stage of the 3rd triode (Q23) is grounded through the 9th resistance (R25);3rd The grounded emitter of triode (Q23);The colelctor electrode of 3rd triode (Q23) connects the base stage of the second triode (Q22), second The base stage of triode (Q22) connects the superposed signal input, the base stage of the second triode (Q22) through the tenth resistance (R26) It is grounded through the second electric capacity (C22);The grounded emitter of second triode (Q22);The colelctor electrode of second triode (Q22) is through the tenth One resistance (R27) connects power supply, and the colelctor electrode of the second triode (Q22) connects the 4th logic level signal input interface.
CN201410324072.1A 2014-07-08 2014-07-08 A kind of logic level signal transmission method and device Active CN104104379B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410324072.1A CN104104379B (en) 2014-07-08 2014-07-08 A kind of logic level signal transmission method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410324072.1A CN104104379B (en) 2014-07-08 2014-07-08 A kind of logic level signal transmission method and device

Publications (2)

Publication Number Publication Date
CN104104379A CN104104379A (en) 2014-10-15
CN104104379B true CN104104379B (en) 2017-09-22

Family

ID=51672228

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410324072.1A Active CN104104379B (en) 2014-07-08 2014-07-08 A kind of logic level signal transmission method and device

Country Status (1)

Country Link
CN (1) CN104104379B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1100203A (en) * 1993-05-28 1995-03-15 美国电话电报公司 High capacity optical fiber network
CN1297291A (en) * 1999-09-13 2001-05-30 株式会社东芝 Radio communication system
CN1452341A (en) * 2002-04-18 2003-10-29 阿尔卡塔尔公司 Method and system for control of light signal transmission
CN1813429A (en) * 2003-07-16 2006-08-02 日本电信电话株式会社 Optical communication system using optical frequency code, optical transmission device and optical reception device thereof, and reflection type optical communication device
CN203933595U (en) * 2014-07-08 2014-11-05 惠州华阳通用电子有限公司 A kind of logic level signal transmitting device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1100203A (en) * 1993-05-28 1995-03-15 美国电话电报公司 High capacity optical fiber network
CN1297291A (en) * 1999-09-13 2001-05-30 株式会社东芝 Radio communication system
CN1452341A (en) * 2002-04-18 2003-10-29 阿尔卡塔尔公司 Method and system for control of light signal transmission
CN1813429A (en) * 2003-07-16 2006-08-02 日本电信电话株式会社 Optical communication system using optical frequency code, optical transmission device and optical reception device thereof, and reflection type optical communication device
CN203933595U (en) * 2014-07-08 2014-11-05 惠州华阳通用电子有限公司 A kind of logic level signal transmitting device

Also Published As

Publication number Publication date
CN104104379A (en) 2014-10-15

Similar Documents

Publication Publication Date Title
CN104407556B (en) Hot standby redundancy module switching device
CN102324952A (en) Non-polar two-line system communication circuit
CN104881382A (en) Master and slave equipment connection device and address recognition method thereof
CN102157863A (en) Controller area network active bus terminator
CN103926853A (en) Programmable resistance output device and method
CN102244515B (en) Universal multi-channel switching value converter
CN105005545A (en) Line card serial port switching device and line card serial port switching method
CN103986899B (en) HDMI extender emitting terminal, HDMI extender receiving terminal and extender transmission system
CN104363404B (en) Terminal multiplexing circuit and multimedia terminal equipment
CN104104379B (en) A kind of logic level signal transmission method and device
CN103186126B (en) Realize interface arrangement and method that dcs is interconnected with smart machine
CN105589384B (en) A kind of multi-channel digital amount input/output unit based on FPGA
CN203933595U (en) A kind of logic level signal transmitting device
CN108024129A (en) Display device and its mainboard
CN102238053A (en) Controller area network (CAN) bus interference generator
CN201886464U (en) KVM centralized control device for centralized control to I/O ports
CN205068372U (en) Principal and subordinate's equipment connecting device
CN105721917B (en) Port multiplexing circuit and digital television set top box
CN204190089U (en) Signal transmission interface module and electronic equipment
CN205105240U (en) Communication circuit
CN103118143A (en) Multiplex circuit of serial interface and Ethernet interface
CN104994320B (en) A kind of HDMI service equipments
CN103473206A (en) Data transmission method and I2C (Inter-Integrated Circuit) interface extender
CN103825747B (en) Splitter system compatible with 100M Ethernet and 1000M Ethernet
CN203759911U (en) Interactive teaching device based on wireless transmission technology

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant