CN104104220B - A kind of SPM - Google Patents

Abstract

The present invention is applicable to power drive control field, it is provided that a kind of SPM.nullThe present invention includes the first current detecting unit by using in SPM、Second current detecting unit、Signal monitoring unit and the single-phase driving circuit of delay unit，Respectively the output electric current of the IGBT pipe Q2 exporting electric current and lower brachium pontis of the IGBT pipe Q1 of upper brachium pontis is detected by the first current detecting unit and the second current detecting unit，By signal monitoring unit, the upper brachium pontis input signal processed after filtering being converted to when IGBT pipe Q2 is not turned off low level drives the first driver element to control IGBT pipe Q1 shutoff through level conversion unit and higher-pressure region signal adjustment unit，And then make IGBT pipe Q1 and IGBT pipe Q2 not have situation about simultaneously turning on，Reduce the probability that SPM lost efficacy because mistake stream punctures，Contribute to extending the service life of SPM，Ensure that the safety of SPM.

Description

A kind of SPM

Technical field

The invention belongs to power drive control field, particularly relate to a kind of SPM.

Background technology

SPM (IPM, Intelligent Power Module), is that one combines Power Electronic Technique and collection Become the power drive series products of circuit engineering.SPM is integrated in one device for power switching and high-voltage driving circuit Rise, and be built-in with overvoltage, overcurrent and the failure detector circuit such as overheated.SPM is on the one hand by receiving MCU's Control signal also drives subsequent conditioning circuit to work, and on the other hand again the state detection signal of system is fed back to MCU.With traditional discrete Scheme is compared, and SPM wins increasing market with its advantage such as high integration, high reliability, is particularly suitable for Drive the converter of motor and various inverter, be for frequency control, metallurgical machinery, electric propulsion, servo-drive and change Frequently the desired power level electronic device of household electrical appliances.

The structure of existing SPM as it is shown in figure 1, SPM is made up of three single-phase driving circuits, It is electric that these three single-phase driving circuit is respectively used to export U phase electricity, V phase electricity and W phase, and each single-phase driving circuit contains one Upper brachium pontis input and a lower brachium pontis input, and have an outfan.The single-phase driving circuit 101 that U phase electricity is corresponding upper Brachium pontis input, lower brachium pontis input and outfan are respectively HIN1, LIN1 and U, the single-phase driving circuit 102 that V phase electricity is corresponding Upper brachium pontis input, lower brachium pontis input and outfan be respectively HIN2, LIN2 and V, the single-phase driving circuit that W phase electricity is corresponding The upper brachium pontis input of 103, lower brachium pontis input and outfan are respectively HIN3, LIN3 and W.Owing to above-mentioned three single-phase are driven The structure on galvanic electricity road is identical, so Fig. 1 merely illustrates the internal structure of the single-phase driving circuit 103 for exporting W phase electricity. In single-phase driving circuit 103, the first input circuit 104 and the second input circuit 108 are for respectively to upper brachium pontis input Input signal S of HIN3_HIN3Input signal S with lower brachium pontis input LIN3_LIN3It is filtered, and output and S respectively_HIN3With S_LIN3Synchronous signal.Level shifting circuit 105 is for by the low-pressure area signal in the output signal of the first input circuit 104 Export behind incoming higher-pressure region, and output signal is identical with the phase place of the output signal of the first input circuit 104.Higher-pressure region signal is adjusted Whole circuit 106 exports after compensating the higher-pressure region signal in the output signal of level shifting circuit 105, output signal Width and S_HIN3Width identical, the phase place of output signal and S_HIN3Opposite in phase.Drive circuit 107 is for according to high pressure The output signal of district's signal adjustment circuit 106 generates the output signal with current driving ability, the width of this output signal with The width of the output signal of higher-pressure region signal adjustment circuit 106 is identical and opposite in phase, the i.e. output signal of drive circuit 107 Width and phase place and S_HIN3Width identical with phase place.The structure of drive circuit 112 is identical with drive circuit 107. Due to S_HIN3Need to get to through the first input circuit 104, level shifting circuit 105, higher-pressure region signal adjustment circuit 106 Drive circuit 107, and S_LIN3Level shifting circuit 105 and higher-pressure region signal adjustment circuit 106, institute is not had on residing path With, in order to make S_HIN3And S_LIN3Arrive separately at drive circuit 107 and the time consistency of drive circuit 112, then need in the second input Adding delay circuit 117 between circuit 108 and drive circuit 112, delay circuit 117 is by PMOS 109, NMOS tube 110 and electricity Hold 111 compositions, both thus can be made to arrive separately at drive circuit 107 and keep consistent with the time of drive circuit 112, so that S_HIN3Arrive time and the S of A point_LIN3The time arriving B point is identical.As in figure 2 it is shown, S_HIN3Rising edge arrive A point time Between T1 equal to S_LIN3Rising edge arrive B point time T2, S_HIN3Trailing edge arrive A point time T3 be equal to S_LIN3Decline Along the time T4 of arrival B point, owing to whole circuit is usually designed to signal undistorted transmission, S_HIN3Signal width T5 be equal to The signal width T6, S of A point_LIN3Signal width T7 equal to the signal width T8 of B point, thus obtain T1=T2=T3=T4.

Figure it is seen that by theory, S_HIN3With S_LIN3It is at different time after arriving separately at A point and B point Drive the conducting of IGBT pipe 113 and IGBT pipe 114, i.e. IGBT pipe 113 and IGBT pipe 114 will not simultaneously turn on, thus It is avoided that both to simultaneously turn on and produces huge transient current.But, for reality application is, owing to the existence of IGBT pipe is dragged Tail effect, thus the single-phase driving circuit in above-mentioned existing SPM can exist in the course of the work generation huge The risk of transient current.As it is shown on figure 3, work as S_HIN3Rising edge and S_LIN3Trailing edge when simultaneously arriving, produce at A point and rise Can produce trailing edge at B point while edge, IGBT pipe 113 becomes conducting from cut-off, and IGBT pipe 114 becomes cut-off from conducting, but Being because the existence of IGBT pipe smearing, the time that IGBT pipe 114 becomes cut-off from conducting is the longest, and IGBT pipe 113 is from cutting The time only becoming conducting is the shortest, and i.e. when IGBT pipe 114 is still in turn on process, IGBT pipe 113 is the most fully on, this Sample, IGBT pipe 113 and IGBT pipe 114 exists for a moment simultaneously turned on, and this can make from P point by IGBT pipe 113 He A current impulse PWG, the persistent period of this current impulse and IGBT pipe 114 is produced on this path on IGBT pipe 114 to ground Hangover time relevant, the hangover time of IGBT pipe 114 is the longest, and the persistent period of current impulse is the longest, and this current impulse Peak value size relevant with the conduction impedance of IGBT pipe 113 and IGBT pipe 114, conduction impedance is the least, the peak value of this current impulse The biggest.If the IGBT pipe range phase is acted on by current impulse, can greatly reduce the life-span of IGBT pipe, if the peak of current impulse Being worth excessive or the persistent period is long, the moment of IGBT pipe more can be caused to burn, whole SPM can be out of control, in turn results in The chain of subsequent conditioning circuit is burnt, it also occur that fire produce great potential safety hazard time serious.

Although define in the specifications of existing SPM user for same phase upper brachium pontis input and Lower brachium pontis input applies the time interval of signal, to avoid the occurrence of the problems referred to above, but in actual use, even if user This regulation is have followed when writing the program driving SPM, but due to the use environment of SPM itself The most severe, the voltage noise of input makes upper and lower bridge arm mislead the most most probably, thus produces electric current as described in Figure 3 Pulse, and in turn result in SPM and burn blast.Additionally, aging along with IGBT pipe, its smearing can be the tightest Weight, even can exceed specifications predetermined time interval, thus cause SPM after the use of long period, The as easy as rolling off a log failure phenomenon occurring stream to puncture.

In sum, the existence of existing SPM easily causes whole because the IGBT pipe of upper and lower bridge arm simultaneously turns on Individual SPM damages and burns, and the problem of possible initiation fire further.

Summary of the invention

It is an object of the invention to provide a kind of SPM, it is intended to solve existing for existing SPM Easy cause whole SPM to damage burning because the IGBT pipe of upper and lower bridge arm simultaneously turns on, and may draw further The problem of ignition calamity.

The present invention is achieved in that a kind of SPM, including three single-phase driving circuits, described three single-phase It is electric with W phase that drive circuit exports the U phase electricity in three-phase alternating current, V phase electricity respectively, each in described three single-phase driving circuits Individual single-phase driving circuit include the first input block, level conversion unit, higher-pressure region signal adjustment unit, the first driver element, Second input block, the second driver element, IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2 and fast recovery diode D2, institute State the first input block and upper brachium pontis input signal and lower brachium pontis input signal be filtered by described second input block respectively, Described level conversion unit will export behind the incoming higher-pressure region of low-pressure area signal in the output signal of described first input block, and After being compensated process by described higher-pressure region signal adjustment unit, output is to described first driver element, described first driver element The pulse signal with current driving ability is generated respectively to control described IGBT pipe Q1 and described with described second driver element The break-make of IGBT pipe Q2；The drain electrode of described IGBT pipe Q1 accesses high voltage, and anode and the negative electrode of described fast recovery diode D1 divide Do not connect the common contact of the drain electrode of source electrode and the drain electrode of described IGBT pipe Q1, the source electrode of described IGBT pipe Q1 and described IGBT pipe Q2 Export described U the phase electric or described W phase of V phase electric, described electric, the source ground of described IGBT pipe Q2, described fast recovery diode D2 Anode and negative electrode connect source electrode and the drain electrode of described IGBT pipe Q2 respectively；

Described single-phase driving circuit also includes:

First current detecting unit, the first test side and the second test side connect source electrode and the institute of described IGBT pipe Q1 respectively State the drain electrode of IGBT pipe Q2, for the output electric current of the drain electrode of described IGBT pipe Q1 is detected, and export first accordingly Detection signal；Described first detection signal is low level when described IGBT pipe Q1 turns off, and described first detection signal is described It is low level or high level during IGBT pipe Q1 conducting；

Second current detecting unit, the first test side and the second test side connect respectively described IGBT pipe Q2 source electrode and Ground, for the output electric current of the drain electrode of described IGBT pipe Q2 is detected, and the second detection signal of output accordingly；Described Two detection signals are low level when described IGBT pipe Q2 turns off, and described second detection signal when described IGBT pipe Q2 turns on is High level；

Signal monitoring unit, signal input part connects the outfan of described first input block, the first detection signal input End and the second detection signal input part connect the outfan of described first current detecting unit and described second current detecting respectively The outfan of unit, for when described first detects signal and/or described second detection signal is low level, by described first The output signal output of input block is to described level conversion unit, when described first detects signal and described second detection signal When being high level, the output signal of described first input block is converted to low level output to described level conversion unit；

Delay unit, input and outfan connect the outfan and described second of described second input block respectively and drive The input of unit, for the output signal of described second input block is carried out time delay output so that described second input block Output signal arrive the output signal of time and described first input block of described second driver element by described signal Monitoring means, described level conversion unit and described high voltage region signal adjustment unit arrive the time of described first driver element Identical.

The present invention by SPM use include the first current detecting unit, the second current detecting unit, Signal monitoring unit and the single-phase driving circuit of delay unit, by the first current detecting unit and the second current detecting unit difference The output electric current of the IGBT pipe Q2 exporting electric current and lower brachium pontis of the IGBT pipe Q1 of upper brachium pontis is detected, by signal monitoring list The upper brachium pontis input signal processed after filtering is converted to low level through level conversion list when IGBT pipe Q2 is not turned off by unit Unit and higher-pressure region signal adjustment unit drive the first driver element to control IGBT pipe Q1 and turn off, and then make IGBT pipe Q1 and IGBT manage Q2 does not haves situation about simultaneously turning on, and reduces the probability that SPM lost efficacy because mistake stream punctures, contributes to extending intelligence In the service life of energy power model, it is ensured that the safety of SPM, solve existing SPM and deposited Easy cause whole SPM to damage burning because the IGBT pipe of upper and lower bridge arm simultaneously turns on, and may be further The problem of initiation fire.

Accompanying drawing explanation

Fig. 1 is the schematic diagram of the SPM involved by prior art；

Fig. 2 is the signal waveforms in the SPM involved by prior art；

Fig. 3 is another signal waveforms in the SPM involved by prior art；

Fig. 4 is the schematic configuration diagram of the SPM comprising single-phase driving circuit that the embodiment of the present invention is provided；

Fig. 5 is the exemplary circuit knot of the SPM comprising single-phase driving circuit that the embodiment of the present invention is provided Structure.

Detailed description of the invention

In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, right The present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, and It is not used in the restriction present invention.

The embodiment of the present invention includes the first current detecting unit, the second current detecting by using in SPM Unit, signal monitoring unit and the single-phase driving circuit of delay unit, by the first current detecting unit and the second current detecting list The output electric current of the IGBT pipe Q2 exporting electric current and lower brachium pontis of the IGBT pipe Q1 of upper brachium pontis is detected, by signal by unit respectively The upper brachium pontis input signal processed after filtering is converted to low level through over level when IGBT pipe Q2 is not turned off by monitoring means Converting unit and higher-pressure region signal adjustment unit drive first driver element control IGBT pipe Q1 turn off, and then make IGBT pipe Q1 and IGBT pipe Q2 does not haves situation about simultaneously turning on, and reduces the probability that SPM lost efficacy because mistake stream punctures, contributes to Extend the service life of SPM, it is ensured that the safety of SPM.

Fig. 4 shows the schematic construction of the SPM comprising single-phase driving circuit that the embodiment of the present invention provides, For convenience of description, illustrate only part related to the present invention, details are as follows:

The SPM that the embodiment of the present invention is provided includes three single-phase driving circuits, these three singlephase drive electricity It is electric with W phase that road exports the U phase electricity in three-phase alternating current, V phase electricity respectively, each singlephase drive in three single-phase driving circuits electricity Road include the first input block, level conversion unit, higher-pressure region signal adjustment unit, the first driver element, the second input block, Second driver element, IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2 and fast recovery diode D2；Owing to three single-phase are driven The structure on galvanic electricity road is identical, so only figure 4 illustrates the single-phase driving circuit 300 for exporting W phase electricity, and is used for exporting The single-phase driving circuit 100 of U phase electricity illustrates the most in form of a block diagram with the single-phase driving circuit 200 for exporting V phase electric.

As a example by single-phase driving circuit 300, the embodiment of the present invention is illustrated below:

Single-phase driving circuit 300 includes the first input block 301, level conversion unit 302, higher-pressure region signal adjustment unit 303, first driver element the 304, second input block the 305, second driver element 306, IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2 and fast recovery diode D2, the first input block 301 and the second input block 305 are respectively to upper brachium pontis input signal S_HIN3With lower brachium pontis input signal S_LIN3Being filtered, level conversion unit 302 is by the output signal of the first input block 301 The incoming higher-pressure region of low-pressure area signal after export, and export after being compensated process by higher-pressure region signal adjustment unit 303 to the One driver element 304, the first driver element 304 and the second driver element 306 generate the pulse with current driving ability respectively Signal is to control IGBT pipe Q1 and the break-make of IGBT pipe Q2.The drain electrode of IGBT pipe Q1 accesses high voltage VP, fast recovery diode D1 Anode and negative electrode connect source electrode and the drain electrode of IGBT pipe Q1 respectively, connecing altogether of the drain electrode of the source electrode of IGBT pipe Q1 and IGBT pipe Q2 Point output W phase electricity (then exports U phase electric, then export V phase electricity in single-phase driving circuit 200) in single-phase driving circuit 100, The source ground of IGBT pipe Q2, the anode of fast recovery diode D2 and negative electrode connect source electrode and the drain electrode of IGBT pipe Q2 respectively.

Single-phase driving circuit 300 also includes:

First current detecting unit 307, the first test side and the second test side connect respectively IGBT pipe Q1 source electrode and The drain electrode of IGBT pipe Q2, for the output electric current of the drain electrode of IGBT pipe Q1 is detected, and the first detection letter of output accordingly Number；First detection signal is low level when IGBT pipe Q1 turns off, and the first detection signal is low level when IGBT pipe Q1 turns on Or high level；

Second current detecting unit 308, the first test side and the second test side connect source electrode and the ground of IGBT pipe Q2 respectively, For the output electric current of the drain electrode of IGBT pipe Q2 is detected, and the second detection signal of output accordingly；Second detection signal Being low level when IGBT pipe Q2 turns off, the second detection signal is high level when IGBT pipe Q2 turns on；

Signal monitoring unit 309, signal input part connects the outfan of the first input block 301, and the first detection signal is defeated Enter end and the second detection signal input part connects outfan and second current detecting unit of the first current detecting unit 307 respectively The outfan of 308, for when the first detection signal and/or the second detection signal are low level, by the first input block 301 Output signal output is to level conversion unit 302, when the first detection signal and the second detection signal are high level, by first The output signal of input block 301 is converted to low level output to level conversion unit 302；

Delay unit 310, input and outfan connect the outfan and second of the second input block 305 respectively and drive single The input of unit, for the output signal of the second input block 305 is carried out time delay output so that the second input block 305 defeated Go out signal and arrive the time of the second driver element 306 with the output signal of the first input block 301 by signal monitoring unit 309, to arrive time of the first driver element 304 identical for level conversion unit 302 and high voltage region signal adjustment unit 303.

If IGBT pipe Q2 is off state, then the first current detecting unit 307 and the second current detecting unit 308 are not Will detect that electric current, then both export high level simultaneously, and signal monitoring circuit 309 is by the output signal of the first input block 301 Output, and arrive IGBT pipe Q2 through level conversion unit 302, higher-pressure region signal adjustment unit the 303, first driver element 304 Grid, and then control normally the opening and turning off of IGBT pipe Q1.

If IGBT pipe Q2 is not in off state (including normally or during conducting transits to turn off), then First current detecting unit 307 and the second current detecting unit 308 will detect that electric current, and output low level simultaneously, now, nothing Opinion S_HIN3Being high level or low level by the signal exported after the first input circuit 301, signal monitoring circuit 309 all can be defeated Going out low level, this low level is through through level conversion unit 302, higher-pressure region signal adjustment unit the 303, first driver element Being similarly low level after 304 grids arriving IGBT pipe Q2, this low level makes IGBT pipe Q1 turn off, and then makes IGBT pipe Q1 exist Cut-off state is kept, to avoid the occurrence of current impulse, it is ensured that SPM work process when IGBT pipe Q2 does not complete switches off In safety.

Fig. 5 shows the exemplary circuit knot of the SPM comprising single-phase driving circuit that the embodiment of the present invention provides Structure, for convenience of description, illustrate only part related to the present invention, and details are as follows:

As one embodiment of the present invention, the first current detecting unit 307 includes resistance R1 and comparator U1, resistance R1 First test side that common contact is the first current detecting unit 307 of in-phase input end of the first end and comparator U1, resistance Second end of R1 and second test side that common contact is the first current detecting unit 307 of the inverting input of comparator U1, than The relatively outfan of device U1 is the outfan of the first current detecting unit 307.

As one embodiment of the present invention, the second current detecting unit 308 includes resistance R2 and comparator U2, resistance R2 First test side that common contact is the second current detecting unit 308 of in-phase input end of the first end and comparator U2, resistance Second end of R2 and second test side that common contact is the second current detecting unit 308 of the inverting input of comparator U2, than The relatively outfan of device U2 is the outfan of the second current detecting unit 308.

As one embodiment of the present invention, signal monitoring unit 309 includes:

Nor gate U3, NAND gate U4 and not gate U5；

The first input end 1 of nor gate U3 and the second input 2 are respectively the first detection signal of signal monitoring unit 309 Input and the second detection signal input part, the outfan 3 of nor gate U3 connects the first input end 1 of NAND gate U4, NAND gate The signal input part that second input 2 is signal monitoring unit 309 of U4, the outfan 3 of NAND gate U4 connects the defeated of not gate U5 Entering end, the outfan of not gate U5 is the outfan of signal monitoring unit 309.

As one embodiment of the present invention, delay unit 310 includes:

Not gate U6, not gate U7, NMOS tube Q3, current source I1 and electric capacity C1；

The input of not gate U6 is the input of delay unit 310, and the input of not gate U7 and outfan connect non-respectively The door outfan of U6 and the grid of NMOS tube Q3, the outfan of the drain electrode of NMOS tube Q3 and current source I1 and first end of electric capacity C1 The outfan that common contact is delay unit 310 formed, the input termination low-voltage dc power supply VCC(output electricity of current source I1 Pressure is 15V), second end of electric capacity C1 is connected to ground altogether with the substrate of NMOS tube Q3 and source electrode.

Below in conjunction with operation principle, above-mentioned single-phase driving circuit 300 is described further:

If the electric current that IGBT pipe Q2 flows through when normally is I, the reversal voltage of comparator U1 and comparator U2 is all The voltage at VB, resistance R1 and resistance R2 two ends is respectively U1 and U2.

Situation one: when IGBT pipe Q2 normally, the voltage at resistance R1 two ends and resistance R2 two ends is respectively as follows:

U1=R1×I

U2=R2×I

U1 and U2 is much larger than VB, so comparator U1 and comparator U2 output high level (the i.e. first detection signal and the Two detection signals are high level), nor gate U3 output low level, then the input of the first input end 1 of NAND gate U4 is low electricity Flat, which kind of signal what no matter the second input 2 of NAND gate U4 was inputted is, NAND gate U4 all exports high level, this high level Transferring low level output to after not gate U5, this low level passes through level conversion unit 302, higher-pressure region signal adjustment unit 303 And first driver element 304 control IGBT pipe Q1 turn off.So, when IGBT pipe Q2 normally, though S_HIN3High electricity occurs Flat, this high level also cannot pass through signal monitoring circuit 309, then IGBT pipe Q1 does not turns on, and thus can guarantee that IGBT pipe Q1 Will not simultaneously turn on IGBT pipe Q2.

Situation two: when IGBT pipe Q2 normal turn-off, from P point this path by IGBT pipe Q1 and IGBT pipe Q2 to ground Electric current on (hereinafter simply referred to as PWG path) is close to zero, then U1 and U2 is also close to for 0, so comparator U1 and comparator U2 All output low levels, nor gate U3 will export high level, if the second input 2 input low level of NAND gate U4 (or high Level), then NAND gate U4 can export high level (or low level), then by not gate U5 output low level (or high level), i.e. The output signal of NAND gate U4 is identical with the pulse width of the output signal of the first input block 301, opposite in phase, and through non- The signal that door U5 is exported after carrying out logic NOT process will be with the pulse width of the output signal of the first input block 301 and phase Position is the most identical, say, that now the output signal of the first input block 301 is actually carried out by signal monitoring unit 309 Output is maintained not make any change.So, when IGBT pipe Q2 normal turn-off, S_HIN3Can be normal through the first input block 301, signal monitoring circuit 209, level conversion unit 302, higher-pressure region signal adjustment unit 303 and the first driver element 304 are controlled The break-make of IGBT pipe Q1 processed.

Situation three: when IGBT pipe Q2 is in during opening to turn off, and the electric current on PWG path is gradually reduced from I To zero, it is assumed that at certain in a flash, electric current is Im, then both end voltage U1 of resistance R1 and both end voltage U2 of resistance R2 are respectively as follows:

U1=R1×Im

U2=R2×Im

When U1 or U2 turns off more than VB, then the IGBT pipe Q1 being equal in aforesaid " situation one ", IGBT pipe Q2 conducting Situation, described IGBT pipe 213 can be held off, and only when U1 and U2 is simultaneously less than VB, is just equal to aforesaid " situation Two ", IGBT pipe Q1 can be by S_HIN3Control and realize break-make.

In actual applications, in order to reduce the power consumption on resistance R1 and resistance R2, resistance R1 can be considered as 10m Ω or The resistance of the less resistance of person, the resistance of resistance R2 should be twice than the resistance of resistance R1, i.e. R2=2 × R1.The bar of so U2 < VB The part condition than U1 < VB is the harshest, it can be ensured that the electric current flowing through IGBT pipe Q2 is the lowest, and IGBT pipe Q2 enters the most substantially Enter off state.VB can be chosen to be VB=R1 × I ÷ 10000, i.e. when electric current Im drops to the 1/1000 of running current I, U1 is less than VB, and when electric current Im drops to the 1/20000 of running current I, U2 is less than VB.

Assume S_LIN3Signal after the second input block 305 be LA, LA after delay circuit 310, obtain signal The rising edge of width is consistent with LA, phase place is contrary with LA signal LB, LA is T1 with the time delay of the trailing edge of LB, under LA Fall is T2 along the time delay of the rising edge with LB.

Assume S_HIN3The rising edge that signal is HA, HA after described first input block 301 is through NAND gate U4, non- After door U5, level conversion unit 302 and higher-pressure region signal adjustment unit 303, obtain that signal width is consistent with HA, phase place and HA phase The delay of the rising edge of the rising edge of anti-signal HB, HA and the trailing edge that time delay is T3, HA of the trailing edge of HB and HB Time is T4.

Owing to delay unit 310 is for regulating S_LIN3The transmission time, make S_LIN3The transmission time and S_HIN3Normally passed Time when sending keeps consistent, i.e. must meet:

T1=T3

T2=T4

In actual applications, not gate U6 and not gate U7 adjusts for signal waveform, and size is the least, and NMOS tube Q3 also selects The pipe that PNP type triode in undersized original paper, not gate U6 and not gate U7 all can use breadth length ratio to be 10 μm/5 μm, The pipe that NPN type triode Guan Douke in not gate U6 and not gate U7 uses breadth length ratio to be 5 μm/5 μm, NMOS tube Q3 can use width Long than the pipe being 20 μm/10 μm.For the BCD technique of current popular, the total delay of generation, not over 10ns, is to neglect Slightly.Therefore, T1 depends primarily on the electric capacity C1 discharge process to NMOS tube Q3, and T2 depends primarily on current source I1 to electric capacity C1 Charging process.

The threshold value assuming the second driver element 306 is V_th, the capacitance of electric capacity C1 is C_delay。

When NMOS tube Q3 becomes conducting from cut-off, and the voltage of electric capacity C1 becomes V from VCC_thTime be T1.

When NMOS tube Q3 becomes cut-off from conducting, and the voltage of electric capacity C1 becomes V from 0_thTime be T2.

The electron mobility assuming NMOS tube Q3 is μ_n, grid oxygen electric capacity be C_ox, grid oxygen width be W, a length of L of grid oxygen, threshold Threshold voltage is V_thn, then capacitance C of electric capacity C1_delayFor:

$C_{\mathrm{delay}}=\frac{{\mathrm{\&mu;}}_n\&CenterDot;C_{\mathrm{ox}}\&CenterDot;\frac{W}{L}{(\mathrm{VCC}-V_{\mathrm{thn}})}^2\&CenterDot;T1}{\mathrm{VCC}-V_{\mathrm{th}}}---\left(1\right)$

VCC is generally 15V, V_thDetermined by the second driver element 306, μ_n、C_oxAnd V_thnBe given by flow technique,T1=T3, therefore, C_delayUniquely can be determined by above formula (1).

The electric current assuming current source I1 is I_delay, then I_delayFor:

$I_{\mathrm{delay}}=\frac{C_{\mathrm{delay}}\&CenterDot;V_{\mathrm{th}}}{T2}---\left(2\right)$

Due to V_thAnd C_delayIt is known that T2=T4, therefore, I_delayUniquely can be determined by above formula (2).

In sum, the embodiment of the present invention by use in SPM include the first current detecting unit, the Two current detecting units, signal monitoring unit and the single-phase driving circuit of delay unit, by the first current detecting unit and second The output electric current of the IGBT pipe Q2 exporting electric current and lower brachium pontis of the IGBT pipe Q1 of upper brachium pontis is carried out by current detecting unit respectively Detection, is converted to low electricity when IGBT pipe Q2 is not turned off by the upper brachium pontis input signal processed after filtering by signal monitoring unit Mean longitude over level converting unit and higher-pressure region signal adjustment unit drive the first driver element to control IGBT pipe Q1 and turn off, and then make IGBT pipe Q1 and IGBT pipe Q2 does not haves situation about simultaneously turning on, and reduces the machine that SPM lost efficacy because mistake stream punctures Rate, contributes to extending the service life of SPM, it is ensured that the safety of SPM.

The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all essences in the present invention Any amendment, equivalent and the improvement etc. made within god and principle, should be included within the scope of the present invention.

Claims (5)

1. a SPM, including three single-phase driving circuits, described three single-phase driving circuits export three-phase respectively U phase electricity in alternating current, V phase electricity are electric with W phase, and each single-phase driving circuit in described three single-phase driving circuits includes the One input block, level conversion unit, higher-pressure region signal adjustment unit, the first driver element, the second input block, the second driving Unit, IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2 and fast recovery diode D2, described first input block and described Upper brachium pontis input signal and lower brachium pontis input signal are filtered by the second input block respectively, and described level conversion unit is by institute Export after stating the incoming higher-pressure region of low-pressure area signal in the output signal of the first input block, and adjusted by described higher-pressure region signal Unit compensates output extremely described first driver element after process, and described first driver element and described second driver element divide Sheng Cheng not have the pulse signal of current driving ability to control described IGBT pipe Q1 and the break-make of described IGBT pipe Q2；Described The drain electrode of IGBT pipe Q1 accesses high voltage, and the anode of described fast recovery diode D1 and negative electrode connect described IGBT pipe Q1's respectively Source electrode and drain electrode, the source electrode of described IGBT pipe Q1 exports described U phase V electric, described with the common contact of the drain electrode of described IGBT pipe Q2 Mutually electric or described W phase is electric, the source ground of described IGBT pipe Q2, and anode and the negative electrode of described fast recovery diode D2 connect respectively The source electrode of described IGBT pipe Q2 and drain electrode；It is characterized in that, described single-phase driving circuit also includes:

First current detecting unit, the first test side and the second test side connect the source electrode of described IGBT pipe Q1 and described respectively The drain electrode of IGBT pipe Q2, for the output electric current of the drain electrode of described IGBT pipe Q1 is detected, and the first inspection of output accordingly Survey signal；Described first detection signal is low level when described IGBT pipe Q1 turns off, and described first detection signal is described It is low level or high level during IGBT pipe Q1 conducting；

Second current detecting unit, the first test side and the second test side connect source electrode and the ground of described IGBT pipe Q2 respectively, use Output electric current in the drain electrode to described IGBT pipe Q2 detects, and the second detection signal of output accordingly；Described second inspection Surveying signal is low level when described IGBT pipe Q2 turns off, and described second detection signal is high electricity when described IGBT pipe Q2 turns on Flat；

Signal monitoring unit, signal input part connect described first input block outfan, first detection signal input part and Second detection signal input part connects the outfan of described first current detecting unit and described second current detecting unit respectively Outfan, for when described first detect signal and/or described second detection signal be low level time, will described first input The output signal output of unit is to described level conversion unit, when described first detection signal and described second detection signal are During high level, the output signal of described first input block is converted to low level output to described level conversion unit；

Delay unit, input and outfan connect the outfan of described second input block and described second driver element respectively Input, for the output signal of described second input block is carried out time delay output so that described second input block defeated Go out signal and arrive the time of described second driver element with the output signal of described first input block by described signal monitoring The time that unit, described level conversion unit and described higher-pressure region signal adjustment unit arrive described first driver element is identical.

2. SPM as claimed in claim 1, it is characterised in that described first current detecting unit includes resistance R1 With comparator U1, first end of described resistance R1 is described first electric current with the common contact of the in-phase input end of described comparator U1 First test side of detector unit, second end of described resistance R1 is institute with the common contact of the inverting input of described comparator U1 Stating the second test side of the first current detecting unit, the outfan of described comparator U1 is the defeated of described first current detecting unit Go out end.

3. SPM as claimed in claim 1, it is characterised in that described second current detecting unit includes resistance R2 With comparator U2, first end of described resistance R2 is described second electric current with the common contact of the in-phase input end of described comparator U2 First test side of detector unit, second end of described resistance R2 is institute with the common contact of the inverting input of described comparator U2 Stating the second test side of the second current detecting unit, the outfan of described comparator U2 is the defeated of described second current detecting unit Go out end.

4. SPM as claimed in claim 1, it is characterised in that described signal monitoring unit includes:

Nor gate U3, NAND gate U4 and not gate U5；

The first input end of described nor gate U3 and the second input are respectively the first detection signal of described signal monitoring unit Input and the second detection signal input part, the outfan of described nor gate U3 connects the first input end of described NAND gate U4, Second input of described NAND gate U4 is the signal input part of described signal monitoring unit, and the outfan of described NAND gate U4 is even Connecing the input of described not gate U5, the outfan of described not gate U5 is the outfan of described signal monitoring unit.

5. SPM as claimed in claim 1, it is characterised in that described delay unit includes:

Not gate U6, not gate U7, NMOS tube Q3, current source I1 and electric capacity C1；

The input that input is described delay unit of described not gate U6, input and the outfan of described not gate U7 connect respectively Connecing outfan and the grid of described NMOS tube Q3 of described not gate U6, the drain electrode of described NMOS tube Q3 is defeated with described current source I1's Going out the outfan that common contact is described delay unit that first end of end and described electric capacity C1 is formed, described current source I1's is defeated Entering and terminate low-voltage dc power supply, second end of described electric capacity C1 is connected to ground altogether with the substrate of described NMOS tube Q3 and source electrode.