CN104078986B - A kind of method of digital phase-locked loop of the reactive power compensator based on three-phase positive sequence component and device thereof - Google Patents

Abstract

Based on a method for the digital phase-locked loop of the reactive power compensator of three-phase positive sequence component, relate to electric network reactive compensation technical field, object be to provide a kind of negative sequence component can be avoided to affect phase-locked loop method and the higher reactive power compensator of stability.It comprises the steps, step 1, three-phase voltage signal is carried out positive-negative sequence separation, obtains three-phase positive sequence component; Step 2, phase demodulation is carried out to positive sequence component; Step 3, identified result after low pass filter filtering again diagonal frequencies correct, angular frequency obtains actual electric network angular frequency after being corrected; Step 4, actual electric network angular frequency carry out integration and obtain electrical network angle; Step 5, then by electrical network angle send into digital oscillator obtain phase-locked output.

Description

A kind of method of digital phase-locked loop of the reactive power compensator based on three-phase positive sequence component and device thereof

Technical field

The present invention, for relating to electric network reactive compensation technical field, provides the method and device of planting based on the digital phase-locked loop of the reactive power compensator of three-phase positive sequence component.

Background technology

Along with the economic develop rapidly of China, commercial power and electricity consumption of resident increasing, electrical network is caused to there is idle and harmonic wave in a large number, domestic the quality of power supply also more and more to be paid attention to, SVG is as a kind of dynamic compensating device, quick and precisely can carry out dynamic passive compensation, to reduce the line loss in electric power transfer, improve utilization rate of electrical, in SVG compensation arrangement, electrical network is phase-locked is one of key technology, the quality of the direct decision device performance of phase-locked quality, if equipment generation losing lock, SVG compensation arrangement is by job insecurity, and the quality of power supply can not get best improvement.

The synchronized method of early stage SVG is hardware phase lock high precision method, by comparator, voltage over zero is caught, but this method is very easily interfered, even if employing Schmidt trigger, if disturbed before the real zero passage of voltage, Schmidt can only, using disturbance trigger instants first as synchronous point, cause synchronous point to move forward and losing lock.

Occurred SSRF-SPLL phase locking technique subsequently, the method does not consider that negative sequence component is on phase-locked impact, if when line voltage occurs that negative sequence component is larger, phase-locked result can produce fluctuation.

In order to the impact overcoming negative sequence component has people to also been proposed DDSRF-SPLL phase locking technique, the method basic thought adopts a kind of algorithm to isolate positive sequence and negative sequence component, the method can to avoid in electrical network negative sequence component on phase-locked impact, but algorithm is very complicated, wherein relate to multiple low pass filter, it is more difficult that low pass filter realizes, and low pass filter exists the slow problem of response speed, causes can not get actual effective application.

Summary of the invention

The object of the present invention is to provide and a kind ofly can avoid the impact of negative sequence component on phase-locked loop, the method for the digital phase-locked loop that the stability of device is high and device thereof.

In order to realize such scheme, the present invention by the following technical solutions:

Based on a method for the digital phase-locked loop of the reactive power compensator of three-phase positive sequence component, it is characterized in that:

Step 1, three-phase voltage signal is carried out positive-negative sequence separation, obtain three-phase positive sequence component;

Step 2, phase demodulation is carried out to positive sequence component;

Step 3, identified result after low pass filter filtering again diagonal frequencies correct, angular frequency obtains actual electric network angular frequency after being corrected;

Step 4, actual electric network angular frequency carry out integration and obtain electrical network angle;

Step 5, then by electrical network angle send into digital oscillator obtain phase-locked output.

In technique scheme, in step 1, positive-negative sequence is divided and is specifically comprised the steps:

Use sine and cosine carry out DQ conversion to line voltage, mains voltage signal its signal after over-rotation is formula (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}-U^{-}{e}^{-j(2\mathrm{wt}+{\mathrm{\φ}}^{-})}---\left(1\right)$

History of existence signal formula (2) can be released by (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}+U^{-}{e}^{-j(2\mathrm{wt}+{\mathrm{\φ}}^{-})}---\left(2\right)$

Can extract positive sequence component by (1)+(2) summation is formula (3)

${2U}^{+}{e}^{{\mathrm{j\φ}}^{+}}---\left(3\right)$

Use same method, by the sine and cosine of reverse rotation carrying out DQ conversion, can to extract negative sequence component be formula (4)

${2U}^{-}{e}^{{\mathrm{j\φ}}^{-}}---\left(4\right)$

Input signal through DQ conversion after, buffer memory is carried out to DQ transform data, carries out addition by current data and historical data and obtain positive sequence component, then carry out anti-DQ conversion can obtain three-phase positive sequence component.

In technique scheme, directly use the Q axle result of DQ conversion as identified result, when signal Complete Synchronization, Q axle component is zero, and namely identified result is 0.

In technique scheme, after Phase-Locked Synchronous, DQ conversion is carried out to three-phase system, to realize the control to electric current, obtain instruction current by load current and direct voltage, at decoupling zero CMOS macro cell command voltage, regulate inverter to export and realize the idle compensation of load.

Present invention also offers a kind of device of digital phase-locked loop of the reactive power compensator based on three-phase positive sequence component, it is characterized in that: comprise positive-negative sequence separator, phase discriminator, low pass filter, digital controlled oscillator, three-phase voltage signal is sent into positive-negative sequence separator and is carried out positive sequence separation, positive sequence component is sent into phase discriminator and is carried out phase demodulation, identified result obtains angular frequency correction value through low pass filter, angular frequency obtains actual electric network angular frequency after being corrected, angular frequency obtains electrical network angle by integrator, then sends into digital oscillator and obtains phase-locked output.

The device of the digital phase-locked loop of a kind of reactive power compensator based on three-phase positive sequence component described in technique scheme, positive-negative sequence separator, uses sine and cosine carry out DQ conversion to line voltage, baseband signal its signal after over-rotation is formula (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}-U^{-}{e}^{-j(2\mathrm{wt}+{\mathrm{\φ}}^{-})}---\left(1\right)$

History of existence signal formula (2) can be released by (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}+U^{-}{e}^{-j(2\mathrm{wt}+{\mathrm{\φ}}^{-})}---\left(2\right)$

Can extract positive sequence component by (1)+(2) summation is formula (3)

${2U}^{+}{e}^{{\mathrm{j\φ}}^{+}}---\left(3\right)$

Use same method, by the sine and cosine of reverse rotation carrying out DQ conversion, can to extract negative sequence component be formula (4)

${2U}^{-}{e}^{{\mathrm{j\φ}}^{-}}---\left(4\right)$

Input signal through DQ conversion after, buffer memory is carried out to DQ transform data, carries out addition by current data and historical data and obtain positive sequence component, then carry out anti-DQ conversion can obtain three-phase positive sequence component.

Compared with immediate prior art, what technological merit the application's motion has

1, the present invention is directed to this weak link of SVG device phase-locked loop and carry out technological improvement, this reactive power compensator isolates positive sequence component and negative sequence component by digital method, use positive sequence component to carry out phase-locked, thus avoid the impact of negative sequence component on phase-locked loop, improve the stability of device.

2, this invention has phase-locked speed soon, and synchronization accuracy is high, strong robustness, thus ensure that SVG device stable operation and idle accurate compensation.

Accompanying drawing explanation

Fig. 1 is based on the static passive compensation device of three-phase positive sequence component digital phase-locked loop

Fig. 2 is line voltage positive sequence component digital phase-locked loop

Fig. 3 is that positive-negative sequence is separated block diagram;

Fig. 4 is low-pass filter structure

Fig. 5 is control block diagram;

Fig. 6 is shown in figure based on the static passive compensation device application connection of three-phase positive sequence component digital phase-locked loop.

Embodiment

Below in conjunction with accompanying drawing, the present invention is described further:

The invention provides static passive compensation device, comprise collecting unit, DSP control unit, inversion unit, driver element, auxiliary electric unit, Human-machine Control unit, apparatus structure is shown in Fig. 1.

Static passive compensation device is by carrying out digital servo-control, double-closed-loop control, driver output to voltage acquisition signal, export reactive current by inverter and reactive power compensation is carried out to electrical network, wherein phase-locked link is most important, also be the weak link of system, reliable and stable phase-locked be the prerequisite of this device assurance function and performance, therefore propose a kind of technology based on three-phase positive sequence component digital phase-locked loop herein.

Line voltage mainly comprises positive sequence component and negative sequence component, its voltage equation as shown in the formula:

$\begin{array}{c}{U}_a=U^{+}\sin (\mathrm{wt}+{\mathrm{\φ}}^{+})+U^{-}\sin (\mathrm{wt}+{\mathrm{\φ}}^{-})+U^0\sin (\mathrm{wt}+{\mathrm{\φ}}^0)\\ =U^{+}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+})-e^{-(\mathrm{jwt}+{\mathrm{\φ}}^{+})}}}{2j}+U^{-}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{-})-e^{-(\mathrm{jwt}+{\mathrm{\φ}}^{-})}}}{2j}+U^0\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^0)-e^{-(\mathrm{jwt}+{\mathrm{\φ}}^0)}}}{2j}\end{array}$

$\begin{array}{c}{U}_b=U^{+}\sin (\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{2}{3}\mathrm{\π})+U^{-}\sin (\mathrm{wt}+{\mathrm{\φ}}^{-}+\frac{2}{3}\mathrm{\π})+U^0\sin (\mathrm{wt}+{\mathrm{\φ}}^0)\\ =U^{+}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{2}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{2}{3}\mathrm{\π})}}{2j}+U^{-}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+}+\frac{2}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{+}+\frac{2}{3}\mathrm{\π})}}{2j}+U^0\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^0)-e^{-(\mathrm{jwt}+{\mathrm{\φ}}^0)}}}{2j}\end{array}$

$\begin{array}{c}{U}_c=U^{+}\sin (\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{4}{3}\mathrm{\π})+U^{-}\sin (\mathrm{wt}+{\mathrm{\φ}}^{-}+\frac{4}{3}\mathrm{\π})+U^0\sin (\mathrm{wt}+{\mathrm{\φ}}^0)\\ =U^{+}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{4}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{4}{3}\mathrm{\π})}}{2j}+U^{-}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+}+\frac{4}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{+}+\frac{4}{3}\mathrm{\π})}}{2j}+U^0\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^0)-e^{-(\mathrm{jwt}+{\mathrm{\φ}}^0)}}}{2j}\end{array}$

Be mapped on space vector for the ease of analyzing, mapping relations are as follows:

$\stackrel{\→}{A}=U_a{e}^{j0\mathrm{\π}}=U^{+}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+})-e^{-j(\mathrm{wt}-{\mathrm{\φ}}^{+})}}}{2j}+U^{-}\frac{e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{-})-e^{j(\mathrm{wt}+{\mathrm{\φ}}^{-})}}}{2j}+U^0\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^0)-e^{-j(\mathrm{wt}-{\mathrm{\φ}}^0)}}}{2j}$

$\stackrel{\→}{B}=U_b{e}^{j\frac{2}{3}\mathrm{\π}}=U^{+}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+})-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{4}{3}\mathrm{\π})}}}{2j}+U^{-}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{-}+\frac{4}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{-})}}{2j}+U^0\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^0+\frac{2}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^0+\frac{2}{3}\mathrm{\π})}}{2j}$

$\stackrel{\→}{C}=U_c{e}^{j\frac{4}{3}\mathrm{\π}}=U^{+}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{+})-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{+}-\frac{2}{3}\mathrm{\π})}}}{2j}+U^{-}\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^{-}+\frac{2}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^{-})}}{2j}+U^0\frac{e^{j(\mathrm{wt}+{\mathrm{\φ}}^0+\frac{4}{3}\mathrm{\π})}-e^{-j(\mathrm{wt}+{\mathrm{\φ}}^0+\frac{4}{3}\mathrm{\π})}}{2j}$

Three-phase positive sequence component digital phase-locked loop, comprises positive-negative sequence separator, phase discriminator, low pass filter, digital controlled oscillator.Three-phase voltage signal is sent into positive-negative sequence separator and is carried out positive sequence separation, positive sequence component is sent into phase discriminator and is carried out phase demodulation, identified result obtains angular frequency correction value through low pass filter, angular frequency obtains actual electric network angular frequency after being corrected, angular frequency obtains electrical network angle by integrator, then send into digital oscillator and obtain phase-locked output, its implementation structure is shown in Fig. 2.

Positive-negative sequence separator:

Use sine and cosine carry out DQ conversion to line voltage, baseband signal its signal after over-rotation is formula (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}-U^{-}{e}^{-j(2\mathrm{wt}+{\mathrm{\φ}}^{-})}---\left(1\right)$

History of existence signal formula (2) can be released by (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}+U^{-}{e}^{-j(2\mathrm{wt}+{\mathrm{\φ}}^{-})}---\left(2\right)$

From above formula analysis, can extract positive sequence component by (1)+(2) summation is formula (3)

${2U}^{+}{e}^{{\mathrm{j\φ}}^{+}}---\left(3\right)$

Use same method, by the sine and cosine of reverse rotation carrying out DQ conversion, can to extract negative sequence component be formula (4)

${2U}^{-}{e}^{{\mathrm{j\φ}}^{-}}---\left(4\right)$

Fig. 3 is the positive and negative separation block diagram of three-phase, input signal through DQ conversion after, buffer memory is carried out to DQ transform data, carries out addition by current data and historical data and obtain positive sequence component, then carry out anti-DQ conversion can obtain three-phase positive sequence component.

Phase discriminator:

All can use DQ conversion for three-phase grid equipment, the Q axle result that can directly use DQ to convert is as identified result, and when signal Complete Synchronization, Q axle component is zero, and namely identified result is 0.

Low pass filter:

Identified result is exported according to phase discriminator, in order to improve response speed, a preposition error amplifier, also can realize by regulating pi regulator parameter below, its effect is the same, PI regulates and can carry out non differential regulation on the one hand, its integral action of another side can realize low-pass filtering, high frequency components is suppressed, have good steady-state behaviour, Fig. 4 shows the implementation method of low pass filter, and Wref reference signal is corrected by the output variable of PI, export actual w signal, w signal obtains theta signal after integrator.

Digital controlled oscillator:

This phase-lock mode is digital servo-control, and digital controlled oscillator can call the output that Sin and Cos function is directly calculated or obtained numerical control oscillator by sine and cosine look-up table.

After Phase-Locked Synchronous, carry out DQ conversion to three-phase system, to realize the control to electric current, obtain instruction current by load current and direct voltage, at decoupling zero CMOS macro cell command voltage, regulate inverter to export and realize the idle compensation of load, its control block diagram is shown in Fig. 5:

This compensation is articulated in user load front end, and can compensate the idle component of access point backend load, connection is shown in Fig. 6.

Claims (4)

1., based on a method for the digital phase-locked loop of the reactive power compensator of three-phase positive sequence component, it is characterized in that:

Step 1, three-phase voltage signal is carried out positive-negative sequence separation, obtain three-phase positive sequence component;

Step 2, phase demodulation is carried out to positive sequence component;

Step 3, identified result after low pass filter filtering again diagonal frequencies correct, angular frequency obtains actual electric network angular frequency after being corrected;

Step 4, actual electric network angular frequency carry out integration and obtain electrical network angle;

Step 5, then by electrical network angle send into digital oscillator obtain phase-locked output;

In step 1, positive-negative sequence is separated and specifically comprises the steps:

Use sine and cosine carry out DQ conversion to line voltage, mains voltage signal its signal after over-rotation is formula (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}-U^{-}{e}^{-j(2wt+{\mathrm{\φ}}^{-})}---\left(1\right)$

History of existence signal formula (2) can be released by (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}+U^{-}{e}^{-j(2wt+{\mathrm{\φ}}^{-})}---\left(2\right)$

Can extract positive sequence component by (1)+(2) summation is formula (3)

$2U^{+}{e}^{{\mathrm{j\φ}}^{+}}---\left(3\right)$

Use same method, by the sine and cosine of reverse rotation carrying out DQ conversion, can to extract negative sequence component be formula (4)

$2U^{-}{e}^{{\mathrm{j\φ}}^{-}}---\left(4\right)$

Input signal through DQ conversion after, buffer memory is carried out to DQ transform data, carries out addition by current data and historical data and obtain positive sequence component, then carry out anti-DQ conversion can obtain three-phase positive sequence component.

2. the method for the digital phase-locked loop of a kind of reactive power compensator based on three-phase positive sequence component according to claim 1, it is characterized in that: directly use the Q axle result of DQ conversion as identified result, when signal Complete Synchronization, Q axle component is zero, and namely identified result is 0.

3. one kind adopts the method for the digital phase-locked loop of a kind of reactive power compensator based on three-phase positive sequence component according to claim 1, it is characterized in that, after Phase-Locked Synchronous, DQ conversion is carried out to three-phase system, to realize the control to electric current, obtain instruction current by load current and direct voltage, at decoupling zero CMOS macro cell command voltage, regulate inverter to export and realize the idle compensation of load.

4. the device based on the digital phase-locked loop of the reactive power compensator of three-phase positive sequence component, it is characterized in that: comprise positive-negative sequence separator, phase discriminator, low pass filter, digital controlled oscillator, three-phase voltage signal is sent into positive-negative sequence separator and is carried out positive sequence separation, positive sequence component is sent into phase discriminator and is carried out phase demodulation, identified result obtains angular frequency correction value through low pass filter, angular frequency obtains actual electric network angular frequency after being corrected, actual electric network angular frequency, obtain electrical network angle by integrator, then send into digital oscillator and obtain phase-locked output;

Positive-negative sequence separator, uses sine and cosine carry out DQ conversion to line voltage, baseband signal its signal after over-rotation is formula (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}-U^{-}{e}^{-j(2wt+{\mathrm{\φ}}^{-})}---\left(1\right)$

History of existence signal formula (2) can be released by (1):

$U^{+}{e}^{{\mathrm{j\φ}}^{+}}+U^{-}{e}^{-j(2wt+{\mathrm{\φ}}^{-})}---\left(2\right)$

Can extract positive sequence component by (1)+(2) summation is formula (3)

$2U^{+}{e}^{{\mathrm{j\φ}}^{+}}---\left(3\right)$

Use same method, by the sine and cosine of reverse rotation carrying out DQ conversion, can to extract negative sequence component be formula (4)

$2U^{-}{e}^{{\mathrm{j\φ}}^{-}}---\left(4\right)$

Input signal through DQ conversion after, buffer memory is carried out to DQ transform data, carries out addition by current data and historical data and obtain positive sequence component, then carry out anti-DQ conversion can obtain three-phase positive sequence component.