CN104076406A - Small-signal processing circuit for micro-resistivity scanning imaging - Google Patents
Small-signal processing circuit for micro-resistivity scanning imaging Download PDFInfo
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- CN104076406A CN104076406A CN201410342445.8A CN201410342445A CN104076406A CN 104076406 A CN104076406 A CN 104076406A CN 201410342445 A CN201410342445 A CN 201410342445A CN 104076406 A CN104076406 A CN 104076406A
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Abstract
The invention discloses a small-signal processing circuit for micro-resistivity scanning imaging. The small-signal processing circuit comprises a signal acquisition module and a differential amplification module. The signal acquisition module and the differential amplification module are connected in series. The signal acquisition module is used for collecting electrode signals and filtering the electrode signals. The differential amplification module is used for conducting secondary filtration and amplification on the filtered electrode signals and outputting the voltage value of the processed electrode signals. According to the small-signal processing circuit for micro-resistivity scanning imaging, a shielding device is additionally arranged in the circuit, a differential circuit is used for filtering noise doped in small-signal voltages to obtain clean small-signal voltages, and then the accurate voltage difference between two points in a stratum can be measured.
Description
Technical field
The present invention relates to petroleum exploration field, relate in particular to a kind of small signal process circuit for microresistivity scanning imagery.
Background technology
Microresistivity scanning imagery well logging can reflect more accurately, intuitively and therefore, is applied to the important informations such as tectonic structure in well, factor of porosity and fracture distribution more and more widely in each important step of petroleum exploration and development.
In order to realize microresistivity scanning imagery, need to record in advance some parameters at present, resistivity is exactly wherein a kind of.And in order to record resistivity, the instrument of microresistivity scanning imagery also needs first to obtain other some parameters, measure in stratum the voltage difference of 2, because voltage extent can reflect the variation of the microresistivity that ground etale neighborhood that button-electrode faces causes due to rock texture or nonuniformity chemically, so we will measure this voltage difference.
Because the voltage in stratum is small-signal, and small-signal is as the term suggests be exactly that the voltage amplitude of input signal is very little, conventionally in signal, all can there is noise, and in electronic system, noise is generally defined as all unwanted undesired signal beyond object signal in circuit, when so our small signal in this stratum of measurement is poor, if circuit design processing is bad, small-signal tends to be submerged under noise floor, therefore, how to eliminate noise, improve signal to noise ratio (S/N ratio) and become to measure in stratum the key of the voltage difference of 2.
Summary of the invention
The embodiment of the present invention provides a kind of small signal process circuit for microresistivity scanning imagery, by increasing shield assembly and use difference channel to carry out filtering to the noise being entrained in described small signal in described circuit, obtain clean small signal, and then can record in stratum accurately the voltage difference of 2.
First aspect present invention provides a kind of small signal process circuit for microresistivity scanning imagery, can comprise: signal acquisition module and differential amplification module, described signal acquisition module and differential amplification module are connected in series, described signal acquisition module is for acquisition electrode signal and described electrode signal is carried out to filtering, described differential amplification module, for filtered described electrode signal being carried out to secondary filtering and amplifying, is exported described electrode signal magnitude of voltage after treatment.
In the possible implementation of the first of first aspect, described signal acquisition module comprises first signal Acquisition Circuit and secondary signal Acquisition Circuit, and described first signal Acquisition Circuit and described secondary signal Acquisition Circuit are parallel-connected to described differential amplification module.
In the possible implementation of the second of first aspect, described first signal Acquisition Circuit comprises filtering circuit and voltage follower circuit, and described secondary signal Acquisition Circuit is identical with described first signal Acquisition Circuit circuit structure.
In the third possible implementation of first aspect, described filtering circuit comprises shield assembly S1, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first integrated transporting discharging U1, the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4 and the 5th capacitor C 5, described shield assembly S1 comprises wire, spring and shielding line, described spring housing is in the outside of described wire, the signal input point M1U of described first signal Acquisition Circuit is for being connected to electrode signal acquisition by described wire, one end of described spring is used for being connected to insulated metal, the other end of described spring is connected to the signal ground reference point G1U place of described first signal Acquisition Circuit, described shielding line is the closed wiring on the circuit board corresponding with circuit, described shielding line is by described the first capacitor C 1, described the first resistance R 1 and described signal input point M1U surround, described signal ground reference point G1U arbitrary position on described shielding line, described first capacitor C 1 one end is connected to described signal input point M1U place, the other end of described the first capacitor C 1 is connected to the inverting input of described the first integrated transporting discharging U1 by described the first resistance R 1, the in-phase input end of described the first integrated transporting discharging U1 is connected to described signal ground reference point G1U place by described the second resistance R 2, the in-phase input end of described the first integrated transporting discharging U1 is also by described the 5th capacitor C 5 ground connection, the positive power source terminal of described the first integrated transporting discharging U1 is by described the 4th capacitor C 4 ground connection, the negative power end of described the first integrated transporting discharging U1 is by described the 3rd capacitor C 3 ground connection, described the 3rd resistance R 3 one end are connected to the inverting input of described the first integrated transporting discharging U1 by described the second capacitor C 2, the other end of described the 3rd resistance R 3 is connected to the output terminal of described the first integrated transporting discharging U1, the output terminal of described the first integrated transporting discharging U1 is the output terminal of described first signal Acquisition Circuit, be used for exporting described first signal Acquisition Circuit filtered described electrode signal magnitude of voltage for the first time.
In the 4th kind of possible implementation of first aspect, described voltage follower circuit comprises the 4th resistance R 4, the 5th resistance R 5, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8 and the second integrated transporting discharging U2, the other end of described the 6th capacitor C 6 is connected to the inverting input of described the second integrated transporting discharging U2 by described the 4th resistance R 4, the in-phase input end of described the second integrated transporting discharging U2 is connected to the output terminal of described the second integrated transporting discharging U2, the output terminal of described the second integrated transporting discharging U2 is connected to the inverting input of described the first integrated transporting discharging U1, one end ground connection after described the 5th resistance R 5 and described the 8th capacitor C 8 series connection, the other end after described the 5th resistance R 5 and described the 8th capacitor C 8 series connection is connected between described the 4th resistance R 4 and described the 6th capacitor C 6, one end ground connection of described the 7th capacitor C 7, the other end of described the 7th capacitor C 7 is connected between described the 4th resistance R 4 and described the 6th capacitor C 6.
In the 5th kind of possible implementation of first aspect, described differential amplification module comprises the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13, the 14 capacitor C 14, the 15 capacitor C 15 and the 3rd integrated transporting discharging U3, the first signal Acquisition Circuit output point A1 of described differential amplification module is connected to the output terminal of described first signal Acquisition Circuit, the secondary signal Acquisition Circuit output point A2 of described differential amplification module is connected to the output terminal of described secondary signal Acquisition Circuit, described first signal Acquisition Circuit output point A1 is connected by described the 8th resistance R 8 with described secondary signal Acquisition Circuit output point A2, described the 6th resistance R 6 one end are connected to described first signal Acquisition Circuit output point A1, described the 6th resistance R 6 other end ground connection, described the 7th resistance R 7 one end connect described first signal Acquisition Circuit output point A1, after described the 7th series connection of resistance R 7 other ends by described the 9th capacitor C 9 and described the 11 resistance R 11, be connected to the in-phase input end of described the 3rd integrated transporting discharging U3, described the tenth resistance R 10 one end are connected to described secondary signal Acquisition Circuit output point A2, described the tenth resistance R 10 other end ground connection, described the 9th resistance R 9 one end are connected to described secondary signal Acquisition Circuit output point A2, after the series connection of the other end of described the 9th resistance R 9 by described the 11 capacitor C 11 and described the 13 resistance R 13, be connected to the inverting input of described the 3rd integrated transporting discharging U3, described the tenth capacitor C 10 one end are connected between described the 7th resistance and described the 9th electric capacity, the other end of described the tenth capacitor C 10 is connected between described the 9th resistance R 9 and described the 11 capacitor C 11, the positive power source terminal of described the 3rd integrated transporting discharging U3 is by described the 12 capacitor C 12 ground connection, the negative power end of described the 3rd integrated transporting discharging U3 is by described the 13 capacitor C 13 ground connection, one end after described the 15 capacitor C 15 and described the 12 resistance R 12 parallel connections is connected to the in-phase input end of described the 3rd integrated transporting discharging U3, the other end after described the 15 capacitor C 15 and described the 12 resistance R 12 parallel connections is connected to the output terminal of described the 3rd integrated transporting discharging U3, one end after described the 14 resistance R 14 and described the 14 capacitor C 14 series connection is connected to the output terminal of described the 3rd integrated transporting discharging U3, other end ground connection after described the 14 resistance R 14 and described the 14 capacitor C 14 series connection, the tie point place of described the 14 resistance R 14 and described the 14 electric capacity is the electrode signal output point B of described differential amplification module.
In the 6th kind of possible implementation of first aspect, the described electrode signal voltage output end that described electrode signal output point B is described circuit, for exporting the described electrode signal magnitude of voltage after described processing of circuit.
As can be seen from the above technical solutions, the embodiment of the present invention has the following advantages:
In the embodiment of the present invention, by signalization acquisition module and differential amplification module, and in signal acquisition module, increase shield assembly the small-signal for microresistivity scanning imagery is carried out to denoising filtering processing, by differential amplification module, small-signal after treatment is amplified, finally can obtain clean small signal, make like this small-signal be unlikely to be submerged under noise floor because noise is excessive, for the voltage difference of measuring in stratum at 2 provides convenience, and then facilitate the measurement of resistivity.
Term " first " in instructions of the present invention and claims and above-mentioned accompanying drawing, " second ", " the 3rd " " 4th " etc. are for distinguishing similar object, and needn't be used for describing specific order or precedence.The data that should be appreciated that such use suitably can exchanged in situation, so that the embodiments described herein can be implemented with the order except the content of here diagram or description.In addition, term " comprises " and " having " and their any distortion, intention is to cover not exclusive comprising, for example, those steps or unit that process, method, system, product or the equipment that has comprised series of steps or unit is not necessarily limited to clearly list, but can comprise clearly do not list or for these processes, method, product or equipment intrinsic other step or unit.
The above, above embodiment only, in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to previous embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or part technical characterictic is wherein equal to replacement; And these amendments or replacement do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Brief description of the drawings
Fig. 1 is embodiment 1 schematic diagram for the small signal process circuit of microresistivity scanning imagery in the embodiment of the present invention;
Fig. 2 is embodiment 2 schematic diagram for the small signal process circuit of microresistivity scanning imagery in the embodiment of the present invention;
Fig. 3 a and Fig. 3 b are embodiment 3 schematic diagram for the small signal process circuit of microresistivity scanning imagery in the embodiment of the present invention.
Embodiment
The embodiment of the present invention provides a kind of small signal process circuit for microresistivity scanning imagery, can carry out filtering to the noise being entrained in described small-signal, obtain clean small signal, and then can record in stratum accurately the voltage difference of 2, for the measurement of resistivity provides convenience.
In order to make those skilled in the art person understand better the present invention program, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the embodiment of a part of the present invention, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, should belong to the scope of protection of the invention.
At present comprise multiple pole plates for the instrument of microresistivity scanning imagery, on each pole plate, be provided with a pair of radiating circuit for generation of alternating current, each radiating circuit is launched by electrode or is received signal, between two electrodes, be provided with multipair button-electrode, we just describe following examples as background to be arranged in voltage difference that button-electrode on pole plate measures 2, stratum.
Fig. 1 is embodiment 1 schematic diagram for the small signal process circuit of microresistivity scanning imagery in the embodiment of the present invention.Consult Fig. 1, small signal process circuit for microresistivity scanning imagery in the embodiment of the present invention can comprise: signal acquisition module 100 and differential amplification module 103, described signal acquisition module 100 and differential amplification module 103 are connected in series, described signal acquisition module 100 is carried out filtering for acquisition electrode signal and to described electrode signal, described differential amplification module 103, for filtered described electrode signal being carried out to secondary filtering and amplifying, is exported described electrode signal magnitude of voltage after treatment.
Wherein, described signal acquisition module 100 is for from outer electrode acquisition electrode signal, described outer electrode can be preferably button-electrode, gather described electrode signal for measuring the magnitude of voltage of described electrode signal, and the electrode signal after gathering is carried out to filtering first, and filtered described electrode signal is input to differential amplification module 103.
Described differential amplification module 103 is for described signal acquisition module collection filtered described electrode signal are carried out to secondary filtering, and the described electrode signal after secondary filtering is carried out to differential amplification, finally exports described electrode signal magnitude of voltage after treatment.
In the present embodiment, by signalization acquisition module 100 and differential amplification module 103, make this small signal process circuit to carry out the processing of denoising and differential amplification to the small-signal of the doping noise collecting from outside, finally obtain clean small signal, for the measurement of resistivity provides convenience.
Fig. 2 is embodiment 2 schematic diagram for the small signal process circuit of microresistivity scanning imagery in the embodiment of the present invention.Consult Fig. 2, in the present embodiment, described signal acquisition module 100 can comprise first signal Acquisition Circuit 101 and secondary signal Acquisition Circuit 102, described secondary signal Acquisition Circuit 102 is identical with described first signal Acquisition Circuit 101 circuit structures, and described first signal Acquisition Circuit 101 is parallel-connected to described differential amplification module 103 with described secondary signal Acquisition Circuit 102.
By adopting two signal acquisition circuits to collect two electrode signals from outer electrode, described two signal acquisition circuits carry out after filtering processing the electrode signal collecting separately, parallel connection is input to after differential amplifier circuit by described two electrode signals are carried out after filtering processing and differential amplification, obtain the voltage difference of described two electrode signals, and amplify owing to having passed through twice filtering processing and first difference, the small signal finally obtaining is clean, easily measure, for the voltage difference of measuring two limits provides convenience, and then can be convenient for measuring resistivity.
Fig. 3 a and Fig. 3 b are embodiment 3 schematic diagram for the small signal process circuit of microresistivity scanning imagery in the embodiment of the present invention, and this embodiment 3 can regard a kind of specific implementation on embodiment 1 and embodiment 2 bases as.
Consult shown in Fig. 3 a and Fig. 3 b, Fig. 3 a is first signal Acquisition Circuit, Fig. 3 b is differential amplification module, in the present embodiment, in described Fig. 3 a, first signal Acquisition Circuit 101 comprises filtering circuit 104 and voltage follower circuit 105, because described secondary signal Acquisition Circuit 102 is identical with described first signal Acquisition Circuit 101 circuit structures, omit herein, the input end A1 of the output terminals A 1 connection layout 3b of Fig. 3 a, omit diagram part with the identical secondary signal Acquisition Circuit of Fig. 3 a, the input end A2 of the output terminals A 2 connection layout 3b of secondary signal Acquisition Circuit.
Preferably, as shown in Figure 3 a, described filtering circuit 104 comprises shield assembly S1, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first integrated transporting discharging U1, the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4 and the 5th capacitor C 5, described shield assembly S1 comprises wire, spring and shielding line, described spring housing is in the outside of described wire, the signal input point M1U of described first signal Acquisition Circuit 101 is for being connected to electrode signal acquisition by described wire, one end of described spring is used for being connected to insulated metal, the other end of described spring is connected to the signal ground reference point G1U place of described first signal Acquisition Circuit 101, described shielding line is the closed wiring on the circuit board corresponding with circuit, described shielding line is by described the first capacitor C 1, described the first resistance R 1 and described signal input point M1U surround, described signal ground reference point G1U arbitrary position on described shielding line, described first capacitor C 1 one end is connected to described signal input point M1U place, the other end of described the first capacitor C 1 is connected to the inverting input of described the first integrated transporting discharging U1 by described the first resistance R 1, the in-phase input end of described the first integrated transporting discharging U1 is connected to described signal ground reference point G1U place by described the second resistance R 2, the in-phase input end of described the first integrated transporting discharging U1 is also by described the 5th capacitor C 5 ground connection, the positive power source terminal of described the first integrated transporting discharging U1 is by described the 4th capacitor C 4 ground connection, the negative power end of described the first integrated transporting discharging U1 is by described the 3rd capacitor C 3 ground connection, described the 3rd resistance R 3 one end are connected to the inverting input of described the first integrated transporting discharging U1 by described the second capacitor C 2, the other end of described the 3rd resistance R 3 is connected to the output terminal of described the first integrated transporting discharging U1, the output terminal of described the first integrated transporting discharging U1 is the output terminal of described first signal Acquisition Circuit 101, be used for exporting described first signal Acquisition Circuit 101 filtered described electrode signal magnitude of voltage for the first time.
Wherein, collection signal circuit collects electrode signal from outside, described electrode signal enters into the filtering circuit part of described first signal Acquisition Circuit from signal input point M1U, the voltage signal of exporting at the output terminal of described the first integrated transporting discharging U1 has also been connected to the inverting input of described the first integrated transporting discharging U1 simultaneously after the 3rd resistance R 3 and the second capacitor C 2 series connection, described the 3rd resistance R 3 and described the second capacitor C 2 have played the effect of high-pass filtering, after the filtering of shield assembly and filtering circuit, from the output terminal output filtered described electrode signal magnitude of voltage for the first time of the first integrated transporting discharging U1.
Preferably, as shown in Figure 3 a, described voltage follower circuit 105 comprises the 4th resistance R 4, the 5th resistance R 5, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8 and the second integrated transporting discharging U2, described the 6th capacitor C 6 one end are connected to the output terminal of described the first integrated transporting discharging U1, the other end of described the 6th capacitor C 6 is connected to the inverting input of described the second integrated transporting discharging U2 by described the 4th resistance R 4, the in-phase input end of described the second integrated transporting discharging U2 is connected to the output terminal of described the second integrated transporting discharging U2, the output terminal of described the second integrated transporting discharging U2 is connected to the inverting input of described the first integrated transporting discharging U1, one end ground connection after described the 5th resistance R 5 and described the 8th capacitor C 8 series connection, the other end after described the 5th resistance R 5 and described the 8th capacitor C 8 series connection is connected between described the 4th resistance R 4 and described the 6th capacitor C 6, one end ground connection of described the 7th capacitor C 7, the other end of described the 7th capacitor C 7 is connected between described the 4th resistance R 4 and described the 6th capacitor C 6.
Wherein, the voltage signal of exporting from the first integrated transporting discharging U1 output terminal of filtering circuit has entered into the inverting input of the second integrated transporting discharging U2 of this voltage follower circuit through the 6th capacitor C 6, described voltage follower circuit has played the effect of isolation, the interference of signal between can fine circuit, the output terminal of the second integrated transporting discharging U2 of described voltage follower circuit is the inverting input to described the first integrated transporting discharging U1 by the result feedback of following, and final electrode signal is by being exported by the output terminal of described the first integrated transporting discharging U1 after circuit and voltage follower circuit after filtering.
It should be noted that, because secondary signal Acquisition Circuit 102 is identical with the circuit structure of first signal Acquisition Circuit 101, secondary signal Acquisition Circuit 102 comprises filtering circuit and voltage follower circuit two parts equally, so be no longer described in detail about secondary signal Acquisition Circuit 102 herein, specifically can be with reference to first signal Acquisition Circuit 101.
Preferably, as shown in Figure 3 b, described differential amplification module 103 comprises the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13, the 14 capacitor C 14, the 15 capacitor C 15 and the 3rd integrated transporting discharging U3, the first signal Acquisition Circuit output point A1 of described differential amplification module 103 is connected to the output terminal of described first signal Acquisition Circuit 101, the secondary signal Acquisition Circuit output point A2 of described differential amplification module 103 is connected to the output terminal of described secondary signal Acquisition Circuit 102, described first signal Acquisition Circuit output point A1 is connected by described the 8th resistance R 8 with described secondary signal Acquisition Circuit output point A2, described the 6th resistance R 6 one end are connected to described first signal Acquisition Circuit output point A1, described the 6th resistance R 6 other end ground connection, described the 7th resistance R 7 one end connect described first signal Acquisition Circuit output point A1, after described the 7th series connection of resistance R 7 other ends by described the 9th capacitor C 9 and described the 11 resistance R 11, be connected to the in-phase input end of described the 3rd integrated transporting discharging U3, described the tenth resistance R 10 one end are connected to described secondary signal Acquisition Circuit output point A2, described the tenth resistance R 10 other end ground connection, described the 9th resistance R 9 one end are connected to described secondary signal Acquisition Circuit output point A2, after the series connection of the other end of described the 9th resistance R 9 by described the 11 capacitor C 11 and described the 13 resistance R 13, be connected to the inverting input of described the 3rd integrated transporting discharging U3, described the tenth capacitor C 10 one end are connected between described the 7th resistance R 7 and described the 9th capacitor C 9, the other end of described the tenth capacitor C 10 is connected between described the 9th resistance R 9 and described the 11 capacitor C 11, the positive power source terminal of described the 3rd integrated transporting discharging U3 is by described the 12 capacitor C 12 ground connection, the negative power end of described the 3rd integrated transporting discharging U3 is by described the 13 capacitor C 13 ground connection, one end after described the 15 capacitor C 15 and described the 12 resistance R 12 parallel connections is connected to the in-phase input end of described the 3rd integrated transporting discharging U3, the other end after described the 15 capacitor C 15 and described the 12 resistance R 12 parallel connections is connected to the output terminal of described the 3rd integrated transporting discharging U3, one end after described the 14 resistance R 14 and described the 14 capacitor C 14 series connection is connected to the output terminal of described the 3rd integrated transporting discharging U3, other end ground connection after described the 14 resistance R 14 and described the 14 capacitor C 14 series connection, the tie point place of described the 14 resistance R 14 and described the 14 electric capacity is the electrode signal output point B of described differential amplification module 103.
Wherein, after voltage signal parallel connection from first signal Acquisition Circuit 101 and 102 outputs of secondary signal Acquisition Circuit, enter into respectively first signal Acquisition Circuit output point A1 and the secondary signal Acquisition Circuit output point A2 of differential amplification module 103, after the filtering and differential amplification of differential amplification module 103, described voltage signal arrives electrode signal output point B from the output terminal of the 3rd integrated transporting discharging U3 of described differential amplification module 103 by the 14 resistance R 14.
Preferably, the described electrode signal voltage output end that described electrode signal output point B is described circuit, for exporting the described electrode signal magnitude of voltage after described processing of circuit.
Wherein, export the electrode signal magnitude of voltage described processing of circuit from electrode signal output point B, this magnitude of voltage is the clean small-signal of removing after noise.
This embodiment is for the specific implementation of the small signal process circuit of microresistivity scanning imagery, first gather two electrode signals by two signal acquisition circuits of signal acquisition module from outer electrode, filtering through signal acquisition circuit arrives differential amplification module, differential amplifier circuit carries out realizing differential amplification after secondary filtering to described electrode signal, finally exports clean small signal poor.
Small signal process circuit for microresistivity scanning imagery provided by the invention is by increasing shield assembly and using difference channel to carry out filtering to the noise being entrained in described small signal at described circuit, obtain clean small signal, and then can record in stratum accurately the voltage difference of 2.
Claims (7)
1. the small signal process circuit for microresistivity scanning imagery, it is characterized in that, comprise: signal acquisition module (100) and differential amplification module (103), described signal acquisition module (100) and differential amplification module (103) are connected in series, described signal acquisition module (100) is carried out filtering for acquisition electrode signal and to described electrode signal, described differential amplification module (103), for filtered described electrode signal being carried out to secondary filtering and amplifying, is exported described electrode signal magnitude of voltage after treatment.
2. circuit according to claim 1, it is characterized in that, described signal acquisition module (100) comprises first signal Acquisition Circuit (101) and secondary signal Acquisition Circuit (102), and described first signal Acquisition Circuit (101) is parallel-connected to described differential amplification module (103) with described secondary signal Acquisition Circuit (102).
3. circuit according to claim 2, it is characterized in that, described first signal Acquisition Circuit (101) comprises filtering circuit (104) and voltage follower circuit (105), and described secondary signal Acquisition Circuit (102) is identical with described first signal Acquisition Circuit (101) circuit structure.
4. circuit according to claim 3, it is characterized in that, described filtering circuit (104) comprises shield assembly S1, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first integrated transporting discharging U1, the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4 and the 5th capacitor C 5, described shield assembly S1 comprises wire, spring and shielding line, described spring housing is in the outside of described wire, the signal input point M1U of described first signal Acquisition Circuit (101) is for being connected to electrode signal acquisition by described wire, one end of described spring is used for being connected to insulated metal, the other end of described spring is connected to the signal ground reference point G1U place of described first signal Acquisition Circuit (101), described shielding line is the closed wiring on the circuit board corresponding with circuit, described shielding line is by described the first capacitor C 1, described the first resistance R 1 and described signal input point M1U surround, described signal ground reference point G1U arbitrary position on described shielding line, described first capacitor C 1 one end is connected to described signal input point M1U place, the other end of described the first capacitor C 1 is connected to the inverting input of described the first integrated transporting discharging U1 by described the first resistance R 1, the in-phase input end of described the first integrated transporting discharging U1 is connected to described signal ground reference point G1U place by described the second resistance R 2, the in-phase input end of described the first integrated transporting discharging U1 is also by described the 5th capacitor C 5 ground connection, the positive power source terminal of described the first integrated transporting discharging U1 is by described the 4th capacitor C 4 ground connection, the negative power end of described the first integrated transporting discharging U1 is by described the 3rd capacitor C 3 ground connection, described the 3rd resistance R 3 one end are connected to the inverting input of described the first integrated transporting discharging U1 by described the second capacitor C 2, the other end of described the 3rd resistance R 3 is connected to the output terminal of described the first integrated transporting discharging U1, the output terminal of described the first integrated transporting discharging U1 is the output terminal of described first signal Acquisition Circuit (101), be used for exporting described first signal Acquisition Circuit (101) filtered described electrode signal magnitude of voltage for the first time.
5. according to the circuit described in claim 3 or 4, it is characterized in that, described voltage follower circuit (105) comprises the 4th resistance R 4, the 5th resistance R 5, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8 and the second integrated transporting discharging U2, described the 6th capacitor C 6 one end are connected to the output terminal of described the first integrated transporting discharging U1, the other end of described the 6th capacitor C 6 is connected to the inverting input of described the second integrated transporting discharging U2 by described the 4th resistance R 4, the in-phase input end of described the second integrated transporting discharging U2 is connected to the output terminal of described the second integrated transporting discharging U2, the output terminal of described the second integrated transporting discharging U2 is connected to the inverting input of described the first integrated transporting discharging U1, one end ground connection after described the 5th resistance R 5 and described the 8th capacitor C 8 series connection, the other end after described the 5th resistance R 5 and described the 8th capacitor C 8 series connection is connected between described the 4th resistance R 4 and described the 6th capacitor C 6, one end ground connection of described the 7th capacitor C 7, the other end of described the 7th capacitor C 7 is connected between described the 4th resistance R 4 and described the 6th capacitor C 6.
6. according to the circuit described in any one in claim 1-5, it is characterized in that, described differential amplification module (103) comprises the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13, the 14 capacitor C 14, the 15 capacitor C 15 and the 3rd integrated transporting discharging U3, the first signal Acquisition Circuit output point A1 of described differential amplification module (103) is connected to the output terminal of described first signal Acquisition Circuit (101), the secondary signal Acquisition Circuit output point A2 of described differential amplification module (103) is connected to the output terminal of described secondary signal Acquisition Circuit (102), described first signal Acquisition Circuit output point A1 is connected by described the 8th resistance R 8 with described secondary signal Acquisition Circuit output point A2, described the 6th resistance R 6 one end are connected to described first signal Acquisition Circuit output point A1, described the 6th resistance R 6 other end ground connection, described the 7th resistance R 7 one end connect described first signal Acquisition Circuit output point A1, after described the 7th series connection of resistance R 7 other ends by described the 9th capacitor C 9 and described the 11 resistance R 11, be connected to the in-phase input end of described the 3rd integrated transporting discharging U3, described the tenth resistance R 10 one end are connected to described secondary signal Acquisition Circuit output point A2, described the tenth resistance R 10 other end ground connection, described the 9th resistance R 9 one end are connected to described secondary signal Acquisition Circuit output point A2, after the series connection of the other end of described the 9th resistance R 9 by described the 11 capacitor C 11 and described the 13 resistance R 13, be connected to the inverting input of described the 3rd integrated transporting discharging U3, described the tenth capacitor C 10 one end are connected between described the 7th resistance and described the 9th electric capacity, the other end of described the tenth capacitor C 10 is connected between described the 9th resistance R 9 and described the 11 capacitor C 11, the positive power source terminal of described the 3rd integrated transporting discharging U3 is by described the 12 capacitor C 12 ground connection, the negative power end of described the 3rd integrated transporting discharging U3 is by described the 13 capacitor C 13 ground connection, one end after described the 15 capacitor C 15 and described the 12 resistance R 12 parallel connections is connected to the in-phase input end of described the 3rd integrated transporting discharging U3, the other end after described the 15 capacitor C 15 and described the 12 resistance R 12 parallel connections is connected to the output terminal of described the 3rd integrated transporting discharging U3, one end after described the 14 resistance R 14 and described the 14 capacitor C 14 series connection is connected to the output terminal of described the 3rd integrated transporting discharging U3, other end ground connection after described the 14 resistance R 14 and described the 14 capacitor C 14 series connection, the tie point place of described the 14 resistance R 14 and described the 14 electric capacity is the electrode signal output point B of described differential amplification module (103).
7. according to the circuit described in any one in claim 1-6, it is characterized in that, the described electrode signal voltage output end that described electrode signal output point B is described circuit, for exporting the described electrode signal magnitude of voltage after described processing of circuit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410342445.8A CN104076406B (en) | 2014-07-18 | 2014-07-18 | Small signal process circuit for micro resistor |
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| CN109505592A (en) * | 2017-09-14 | 2019-03-22 | 中国石油化工股份有限公司 | High-gain resistivity logging while drilling signal receiving device |
| CN116856920A (en) * | 2023-07-06 | 2023-10-10 | 中国科学院地质与地球物理研究所 | Application method and instrument of azimuth electromagnetic wave resistivity while drilling instrument |
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| CN104076406B (en) | 2016-09-28 |
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