CN104036750A - Pixel circuit - Google Patents
Pixel circuit Download PDFInfo
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- CN104036750A CN104036750A CN201410311063.9A CN201410311063A CN104036750A CN 104036750 A CN104036750 A CN 104036750A CN 201410311063 A CN201410311063 A CN 201410311063A CN 104036750 A CN104036750 A CN 104036750A
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- pixel
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- sweep trace
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- image element
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Abstract
The invention provides a pixel circuit. The pixel circuit comprises a first switching tube and a second switching tube, wherein the first end of the first switching tube is electrically connected to a public data line, the second end of the first switching tube is electrically connected to a first sub-pixel, and the control end of the first switching tube is electrically connected to a second scanning line; the first end of the second switching tube is electrically connected to the public data line, the second end of the second switching tube is electrically connected to a second sub-pixel, and the control end of the second switching tube is electrically connected to a first scanning line. The second sub-pixel further comprises a pixel capacitor, and the two ends of the second sub-pixel are electrically coupled to the second scanning line and the second end of the second switching tube respectively. Compared with the prior art, the pixel circuit does not need a thin film transistor for charging sharing, thereby being capable of increasing the pixel aperture rate and the penetration rate. In addition, the pixel circuit enables coupling capacitance between the sub-pixels in a half-source-electrode drive framework to achieve balance, thereby being capable of solving the problem of bright and concealed wiring caused by different coupling capacitance.
Description
Technical field
The present invention relates to technical field of liquid crystal display, relate in particular to a kind of image element circuit of liquid crystal display.
Background technology
Along with showing the development of technology, current various digital display panel possesses the advantages such as frivolous, low-cost, high-effect mostly, wherein the various elements of digital display panel (as driving circuit, substrate, connection line) often carry out height integration by various advanced technologies, so that under minimum volume and least cost, reach best display effect.For achieving the above object, develop the manufacturing technology of many display device, such as HSD (Half Source Driver, half source drive) technology and many minutes territory charging technology of sharing of PSA (Polymer Stabilized Alignment, polymer-stabilized alignment).In general, traditional display panel need to be provided with a large amount of source electrode drive circuit (source driver) and gate driver circuit (gate driver), to carry out the pixel driver of vertical and horizontal direction.
With half source drive, be designed to example, it is that the number of sweep trace is doubled, and makes single data line (that is, source electrode line) the adjacent pixel electrode of corresponding two row simultaneously, saves by this source driving chip of half.Yet, the design of this half source drive can make the charge efficiency between each pixel electrode inconsistent, and the stray capacitance between sub-pixel is uneven and then cause feed-trough voltage (Feed-through voltage) difference between sub-pixel, causes vertical direction to occur bright concealed wire.
With polymer stabilized alignment territory charging in many minutes, share and be designed to example, it is mainly in liquid crystal panel, to produce high molecular polymer, makes liquid crystal molecule be subject to the impact of high molecular polymer and has a tilt angle.Therefore, when liquid crystal molecule is subject to electric field driven, liquid crystal molecule just can promptly deflect into suitable orientation, and then shortens the reaction time of liquid crystal panel.And viewing area is divided into a plurality of minutes territories (multi domain), the sub-pixel in different minute territories is by driving for realizing the shared thin film transistor (TFT) (sharing TFT) of charging.Yet in this design architecture, it is excessively near that thin film transistor (TFT) is shared in the charging of the positional distance of photoresistance sept (Photoresist Sensor, PS), easily occurs mobile phenomenon.In addition, this framework has additionally increased a plurality of chargings and has shared thin film transistor (TFT), so the penetrance of liquid crystal molecule is very low.For example, panel aperture opening ratio is 35.07%, and the penetrance of liquid crystal molecule is only 2.3%.
In view of this, how to design a kind of image element circuit of novelty, effectively to improve the many minutes existing deficiencies of territory charging technology of sharing of above-mentioned half source drive technology or polymer stabilized alignment, thereby overcoming many inferior positions of the prior art, is a person skilled problem urgently to be resolved hurrily in the industry.
Summary of the invention
For the existing above-mentioned defect of image element circuit of the prior art, the invention provides a kind of image element circuit of novelty, thereby promote pixel aperture ratio and penetrance, and the different and bright concealed wire problem that causes of the coupling capacitance between improvement factor pixel.
According to one aspect of the present invention, a kind of image element circuit is provided, comprise a common data line, one first sweep trace and one second sweep trace adjacent one another are, this image element circuit comprises:
One first switching tube, comprises a first end, one second end and a control end, and its first end is electrically connected to described common data line, and its second end is electrically connected to one first sub-pixel, and its control end is electrically connected to described the second sweep trace; And
One second switch pipe, comprises a first end, one second end and a control end, and its first end is electrically connected to described common data line, and its second end is electrically connected to one second sub-pixel, and its control end is electrically connected to described the first sweep trace,
Wherein said the second sub-pixel also comprises a pixel capacitance, and the two ends of described pixel capacitance are electrically coupled to respectively the second end of described the second sweep trace and described second switch pipe.
An embodiment therein, described the first switch and described second switch pipe are thin film transistor (TFT).
An embodiment therein, described the first sub-pixel and described the second sub-pixel include a liquid crystal capacitance and a memory capacitance.
An embodiment therein, the liquid crystal capacitance two ends of described the first sub-pixel are electrically connected to respectively the second end and a color filter (Color Filter) bias voltage of described the first switching tube.In addition, the memory capacitance two ends of described the first sub-pixel are electrically connected to respectively the second end and one first common electric voltage of described the first switching tube.
An embodiment therein, the liquid crystal capacitance two ends of described the second sub-pixel are electrically connected to respectively the second end and a color filter (Color Filter) bias voltage of described second switch pipe.In addition, the memory capacitance two ends of described the second sub-pixel are electrically connected to respectively the second end and one second common electric voltage of described second switch pipe.
An embodiment therein, described common data line is continuously high level, and the sequential separately of described the first sweep trace and described the second sweep trace is followed successively by:
In first period, described the first sweep trace is high level, and described the second sweep trace is low level;
In the second phase, described the first sweep trace keeps high level, and described the second sweep trace is high level;
In between the third phase, described the first sweep trace is low level, and described the second sweep trace keeps high level;
In between the fourth phase, described the first sweep trace is low level, and described the second sweep trace is low level.
An embodiment therein, in the described second phase, the voltage potential of the second end of described second switch pipe equals the voltage potential of the second end of described the first switching tube; In between the described third phase and between the described fourth phase, the voltage potential of the second end of described second switch pipe is less than the voltage potential of the second end of described the first switching tube.
An embodiment therein, described image element circuit is suitable for AMVA (Advanced Multi-domain Vertical Alignment, senior many minutes territory vertical orientations) type liquid crystal display, MVA (Multi-domain Vertical Alignment, many minutes territory vertical orientations) type liquid crystal display or PSA (Polymer Stabilized Alignment, polymer-stabilized alignment) type liquid crystal display.
Adopt image element circuit of the present invention, the transistorized first end of its first film is electrically connected to that common data line, the second end are electrically connected to one first sub-pixel, control end is electrically connected to the second sweep trace, the first end of its second thin film transistor (TFT) is electrically connected to that common data line, the second end are electrically connected to one second sub-pixel, control end is electrically connected to the first sweep trace, and the pixel capacitance two ends of the second sub-pixel are electrically coupled to respectively the second end of the second sweep trace and the second thin film transistor (TFT).Than prior art, the present invention shares with thin film transistor (TFT) without charging is set, therefore can promote pixel aperture ratio and penetrance, in addition, the present invention also makes the coupling capacitance between each sub-pixel in semi-source pole driving architecture reach balance, and then can eliminate the bright concealed wire problem causing because of coupling capacitance difference.
Accompanying drawing explanation
Reader, after having read the specific embodiment of the present invention with reference to accompanying drawing, will become apparent various aspects of the present invention.Wherein,
Fig. 1 illustrates the circuit diagram of a kind of semi-source pole driving architecture of the prior art;
Fig. 2 illustrates a kind of polymer stabilized alignment of the prior art territory charging in many minutes and shares the circuit diagram that drives framework;
Fig. 3 illustrates the sequential schematic diagram of each key signal in the driving framework of Fig. 2;
Fig. 4 illustrates the structural representation according to the image element circuit of one embodiment of the present invention; And
Fig. 5 illustrates the sequential schematic diagram of each key signal in the driving framework of Fig. 4.
Embodiment
For the technology contents that the application is disclosed is more detailed and complete, can be with reference to accompanying drawing and following various specific embodiments of the present invention, in accompanying drawing, identical mark represents same or analogous assembly.Yet those of ordinary skill in the art should be appreciated that the embodiment that hereinafter provided is not used for limiting the scope that the present invention is contained.In addition, accompanying drawing, only for being schematically illustrated, is not drawn according to its life size.
With reference to the accompanying drawings, the embodiment of various aspects of the present invention is described in further detail.
Fig. 1 illustrates the circuit diagram of a kind of semi-source pole driving architecture of the prior art.With reference to Fig. 1, half source drive (Half Source Driver, HSD) framework comprises two sweep trace G1, G2 and three data line D1, D2 and D3.In figure, be from left to right respectively the first sub-pixel (sub pixel) to the 6th sub-pixel.Wherein, the first sub-pixel 101, the second sub-pixel 103 and the 3rd sub-pixel 105 form the first pixel, and the 4th sub-pixel 201, the 5th sub-pixel 203 and the 6th sub-pixel 205 form the second pixel.The first sub-pixel 101 has identical color with the 4th sub-pixel 201 (as shown in the left oblique line in figure), such as Red sub-pixel; The second sub-pixel 103 has identical color with the 5th sub-pixel 203 (as shown in the right oblique line in figure), such as Green sub-pixel; The 3rd sub-pixel 105 has identical color with the 6th sub-pixel 205 (as shown in the mesh lines in figure), such as Blue sub-pixel.
From circuit, connect, the first sub-pixel 101 and the second sub-pixel 103 are coupled to data line D1 jointly via thin film transistor (TFT) separately.The 3rd sub-pixel 105 and the 4th sub-pixel 201 are coupled to data line D2 jointly.The 5th sub-pixel 203 and the 6th sub-pixel 205 are coupled to data line D3 jointly.And the first sub-pixel 101, the 4th sub-pixel 201 and the 6th sub-pixel 205 are all coupled to sweep trace G1, and the second sub-pixel 103, the 3rd sub-pixel 105 and the 5th sub-pixel 203 are all coupled to sweep trace G2.
Yet as mentioned before, this half source drive design can make the stray capacitance between each sub-pixel uneven.For example, the stray capacitance of the first sub-pixel 101 comprises C
gs, C
pdand C
gs '.The second sub-pixel 103 and the 3rd sub-pixel 105 stray capacitance separately include C
gsand C
pd.The stray capacitance of the 4th sub-pixel 201 comprises C
gs, C
pd, C
gs 'and C
pp.The stray capacitance of the 5th sub-pixel 203 comprises C
gs, C
pdand C
pp.The stray capacitance of the 6th sub-pixel 205 comprises C
gs, C
pdand C
gs '.Because the stray capacitance between above-mentioned sub-pixel is uneven, will certainly cause feed-trough voltage (Feed-through voltage) difference between sub-pixel, and then cause vertical direction to occur bright concealed wire, affect display quality.
Fig. 2 illustrates a kind of polymer stabilized alignment of the prior art territory charging in many minutes and shares the circuit diagram that drives framework.Fig. 3 illustrates the sequential schematic diagram of each key signal in the driving framework of Fig. 2.
With reference to Fig. 2, polymer stabilized alignment (Polymer Stabilized Alignment, PSA) territory charging in many minutes is shared and is driven framework to comprise a data line D (n) and two sweep trace G (n), G (n+1).First area comprises a memory capacitance C
st1with a liquid crystal capacitance C
lc1.Second area comprises a memory capacitance C
st2with a liquid crystal capacitance C
lc2.
More specifically, the grid of the first film transistor T 1 is electrically connected to sweep trace G (n), and source electrode is electrically connected to data line D (n), and drain electrode is electrically connected to the first sub-pixel.Memory capacitance C
st1the other end be electrically connected to the first common electric voltage Com1, liquid crystal capacitance C
lc1the other end be electrically connected to color filter bias voltage CF.The grid of the second thin film transistor (TFT) T2 is also electrically connected to sweep trace G (n), and source electrode is also electrically connected to data line D (n), and drain electrode is electrically connected to the second sub-pixel.Memory capacitance C
st2the other end be electrically connected to the second common electric voltage Com2, liquid crystal capacitance C
lc2the other end be electrically connected to color filter bias voltage CF.And, between the drain electrode of the first film transistor T 1 and the drain electrode of the second thin film transistor (TFT) T2, a capacitor C x is also set.
In order to realize the charging of the sub-pixel in different minute territories, share, this driving framework also comprises one the 3rd thin film transistor (TFT) T3, and its grid is electrically connected to sweep trace G (n+1), and source electrode is connected with the drain electrode of the second thin film transistor (TFT) T2, and drain electrode is via a capacitor C
downbe connected to the second common electric voltage Com2.As shown in Figure 3, signal Data on data line continues to keep high level, when sweep trace G (n) is high-potential voltage and sweep trace G (n+1) during for low-potential voltage, the drain potential Va of the first film transistor T 1 equates with the drain potential Vb of the second thin film transistor (TFT) T2; When sweep trace G (n) is low-potential voltage and sweep trace G (n+1) during for high-potential voltage, the drain potential Va of the first film transistor T 1 is greater than the drain potential Vb of the second thin film transistor (TFT) T2.As previously mentioned, in this framework, photoresistance sept (Photoresist Sensor, PS) it is excessively near that thin film transistor (TFT) is shared in positional distance charging, for example the shared thin film transistor (TFT) of key light resistance sept distance is 6.5 microns, it is 8 microns that sub-photoresistance sept distance is shared thin film transistor (TFT), and when panel is bounced, photoresistance sept is easy to occur mobile.In addition, this framework has additionally increased a plurality of chargings and has shared thin film transistor (TFT), so the penetrance of liquid crystal molecule is very low.For example, panel aperture opening ratio is only 35.07%, and the penetrance of liquid crystal molecule more only has 2.3%.
In order to eliminate the above-mentioned defect of prior art, the invention provides a kind of image element circuit of novelty.Fig. 4 illustrates the structural representation according to the image element circuit of one embodiment of the present invention.Fig. 5 illustrates the sequential schematic diagram of each key signal in the driving framework of Fig. 4.
With reference to Fig. 4, image element circuit of the present invention comprises a common data line D1, one first sweep trace G1 and one second sweep trace G2 adjacent one another are.And this image element circuit also comprises one first switch transistor T 1 and a second switch pipe T2, for example, these switching tubes are thin film transistor (TFT).In one embodiment, image element circuit of the present invention is suitable for AMVA (Advanced Multi-domain Vertical Alignment, senior many minutes territory vertical orientations) type liquid crystal display, MVA (Multi-domain Vertical Alignment, many minutes territory vertical orientations) type liquid crystal display or PSA (Polymer Stabilized Alignment, polymer-stabilized alignment) type liquid crystal display.
Specifically, the source electrode of the first switch transistor T 1 is electrically connected to common data line D1, and drain electrode is electrically connected to one first sub-pixel, and grid is electrically connected to the second sweep trace G2.The source electrode of second switch pipe T2 is electrically connected to common data line D1, and drain electrode is electrically connected to one second sub-pixel, and grid is electrically connected to the first sweep trace G1.Wherein, the second sub-pixel also comprises a pixel capacitance C
pg2, this pixel capacitance C
pg2two ends be electrically coupled to respectively the drain electrode of the second sweep trace G2 and second switch pipe T2.Similarly, the first sub-pixel comprises a memory capacitance C
st1with a liquid crystal capacitance C
lc1.The second sub-pixel comprises a memory capacitance C
st2with a liquid crystal capacitance C
lc2.Memory capacitance C
st1the other end be electrically connected to the first common electric voltage Com1, liquid crystal capacitance C
lc1the other end be electrically connected to bias voltage CF.Memory capacitance C
st2the other end be electrically connected to the second common electric voltage Com2, liquid crystal capacitance C
lc2two ends are electrically connected to respectively drain electrode and the bias voltage CF of second switch pipe T2.
As shown in Figure 5, the signal Data on common data line D1 is continuously high level.The sequential separately of the first sweep trace G1 and the second sweep trace G2 is explained with time durations t1～t4 respectively.At first period t1, the first sweep trace G1 is that high level and the second sweep trace G2 are low level.At second phase t2, the first sweep trace G1 keeps high level, and the second sweep trace G2 is high level.T3 between the third phase, the first sweep trace G1 is low level, and the second sweep trace G2 keeps high level.T4 between the fourth phase, the first sweep trace G1 is low level, and the second sweep trace G2 is low level.
At a specific embodiment, in second phase t2, the voltage potential Vb of the drain electrode of second switch pipe T2 equals the voltage potential Va of the drain electrode of the first switch transistor T 1.T3 and between the fourth phase in t4 between the third phase, the combination design by HSD framework and PSA framework, makes the required potential difference (PD) of different subpixel be produced by the second corresponding twice feedthrough of sweep trace G2 (feed-through).Thus, in these two time durations, the voltage potential Vb of the drain electrode of second switch pipe T2 is less than the voltage potential Va of the drain electrode of the first switch transistor T 1.
Adopt image element circuit of the present invention, the transistorized first end of its first film is electrically connected to that common data line, the second end are electrically connected to one first sub-pixel, control end is electrically connected to the second sweep trace, the first end of its second thin film transistor (TFT) is electrically connected to that common data line, the second end are electrically connected to one second sub-pixel, control end is electrically connected to the first sweep trace, and the pixel capacitance two ends of the second sub-pixel are electrically coupled to respectively the second end of the second sweep trace and the second thin film transistor (TFT).Than prior art, the present invention shares with thin film transistor (TFT) without charging is set, therefore can promote pixel aperture ratio and penetrance, in addition, the present invention also makes the coupling capacitance between each sub-pixel in semi-source pole driving architecture reach balance, and then can eliminate the bright concealed wire problem causing because of coupling capacitance difference.
Above, describe the specific embodiment of the present invention with reference to the accompanying drawings.But those skilled in the art can understand, without departing from the spirit and scope of the present invention in the situation that, can also do various changes and replacement to the specific embodiment of the present invention.These changes and replacement all drop in the claims in the present invention book limited range.
Claims (10)
1. an image element circuit, comprises a common data line, one first sweep trace and one second sweep trace adjacent one another are, it is characterized in that, described image element circuit comprises:
One first switching tube, comprises a first end, one second end and a control end, and its first end is electrically connected to described common data line, and its second end is electrically connected to one first sub-pixel, and its control end is electrically connected to described the second sweep trace; And
One second switch pipe, comprises a first end, one second end and a control end, and its first end is electrically connected to described common data line, and its second end is electrically connected to one second sub-pixel, and its control end is electrically connected to described the first sweep trace,
Wherein said the second sub-pixel also comprises a pixel capacitance, and the two ends of described pixel capacitance are electrically coupled to respectively the second end of described the second sweep trace and described second switch pipe.
2. image element circuit according to claim 1, is characterized in that, described the first switch and described second switch pipe are thin film transistor (TFT).
3. image element circuit according to claim 1, is characterized in that, described the first sub-pixel and described the second sub-pixel include a liquid crystal capacitance and a memory capacitance.
4. image element circuit according to claim 3, is characterized in that, the liquid crystal capacitance two ends of described the first sub-pixel are electrically connected to respectively the second end and a color filter bias voltage of described the first switching tube.
5. image element circuit according to claim 4, is characterized in that, the memory capacitance two ends of described the first sub-pixel are electrically connected to respectively the second end and one first common electric voltage of described the first switching tube.
6. image element circuit according to claim 3, is characterized in that, the liquid crystal capacitance two ends of described the second sub-pixel are electrically connected to respectively the second end and a color filter bias voltage of described second switch pipe.
7. image element circuit according to claim 6, is characterized in that, the memory capacitance two ends of described the second sub-pixel are electrically connected to respectively the second end and one second common electric voltage of described second switch pipe.
8. image element circuit according to claim 1, is characterized in that, described common data line is continuously high level, and the sequential separately of described the first sweep trace and described the second sweep trace is followed successively by:
In first period, described the first sweep trace is high level, and described the second sweep trace is low level;
In the second phase, described the first sweep trace keeps high level, and described the second sweep trace is high level;
Between the third phase, described the first sweep trace is low level, and described the second sweep trace keeps high level;
Between the fourth phase, described the first sweep trace is low level, and described the second sweep trace is low level.
9. image element circuit according to claim 8, is characterized in that, in the described second phase, the voltage potential of the second end of described second switch pipe equals the voltage potential of the second end of described the first switching tube; Between the described third phase and between the described fourth phase, the voltage potential of the second end of described second switch pipe is less than the voltage potential of the second end of described the first switching tube.
10. image element circuit according to claim 1, is characterized in that, described image element circuit is suitable for senior many minutes territory vertical alignment type liquid crystal display devices, many minutes territory vertical alignment type liquid crystal display devices or polymer stabilized alignment liquid crystal display.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410311063.9A CN104036750A (en) | 2014-07-01 | 2014-07-01 | Pixel circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410311063.9A CN104036750A (en) | 2014-07-01 | 2014-07-01 | Pixel circuit |
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|---|---|
| CN104036750A true CN104036750A (en) | 2014-09-10 |
Family
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|---|---|---|---|
| CN201410311063.9A Pending CN104036750A (en) | 2014-07-01 | 2014-07-01 | Pixel circuit |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016086520A1 (en) * | 2014-12-02 | 2016-06-09 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and display device |
| CN107132709A (en) * | 2017-05-05 | 2017-09-05 | 惠科股份有限公司 | liquid crystal pixel circuit and its driving method and liquid crystal display panel |
| WO2018148995A1 (en) * | 2017-02-17 | 2018-08-23 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, and pixel circuit structure thereof |
| CN108459444A (en) * | 2018-03-28 | 2018-08-28 | 惠科股份有限公司 | Display panel and display device |
| WO2019033465A1 (en) * | 2017-08-14 | 2019-02-21 | 深圳市华星光电技术有限公司 | Liquid crystal display of three-thin-film transistor structure and display device |
| CN109471288A (en) * | 2018-07-02 | 2019-03-15 | 惠科股份有限公司 | The manufacturing method of display panel and liquid crystal display panel |
| CN109637432A (en) * | 2019-02-27 | 2019-04-16 | 天马微电子股份有限公司 | Display panel and its driving method, display device |
| US10303026B2 (en) | 2017-02-17 | 2019-05-28 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Liquid crystal displays and the pixel circuit structure thereof |
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2014
- 2014-07-01 CN CN201410311063.9A patent/CN104036750A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016086520A1 (en) * | 2014-12-02 | 2016-06-09 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and display device |
| US9958738B2 (en) | 2014-12-02 | 2018-05-01 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Liquid crystal display panel and display device |
| WO2018148995A1 (en) * | 2017-02-17 | 2018-08-23 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, and pixel circuit structure thereof |
| US10303026B2 (en) | 2017-02-17 | 2019-05-28 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Liquid crystal displays and the pixel circuit structure thereof |
| CN107132709A (en) * | 2017-05-05 | 2017-09-05 | 惠科股份有限公司 | liquid crystal pixel circuit and its driving method and liquid crystal display panel |
| WO2018201546A1 (en) * | 2017-05-05 | 2018-11-08 | 惠科股份有限公司 | Liquid crystal pixel circuit, driving method therefor, and liquid crystal display panel |
| WO2019033465A1 (en) * | 2017-08-14 | 2019-02-21 | 深圳市华星光电技术有限公司 | Liquid crystal display of three-thin-film transistor structure and display device |
| CN108459444A (en) * | 2018-03-28 | 2018-08-28 | 惠科股份有限公司 | Display panel and display device |
| WO2019184112A1 (en) * | 2018-03-28 | 2019-10-03 | 惠科股份有限公司 | Display panel and display apparatus |
| US11424272B2 (en) | 2018-03-28 | 2022-08-23 | HKC Corporation Limited | Display panel with pixel structure and display apparatus |
| CN109471288A (en) * | 2018-07-02 | 2019-03-15 | 惠科股份有限公司 | The manufacturing method of display panel and liquid crystal display panel |
| CN109637432A (en) * | 2019-02-27 | 2019-04-16 | 天马微电子股份有限公司 | Display panel and its driving method, display device |
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Application publication date: 20140910 |