CN104035480B - Reference frequency setting method, Memory Controller and memory storage apparatus - Google Patents
Reference frequency setting method, Memory Controller and memory storage apparatus Download PDFInfo
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- CN104035480B CN104035480B CN201310073978.6A CN201310073978A CN104035480B CN 104035480 B CN104035480 B CN 104035480B CN 201310073978 A CN201310073978 A CN 201310073978A CN 104035480 B CN104035480 B CN 104035480B
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Abstract
Reference frequency setting method, Memory Controller and the memory storage apparatus of a kind of memory storage apparatus.The reference frequency setting method includes the following steps.Being read using the first signaling path out of memory module or storage unit includes the setting code of the first set information, and setting code is stored in register circuit.Whether the data of detection specific frequency are transfused to.If not, the setting code being stored in register circuit is read, so that oscillating circuit module produces the first reference frequency according to the first set information of setting code.If so, being updated storage using secondary signal bang path in the setting code in register circuit, and the setting code being stored in register circuit after renewal is read, so that oscillating circuit module produces the second reference frequency according to the second set information.Setting code after renewal includes the second set information.
Description
Technical field
The present invention relates to a kind of reference frequency setting method, and more particularly to reference frequency is recorded in memory by one kind
The setting method in portion and the Memory Controller and memory storage apparatus using the method.
Background technology
Universal Serial Bus (Universal Serial Bus, hereinafter referred to as USB) device has been pole on consumption market
For universal and ripe product.It is common wherein in order to produce a more accurate reference frequency so that this electronic device operates
Mode utilizes an external circuit, i.e. a crystal oscillation circuit produces.And in the related art, shake if need to adjust in chip
When swinging the characteristic of circuit, manufacturer is usually when card program is opened, using a hardware element, such as Electronic fuses (e-fuse) or
Connection gasket (trim pad) is finely tuned, to record the setting of adjustment.However, one, crystal oscillation circuit is costly, the two, with
Such a mode will certainly increase the hardware area and cost of USB device to record the frequency setting of oscillating circuit in adjustment chip,
And after card is opened, because hardware element has been blown, therefore it is not easy to change set frequency again, and then its competitiveness will be reduced.
In general, such a no crystal oscillation circuit (Crystal-less oscillator) usually requires reference
(tracking) frequency of remote host, to produce accurate reference frequency.However, use such a no crystal oscillation circuit
The frequency that remote host is not necessarily had to produce the USB device of reference frequency in different test patterns can be for reference.Cause
This, when the frequency of no remote host can be for reference, reference frequency may be more inaccurate caused by no crystal oscillation circuit, from
And cause USB device can not meet specific test specification.
The content of the invention
The present invention provides a kind of reference frequency setting method of type nonvolatile storage device, utilizes this
The reference frequency that setting method produces may conform to different test specifications.
The present invention provides a kind of Memory Controller, using above-mentioned setting method come control memory storage device, so that
Reference frequency caused by memory storage apparatus may conform to different test specifications.
The present invention provides a kind of type nonvolatile storage device, its caused reference frequency may conform to
Different test specifications.
The exemplary embodiment of the present invention provides a kind of reference frequency of type nonvolatile storage device and sets
Determine method.Type nonvolatile storage device includes a reproducible nonvolatile memorizer module, a storage
Unit and an oscillating circuit module.Oscillating circuit module includes a register circuit.Type nonvolatile is deposited
Storage device does not include a quartz (controlled) oscillator.Reference frequency setting method includes the following steps：Utilize one first signaling path
A setting code is read out of reproducible nonvolatile memorizer module or storage unit, and setting code is stored in register electricity
In road, wherein setting code includes one first set information；Whether the data for detecting a first frequency are transfused to；If first frequency
Data be not transfused to, read and be stored in setting code in register circuit, so that oscillating circuit module is according to setting code
First set information produces one first reference frequency；If the data of first frequency are transfused to, a secondary signal transmission is utilized
Path is updated storage in the setting code in register circuit, wherein the setting code after renewal includes one second set information；With
And if the data of first frequency are transfused to, reading is stored in the setting code after the renewal in register circuit, so that oscillating circuit
Module produces one second reference frequency according to the second set information.
In an exemplary embodiment of the invention, above-mentioned reference frequency setting method further includes the frequency according to a host computer system
Rate come set setting code the first set information, and by the setting code including the first set information be stored in duplicative it is non-easily
In the property lost memory module or storage unit.
In an exemplary embodiment of the invention, the first reference caused by the first set information of above-mentioned foundation setting code
Frequency meets the specification of one first test pattern.
In an exemplary embodiment of the invention, in the first test pattern, type nonvolatile storage dress
Put and be electrically connected to one first test device, the data that the first test device does not export first frequency are non-volatile to duplicative
Memory storage apparatus.
In an exemplary embodiment of the invention, if the data of first frequency are not transfused to, reference frequency setting method
Do not perform using secondary signal bang path to update storage in the setting code in register circuit the step of.
In an exemplary embodiment of the invention, above-mentioned reference frequency setting method further includes the frequency according to a host computer system
Rate come set setting code the second set information, and by the setting code including the second set information be stored in duplicative it is non-easily
In the property lost memory module or storage unit.
In an exemplary embodiment of the invention, updated storage using secondary signal bang path in register circuit
Setting code the step of in, the setting code before renewal includes the second set information.
In an exemplary embodiment of the invention, the second reference caused by the second set information of above-mentioned foundation setting code
Frequency meets the specification of one second test pattern.
In an exemplary embodiment of the invention, in the second test pattern, type nonvolatile storage dress
Put and be electrically connected to one second test device, the data of the second test device output first frequency are deposited to duplicative is non-volatile
Reservoir storage device.
In an exemplary embodiment of the invention, if above-mentioned reference frequency setting method further includes the data quilt of first frequency
Input, switches to secondary signal bang path, to be deposited using secondary signal bang path to update by the first signaling path
The setting code being stored in register circuit.
In an of the invention exemplary embodiment, above-mentioned update storage includes in the step of setting code in register circuit
Following steps：Compare the first reference frequency or the second reference frequency and the second frequency that is received in the second test pattern
Frequency-splitting between data；And set according to a comparative result to update storage in second of the setting code in register circuit
Determine information.
In an exemplary embodiment of the invention, above-mentioned reference frequency setting method is further included according to obtained by comparative result
The second set information of setting code store to reproducible nonvolatile memorizer module or storage unit.
The exemplary embodiment of the present invention provides a kind of Memory Controller, for setting a duplicative non-volatile memories
The reference frequency of device storage device.Type nonvolatile storage device includes a duplicative non-volatile memories
Device module and an oscillating circuit module.Oscillating circuit module includes a register circuit.Memory Controller includes a storage
Device interface, a memory management circuitry and a storage unit.Memory interface is electrically connected to that duplicative is non-volatile to be deposited
Memory modules.Memory management circuitry is electrically connected to memory interface.Storage unit is electrically connected to memory management circuitry.
Memory management circuitry control oscillating circuit module utilizes one first signaling path from type nonvolatile
A setting code is read in module or storage unit, and setting code is stored in register circuit.Setting code is set including one first
Determine information.Whether the data that memory management circuitry detects a first frequency are transfused to.If the data of first frequency not by
Input, memory management circuitry control oscillating circuit module reads the setting code being stored in register circuit, so that vibration electricity
Road module produces one first reference frequency according to the first set information of setting code.If the data of first frequency are transfused to,
Memory management circuitry control oscillating circuit module is updated storage in register circuit using a secondary signal bang path
Setting code.Setting code after renewal includes one second set information.If the data of first frequency are transfused to, memory management
Circuit control oscillating circuit module, which is read, is stored in the setting code after the renewal in register circuit so that oscillating circuit module according to
One second reference frequency is produced according to the second set information.
In an exemplary embodiment of the invention, above-mentioned memory management circuitry is set according to the frequency of a host computer system
The first set information of code is set, and the setting code including the first set information is stored in duplicative non-volatile memories
In device module or storage unit.
In an exemplary embodiment of the invention, the first reference caused by the first set information of above-mentioned foundation setting code
Frequency meets the specification of one first test pattern.
In an exemplary embodiment of the invention, in the first test pattern, type nonvolatile storage dress
Put and be electrically connected to one first test device.The data that first test device does not export first frequency are non-volatile to duplicative
Memory storage apparatus.
In an exemplary embodiment of the invention, if the data of first frequency are not transfused to, memory management circuitry control
Damping is swung circuit module and is not performed using secondary signal bang path to update storage in the behaviour of the setting code in register circuit
Make.
In an exemplary embodiment of the invention, above-mentioned memory management circuitry is set according to the frequency of a host computer system
The second set information of code is set, and the setting code including the second set information is stored in duplicative non-volatile memories
In device module or storage unit.
In an exemplary embodiment of the invention, the setting code before above-mentioned renewal includes the second set information.
In an exemplary embodiment of the invention, the second reference caused by the second set information of above-mentioned foundation setting code
Frequency meets the specification of one second test pattern.
In an exemplary embodiment of the invention, in the second test pattern, type nonvolatile storage dress
Put and be electrically connected to one second test device.The data of second test device output first frequency are deposited to duplicative is non-volatile
Reservoir storage device.
In an exemplary embodiment of the invention, if the data of first frequency are transfused to, memory management circuitry control is shaken
Swing circuit module and the first signaling path switched into secondary signal bang path, with using secondary signal bang path come more
The new setting code being stored in register circuit.
In an exemplary embodiment of the invention, above-mentioned oscillating circuit module includes a frequency tracking circuit, positioned at second
Signaling path.Frequency tracking circuit to compare the first reference frequency or the second reference frequency with the second test pattern
Frequency-splitting between the data of the second frequency received.Oscillating circuit module according to a comparative result come update storage in
Second set information of the setting code in register circuit.
In an of the invention exemplary embodiment, above-mentioned memory management circuitry is by the setting code according to obtained by comparative result
The second set information store to reproducible nonvolatile memorizer module or storage unit.
The exemplary embodiment of the present invention provides a kind of type nonvolatile storage device, including a vibration electricity
Road module, a reproducible nonvolatile memorizer module and a Memory Controller.Oscillating circuit module includes a deposit
Device circuit.Memory Controller is electrically connected to oscillating circuit and reproducible nonvolatile memorizer module.Memory controls
Device includes a storage unit.Memory Controller control oscillating circuit module utilizes one first signaling path from duplicative
A setting code is read in non-volatile memory module or storage unit, and setting code is stored in register circuit.Setting
Code includes one first set information.Whether the data that Memory Controller detects a first frequency are transfused to.If first frequency
Data be not transfused to, Memory Controller control oscillating circuit module reads the setting code being stored in register circuit,
So that oscillating circuit module produces one first reference frequency according to the first set information of setting code.If the number of first frequency
According to being transfused to, Memory Controller control oscillating circuit module is updated storage in register using a secondary signal bang path
Setting code in circuit.Setting code after renewal includes one second set information.If the data of first frequency are transfused to, storage
Device controller control oscillating circuit module, which is read, is stored in the setting code after the renewal in register circuit, so that oscillating circuit mould
Block produces one second reference frequency according to the second set information.
In an exemplary embodiment of the invention, above-mentioned Memory Controller is set according to the frequency of a host computer system
Determine the first set information of code, and the setting code including the first set information is stored in type nonvolatile
In module or storage unit.
In an exemplary embodiment of the invention, the first reference caused by the first set information of above-mentioned foundation setting code
Frequency meets the specification of one first test pattern.
In an exemplary embodiment of the invention, in the first test pattern, type nonvolatile storage dress
Put and be electrically connected to one first test device.The data that first test device does not export first frequency are non-volatile to duplicative
Memory storage apparatus.
In an exemplary embodiment of the invention, if the data of first frequency are not transfused to, Memory Controller control
Oscillating circuit module is not performed using secondary signal bang path to update storage in the operation of the setting code in register circuit.
In an exemplary embodiment of the invention, above-mentioned Memory Controller is set according to the frequency of a host computer system
Determine the second set information of code, and the setting code including the second set information is stored in type nonvolatile
In module or storage unit.
In an exemplary embodiment of the invention, the setting code before renewal includes the second set information.
In an exemplary embodiment of the invention, the second reference caused by the second set information of above-mentioned foundation setting code
Frequency meets the specification of one second test pattern.
In an exemplary embodiment of the invention, in the second test pattern, type nonvolatile storage dress
Put and be electrically connected to one second test device.The data of second test device output first frequency are deposited to duplicative is non-volatile
Reservoir storage device.
In an exemplary embodiment of the invention, if the data of first frequency are transfused to, Memory Controller control vibration
First signaling path is switched to secondary signal bang path by circuit module, to be updated using secondary signal bang path
The setting code being stored in register circuit.
In an exemplary embodiment of the invention, above-mentioned oscillating circuit module includes a frequency tracking circuit, positioned at second
Signaling path.Frequency tracking circuit to compare the first reference frequency or the second reference frequency with the second test pattern
Frequency-splitting between the data of the second frequency received.Oscillating circuit module according to a comparative result come update storage in
Second set information of the setting code in register circuit.
In an of the invention exemplary embodiment, above-mentioned Memory Controller is by the setting code according to obtained by comparative result
Second set information is stored to reproducible nonvolatile memorizer module or storage unit.
Based on above-mentioned, in the exemplary embodiment of the present invention, the adjustment of reference frequency is set note by memory storage apparatus
Record on its memory or storage unit.In different test patterns, memory storage apparatus selectivity decides whether to open
Dynamic frequency tracking function, to produce the reference frequency that may conform to different test specifications.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to coordinate attached drawing to make
Carefully it is described as follows.
Brief description of the drawings
Figure 1A is the host computer system and memory storage apparatus depicted in exemplary embodiment according to the present invention.
Figure 1B is that the computer depicted in exemplary embodiment, input/output device and memory storage fill according to the present invention
The schematic diagram put.
Fig. 1 C are the signals of the host computer system depicted in another exemplary embodiment and memory storage apparatus according to the present invention
Figure.
Fig. 2 is the schematic block diagram for illustrating the memory storage apparatus shown in Figure 1A.
Fig. 3 is the schematic block diagram of the Memory Controller depicted in exemplary embodiment according to the present invention.
Fig. 4 is the schematic block diagram of the oscillating circuit module depicted in an exemplary embodiment according to the present invention.
Fig. 5 and Fig. 6 illustrates the possible summary waveform of input data of this exemplary embodiment respectively.
Memory storage apparatus is electrically connected to the summary signal of the first test device when Fig. 7 is shown in the first test pattern
Figure.
Memory storage apparatus is electrically connected to the summary signal of the second test device when Fig. 8 is shown in the second test pattern
Figure.
Fig. 9 is the flow chart of the reference frequency setting method depicted in an exemplary embodiment according to the present invention.
Figure 10 is the flow chart of the reference frequency setting method depicted in another exemplary embodiment according to the present invention.
【Symbol description】
1000：Host computer system
1100：Computer
1102：Microprocessor
1104：Random access memory
1106：Input/output device
1108：System bus
1110：Data transmission interface
1202：Mouse
1204：Keyboard
1206：Display
1208：Printer
1212：Portable disk
1214：Storage card
1216：Solid state hard disc
1310：Digital camera
1312：SD card
1314：Mmc card
1316：Memory stick
1318：CF cards
1320：Embedded storage device
100：Memory storage apparatus
102：Connector
104：Memory Controller
106：Reproducible nonvolatile memorizer module
202：Memory management circuitry
204：Host interface
206：Memory interface
252：Storage unit
254：Electric power management circuit
256：Error checking and correcting circuit
400：Oscillating circuit module
410：Frequency tracking circuit
420：Register circuit
430：Oscillating circuit
440：Selector circuit
700：First test device
800：Second test device
LFPS：Low frequency cycle signal
DATA：Data-signal
IN_DATA：Input signal
CLK1：First reference frequency
CLK2：Second reference frequency
S100、S120、S130、S140、S150、S160、S200、S220、S230、S240、S250、S260：Reference frequency
The step of setting method
Embodiment
The reference frequency setting method that the exemplary embodiment of the present invention is proposed, the adjustment of reference frequency is set, record
In in the type nonvolatile or storage unit of memory storage apparatus.When opening the execution of card program, memory
Storage device can be provided accurate reference frequency by host computer system and directly be stored in the setting value of reference frequency wherein, or
The reference frequency of host computer system offer is provided using the mode of frequency tracking (tracking), electricity is vibrated in its chip to adjust
Frequency setting needed for the module of road.The setting value of this reference frequency is stored in type nonvolatile with form of firmware
In module or storage unit, using as next time start shooting when frequency initial value so that reduce oscillating circuit module reference frequently
The difference of rate and host frequency.Afterwards, memory storage apparatus start in general operation pattern (normal operation)
When, you can correctly link with host.In addition to operating in general operation pattern, memory storage apparatus may also must
The specification required by a variety of different test patterns, such as compatibility test (compliance test) pattern rule need be met
Model or feedback test (loopback test) pattern specification.In different test patterns, test condition is likely to environment
Differ.For example, when carrying out compatibility test, the host or test device that are connected with memory storage apparatus can't
An external signal is provided to memory storage apparatus, at this time, the oscillating circuit module of memory storage apparatus is just without reference to frequency
Rate can follow the trail of.Conversely, when carrying out feedback test, the host or test device that are connected with memory storage apparatus can provide one
External signal is to memory storage apparatus, and at this time, i.e. sustainably tracking is exterior for the oscillating circuit module of memory storage apparatus
Signal frequency, dynamically to update the setting value of the reference frequency of oscillating circuit module.
Base this, the reference frequency setting method that exemplary embodiment of the invention is proposed is except can be by this frequency initial value
Setting be stored in form of firmware in reproducible nonvolatile memorizer module or storage unit outside, can also be according to depositing
Reservoir storage device is the function of operating in which kind of environment to decide whether to carry out frequency tracking.To more clearly understand this hair
It is bright, below in conjunction with attached drawing, elaborated with an exemplary embodiment.
In general, memory storage apparatus (also known as, storage system) includes duplicative non-volatile memories
Device module and controller (also known as, control circuit).Being commonly stored device storage device is used together with host computer system, so that host
System can write data into memory storage apparatus or be read from memory storage apparatus data.
Figure 1A is the host computer system and memory storage apparatus depicted in exemplary embodiment according to the present invention.
Figure 1A is refer to, host computer system 1000 generally comprises computer 1100 and input/output (input/output, I/
O) device 1106.Computer 1100 include microprocessor 1102, random access memory (random access memory,
RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 includes the mouse such as Figure 1B
1202nd, keyboard 1204, display 1206 and printer 1208.It will be appreciated that the unrestricted input of device shown in Figure 1B/defeated
Go out device 1106, input/output device 1106 may also include other devices.
In embodiments of the present invention, memory storage apparatus 100 is by data transmission interface 1110 and host computer system
1000 other elements are electrically connected.Pass through microprocessor 1102, random access memory 1104 and input/output device 1106
Running can write data into memory storage apparatus 100 or read data from memory storage apparatus 100.For example, deposit
Reservoir storage device 100 can be Portable disk 1212, storage card 1214 or solid state hard disc (Solid State as shown in Figure 1B
Drive, SSD) 1216 grades type nonvolatile storage device.
In general, host computer system 1000 is that can substantially coordinate with memory storage apparatus 100 to store appointing for data
Meaning system.Although in this exemplary embodiment, host computer system 1000 is explained with computer system, however, in the present invention
Host computer system 1000 can be that digital camera, video camera, communicator, audio player or video are broadcast in another exemplary embodiment
The systems such as device are put, or when opening the execution of card program, there is provided the host of 100 reference frequency of memory storage apparatus.For example,
When host computer system is digital camera (video camera) 1310, type nonvolatile storage device is then used in it
SD card 1312, mmc card 1314, memory stick (memory stick) 1316, CF cards 1318 or embedded storage device 1320 are (as schemed
Shown in 1C).Embedded storage device 1320 includes embedded multi-media card (Embedded MMC, eMMC).It is noted that
Embedded multi-media card is directly to be electrically connected on the substrate of host computer system.When memory storage apparatus 100 is tested,
Host computer system 1000 may also mean that the test device tested memory storage apparatus 100, such as the bit error rate
(biterror) analyzer.
Fig. 2 is the schematic block diagram for illustrating the memory storage apparatus shown in Figure 1A.
Fig. 2 is refer to, it is non-that memory storage apparatus 100 includes connector 102, Memory Controller 104 and duplicative
Volatile 106.
In this exemplary embodiment, connector 102 be compatible to Universal Serial Bus (Universal Serial Bus,
USB) standard.However, it is necessary to be appreciated that, the present invention is not limited thereto, and connector 102 can also meet Electrical and Electronic engineering
Shi Xiehui (Institute of Electrical and Electronic Engineers, IEEE) 1394 standards, high speed are outer
Enclose component connecting interface (Peripheral Component Interconnect Express, PCI Express) standard, string
Advanced annex (Serial Advanced Technology Attachment, the SATA) standard of row, secure digital (Secure
Digital, SD) interface standard, a ultrahigh speed generation (Ultra High Speed-I, UHS-I) interface standard, two generation of ultrahigh speed
(Ultra High Speed-II, UHS-II) interface standard, memory stick (Memory Stick, MS) interface standard, multimedia are deposited
Card storage (Multi Media Card, MMC) interface standard, built-in multimedia storage card (Embedded Multimedia
Card, eMMC) it is interface standard, general flash memory (Universal Flash Storage, UFS) interface standard, small-sized fast
Dodge (Compact Flash, CF) interface standard, integrated driving electrical interface (Integrated Device
Electronics, IDE) standard or other suitable standards.
Memory Controller 104 to perform in the form of hardware multiple logic gates of form of firmware implementation or control refer to
Order, and according to the instruction of host computer system 1000 carried out in reproducible nonvolatile memorizer module 106 data write-in,
The running such as read and erase.Wherein what deserves to be explained is, in one example of the present invention embodiment, connector 102 and memory
A reference frequency used in controller 104 is adjusted all using the grouping information transmitted from host computer system 1000
Whole internal oscillator circuit module, to produce this reference frequency, this reference frequency is non-to be come from a memory storage apparatus 100
The quartz (controlled) oscillator in portion.And in another example of the present invention embodiment, the inside of memory storage apparatus 100, which does not include, a stone
English oscillator.
Reproducible nonvolatile memorizer module 106 is electrically connected to Memory Controller 104, and to store
The data that host computer system 1000 is write.In this exemplary embodiment, reproducible nonvolatile memorizer module 106 is multistage
Memory cell (Multi Level Cell, MLC) NAND quick-flash memory module.However, the present invention is not limited thereto, duplicative is non-
Volatile 106 may also be single-order memory cell (Single Level Cell, SLC) NAND quick-flash memory module,
Other flash memory modules or other memory modules with identical characteristic.
Fig. 3 is the schematic block diagram of the Memory Controller depicted in exemplary embodiment according to the present invention.
Fig. 3 is refer to, Memory Controller 104 includes memory management circuitry 202, host interface 204 connects with memory
Mouth 206.
Memory management circuitry 202 to control memory controller 104 overall operation.Specifically, memory pipe
Reason circuit 202 has multiple control instructions, and when memory storage apparatus 100 operates, these control instructions can be performed
To carry out the write-in of data, read and the running such as erase.
In this exemplary embodiment, the control instruction of memory management circuitry 202 is to carry out implementation with form of firmware.For example,
Memory management circuitry 202 has microprocessor unit (not illustrating) and read-only storage (not illustrating), and these controls refer to
Order is programmed in so far read-only storage.When memory storage apparatus 100 operates, these control instructions can be by microprocessor
Unit is performed to carry out the write-in of data, read and the running such as erase.
In another exemplary embodiment of the present invention, the control instruction of memory management circuitry 202 can also program code shape
Formula is stored in the specific region of reproducible nonvolatile memorizer module 106 (for example, being exclusively used in storage system in memory module
The system area for data of uniting) in.In addition, memory management circuitry 202 has microprocessor unit (not illustrating), read-only storage
(not illustrating) and random access memory (not illustrating).Particularly, this read-only storage has driving code, and works as memory control
When device 104 processed is enabled, microprocessor unit, which can first carry out this driving code section, will be stored in duplicative non-volatile memories
Control instruction in device module 106 is loaded into the random access memory of memory management circuitry 202.Afterwards, microprocessor
Unit can operate these control instructions to carry out the write-in of data, read and the running such as erase.In addition, in another example of the present invention
In embodiment, the control instruction of memory management circuitry 202 can also an example, in hardware carry out implementation.
Host interface 204 is electrically connected to memory management circuitry 202 and to receive and identify host computer system
1000 instructions transmitted and data.That is, the instruction that host computer system 1000 is transmitted can pass through host interface with data
204 are sent to memory management circuitry 202.In this exemplary embodiment, host interface 204 is to be compatible to SATA standard.So
And, it should be understood that the present invention is not limited thereto, host interface 204 can also be compatible to SATA standard, IEEE1394 standards,
PCI Express standards, USB standard, SD standards, UHS-I interface standards, UHS-II interface standards, MS standards, MMC standards,
EMMC interface standards, UFS interface standards, CF standards, IDE standards or other suitable data transmission standards.
Memory interface 206 is electrically connected to memory management circuitry 202 and non-volatile to access duplicative
Property memory module 106.That is, the data for being intended to write to reproducible nonvolatile memorizer module 106 can be via depositing
Memory interface 206 is converted to the receptible form of the institute of reproducible nonvolatile memorizer module 106.
In an exemplary embodiment of the invention, Memory Controller 104 further includes a storage unit 252.Storage unit 252
It is electrically connected to memory management circuitry 202 and can be used to memory system data, the temporary data for coming from host computer system 1000
Data with instructing or coming from reproducible nonvolatile memorizer module 106.
In an exemplary embodiment of the invention, Memory Controller 104 further includes electric power management circuit 254.Power management
Circuit 254 is electrically connected to memory management circuitry 202 and to the power supply of control memory storage device 100.
In an exemplary embodiment of the invention, Memory Controller 104 further includes error checking and correcting circuit 256.It is wrong
Flase drop is looked into is electrically connected to memory management circuitry 202 and to perform error checking and correction journey with correcting circuit 256
Sequence is to ensure the correctness of data.Specifically, refer to when memory management circuitry 202 receives write-in from host computer system 1000
When making, error checking produces corresponding error checking and correcting code with the data that correcting circuit 256 can be this corresponding write instruction
(Error Checking and Correcting Code, ECC Code), and memory management circuitry 202 can will correspond to this
The data of write instruction are write into reproducible nonvolatile memorizer module 106 with corresponding error checking and correcting code.
Afterwards, can be read at the same time when memory management circuitry 202 reads data from reproducible nonvolatile memorizer module 106
The corresponding error checking of this data and correcting code, and error checking can be according to this error checking and correction with correcting circuit 256
Code performs error checking and correction program to read data.
Fig. 4 is the schematic block diagram of the oscillating circuit module depicted in an exemplary embodiment according to the present invention.Please refer to Fig.2
To Fig. 4, the oscillating circuit module 400 of the present embodiment is the vibration in a chip of 100 indoor design of memory storage apparatus
Circuit module, it is for example disposed in connector 102, to produce the first or second reference frequency CLK1, CLK2.In this model
In example embodiment, oscillating circuit module 400 includes frequency tracking circuit 410, register circuit 420, oscillating circuit 430 and selection
Device circuit 440.Oscillating circuit 430 is, for example, a resistance/capacitance（RC）It is oscillator, ring-like（Ring）Oscillator or inductance/
Capacitance（LC）Oscillator.In the present embodiment, oscillating circuit 430 can be according to the reference frequency that the inside of register circuit 420 is stored
The set information of rate produces the first or second reference frequency CLK1, CLK2.Register circuit 420 is to stored reference frequency
Set information.
In this exemplary embodiment, the memory management circuitry 202 inside Memory Controller 104 can be used to detection storage
Whether device storage device 100 receives an input data IN_DATA, or whether received input data IN_DATA includes
The data of one first frequency.That is, Memory Controller 104 can detect the data of first frequency and whether be input to memory and deposit
Storage device 100.Fig. 5 and Fig. 6 illustrates the possible summary waveforms of input data IN_DATA of this exemplary embodiment respectively.Please at the same time
With reference to figure 5 and Fig. 6, in this exemplary embodiment, input signal IN_DATA generally includes low frequency cycle signal (low
Frequency period signal, LFPS), data-signal DATA and electrical idle state (electrical idle).
Low frequency cycle signal is, for example, the data for having in input signal IN_DATA first frequency, is determined as Memory Controller 104
The data of the fixed specific frequency for whether carrying out frequency tracking, it can be distributed in input signal IN_ in a manner of continuous or discrete
In DATA, respectively as shown in Figures 5 and 6.Low frequency cycle signal is low frequency signal, its cycle ranged approximately from for 20 nanoseconds
(nanosecond, ns) is between 100ns.In this exemplary embodiment, data-signal DATA is, for example, input signal IN_DATA
In there are the data of second frequency, the echo signal of frequency tracking is carried out as frequency tracking circuit 410, its frequency is generally 5
Gigahertz (GHZ) (Gigahertz, GHz).Therefore, in this instance, whether defeated Memory Controller 104 can detect low frequency cycle signal
Enter to memory storage apparatus 100, but low frequency cycle signal decides whether to carry out frequency tracking as Memory Controller 104
Specific frequency data only to illustrate, the present invention is not limited thereto.
100 possible operation of memory storage apparatus of this exemplary embodiment is in general operation pattern and different test moulds
Formula, including the first test pattern and the second test pattern.In the first test pattern, for example, compatibility test pattern, memory
The first test device 700 that storage device 100 is electrically connected can't provide external signal to memory storage apparatus 100,
As shown in Figure 7.Memory storage apparatus is electrically connected to the summary of the first test device and shows when Fig. 7 is shown in the first test pattern
It is intended to.In this test pattern.Memory Controller 104 will not detect low frequency cycle signal when carrying out compatibility test
It is input to memory storage apparatus 100.In the second test pattern, for example, beta test mode, memory storage apparatus 100
The second test device 800 being electrically connected can carry out error rate analyzer test (biterror to memory storage apparatus 100
Test, BERT), as shown in Figure 8.Memory storage apparatus is electrically connected to the second test when Fig. 8 is shown in the second test pattern
The schematic diagram of device.In the second test pattern, the second test device 800 can export input signal IN_DATA to storage
Device storage device 100 is tested, this input signal IN_DATA includes the low frequency cycle signal with first frequency, and
Data-signal DATA with second frequency.
In the exemplary embodiment of the present invention, in order to meet different test specifications, carried out in memory storage apparatus 100
Before test, the meeting control selections device of Memory Controller 104 circuit 440, selection the first signaling path 510 of conducting, with control
Damping swings circuit module 400 and utilizes the first signaling path 510 from reproducible nonvolatile memorizer module 106 or storage
Unit 252 reads setting code, and controls oscillating circuit module 400 to be stored in code is set in register circuit 420.
In one embodiment, the setting code stored using the first signaling path 510 to register circuit 420 may include
First set information and the second set information.In the first test mould, Memory Controller 104 will not initiation culture tracking circuit
410.Hereat, oscillating circuit 430 according to the first set information being stored in register circuit 420 produce first with reference to frequency
Rate CLK1, to meet the test specification of the first test pattern.In the second test pattern, if Memory Controller 104 detects
The data of first frequency, example low frequency cycle signal as the aforementioned, the meeting initiation culture tracking circuit 410 of Memory Controller 104,
To allow frequency tracking circuit 410 to be updated storage according to the test frequency that the second test device 800 is provided in register circuit
The second set information in 420.Therefore, in different test patterns, oscillating circuit 430 is set according to the first set information or second
The first test pattern and can each be met by determining the first reference frequency CLK1 that information produces respectively or the second reference frequency CLK2
The test specification of two test patterns.
Specifically, Fig. 9 is the flow chart of the reference frequency setting method depicted in an exemplary embodiment according to the present invention.
Fig. 9 is refer to, in the present embodiment, in the step s 100, the selection conducting of 104 control selections device circuit 440 of Memory Controller
First signaling path 510, so that oscillating circuit module 400 is non-easily from duplicative using the first signaling path 510
The property lost memory module 106 or storage unit 252 read setting code, and setting code is stored in register circuit 420.
In this step, Memory Controller 104 is, for example, the first setting that setting code is first set according to the frequency of host computer system 1000
Information and the second set information, and then setting code is stored in type nonvolatile mould in the form of firmware
In block 106 or storage unit 252.Therefore, in the present embodiment, reproducible nonvolatile memorizer module 106 or storage are single
The setting code that member 252 is stored includes the first set information and the second set information.Then, in step s 110, memory control
Whether the data that device 104 processed detects first frequency are input to memory storage apparatus 100.If not, the reference of the present embodiment
Frequency setting method can perform step S120.From the point of view of another viewpoint, if Memory Controller 104 does not detect the first frequency
The data of rate are input to memory storage apparatus 100, represent that memory storage apparatus 100 is to be in the first test pattern at this time
State.In the step s 120, Memory Controller 104 controls oscillating circuit 430 to read and is stored in register circuit 420
The first set information of code is set, so that oscillating circuit 430 produces first with reference to frequency according to the first set information of setting code
Rate CLK1.Therefore, in the first test pattern, oscillating circuit 430 is according to first caused by the first set information of setting code
Reference frequency CLK1 meets the specification of the first test pattern.In addition, in the first test pattern, Memory Controller 104 will not
Initiation culture follows the trail of circuit 410 to perform the operation of frequency tracking.
On the other hand, in step s 110, if Memory Controller 104 detects that the data of first frequency are input to
Memory storage apparatus 100, represents that memory storage apparatus 100 is to be in the second test pattern or general operation pattern at this time
State, the reference frequency setting method of the present embodiment can perform step S130.In step s 130, Memory Controller 104
First signaling path 510 is switched to secondary signal bang path 520, and initiation culture by control selections device circuit 440
Circuit 410 is followed the trail of, to be updated storage using secondary signal bang path 520 in the setting code in register circuit 420.Connect
, in step S140, frequency tracking circuit 410 compares the second reference frequency CLK2 and received in the second test pattern
Frequency-splitting between data-signal DATA with second frequency.Afterwards, in step S150, Memory Controller 104
Updated storage according to comparative result in the second set information of the setting code in register circuit 420.It is noted that due to
The reproducible nonvolatile memorizer module 106 or storage unit 252 of the present embodiment are stored with the first setting letter of setting code
Breath and the second set information, therefore, the setting code before renewal include the second set information.Followed by, in step S160, storage
Device controller 104 controls oscillating circuit 430 to read the second set information for setting code being stored in register circuit 420, with
Make oscillating circuit 430 according to the second set information of setting code to produce the second reference frequency CLK2.Therefore, mould is tested second
In formula, oscillating circuit 430 meets the second test according to the second reference frequency CLK2 caused by the second set information of setting code
The specification of pattern.
In addition, in the present embodiment, execution of step S150's updates storage in the setting code in register circuit 420
After the operation of second set information, Memory Controller 104 also can according to the comparative result of step S150 come update storage in
Setting code in reproducible nonvolatile memorizer module 106 or storage unit 252.
In addition, other implementation details of the reference frequency setting method of the present embodiment can by Fig. 1 chatting to Fig. 8 embodiments
Enough teachings are obtained in stating, suggestion illustrates with implementing, therefore repeats no more.
In another embodiment, using the first signaling path 510 from reproducible nonvolatile memorizer module 106
Or storage unit 252 is read, and store to the setting code of register circuit 420 and also can only include the first set information.Herein
In example, Memory Controller 104 is the first set information that setting code is set according to the frequency of host computer system 1000, and will
Only the setting code including the first set information is stored in reproducible nonvolatile memorizer module 106 or storage unit at present
In 252.Will not initiation culture tracking circuit 410 in the first test mould Memory Controller 104.Hereat, 430 foundation of oscillating circuit
The first set information being stored in register circuit 420 is come the first reference frequency for producing, to meet the first test pattern
Test specification.In the second test pattern, if Memory Controller 104 detects the data of first frequency, memory control
The meeting initiation culture tracking circuit 410 of device 104, to allow frequency tracking circuit 410 to be had according to what the second test device 800 was provided
The data-signal DATA of second frequency believes to update storage in the first set information in register circuit 420 for the second setting
Breath.In other words, in this instance, the second set information is produced using frequency tracking operation, and is stored in register circuit
420.Therefore, oscillating circuit 430 may conform to the survey of the second test pattern according to the second reference frequency that the second set information produces
Try specification.
Specifically, Figure 10 is the flow of the reference frequency setting method depicted in another exemplary embodiment according to the present invention
Figure.The reference frequency setting method of the present embodiment is similar to the reference frequency setting method of Fig. 9, but main difference between the two
It is different to be for example, in step s 200, before carrying out the second test pattern or entering general operation pattern, utilize the first letter
Number bang path 510 reads setting code from reproducible nonvolatile memorizer module 106 or storage unit 252 and is stored in
In register circuit 420, the embodiment compared to Fig. 9, setting code only includes the first set information.Therefore, the second survey is being carried out
After die trial formula or entrance general operation pattern, in step S240, frequency tracking circuit 410 compares the first reference frequency
Frequency-splitting between CLK1 and the data-signal DATA with second frequency received in the second test pattern.In step
In S250, Memory Controller 104 is updated storage in the setting in register circuit 420 according to the comparative result of step S240
Code, the second set information is updated to by the first set information.Then, in step S260, the control vibration of Memory Controller 104
Circuit 430 reads and is stored in the setting code after the renewal in register circuit 420, it includes the second set information, so that vibration
Circuit 430 produces the second reference frequency CLK2 according to the second set information of setting code.
In addition, in the present embodiment, execution of step S250's updates storage in the setting code in register circuit 420
After the operation of second set information, Memory Controller 104 also can be further by obtained by the comparative result according to step S250
The second set information of setting code store to reproducible nonvolatile memorizer module 106 or storage unit 252.
In addition, other implementation details of the reference frequency setting method of the present embodiment can by Fig. 1 chatting to Fig. 9 embodiments
Enough teachings are obtained in stating, suggestion illustrates with implementing, therefore repeats no more.
In addition, in the present embodiment, although in reproducible nonvolatile memorizer module 106 or storage unit 252
The setting code stored only includes the first set information, also, in step s 250, is produced using the operation of frequency tracking
Second set information, and register circuit 420 is stored in, however, in order to make memory storage apparatus 100 meet the second test mould
The test specification of formula, or ensure memory storage apparatus 100 operable no anxiety, this implementation after general operation pattern is entered
The reference frequency setting method of example also can be deposited directly in reproducible nonvolatile memorizer module 106 or storage unit 252
Storage meets the first set information of the test specification of the second test pattern, and directly storage can ensure that memory storage apparatus
100 operate the first set information without anxiety after general operation pattern is entered.In other words, 430 foundation of oscillating circuit at this time
The reference frequency that first set information produces may conform to the test specification of first, second test pattern, and meet general operation
The standard of the reference frequency of pattern.
On the other hand, in general operation pattern, memory storage apparatus 100 can be first with the when opening card program and performing
The setting value of reference frequency is stored in register circuit 420 by one signaling path 510 with form of firmware, using as next
Frequency initial value during secondary start.Hereafter, in general operation pattern, when memory storage apparatus 100 and host computer system 1000
During connection, the input signal IN_ that host computer system 1000 at this time is provided can be followed the trail of via secondary signal bang path 520
DATA, using the set information as reference frequency, so as to reduce the reference frequency and host computer system 1000 of oscillating circuit module 400
The difference of frequency.Afterwards, when memory storage apparatus 100 is started shooting in general operation pattern, you can correctly and host
System 1000 links.
In conclusion in the exemplary embodiment of the present invention, memory storage apparatus provides accurately reference by host
Frequency, adjusts the frequency setting code needed for its oscillating circuit module, and this setting code is stored in duplicative is non-volatile to be deposited
In memory modules or storage unit.In addition, in different test patterns, memory storage apparatus selectivity decides whether to open
Dynamic frequency tracking function, to produce the reference frequency that may conform to different test specifications.
Although the present invention is disclosed as above with embodiment, so it is not limited to the present invention, and those skilled in the art exist
Do not depart from the spirit and scope of the present invention, when can make a little change and retouch, therefore protection scope of the present invention is appended when regarding
Subject to claims confining spectrum.
Claims (23)
1. a kind of reference frequency setting method of type nonvolatile storage device, the wherein duplicative are non-easily
The property lost memory storage apparatus includes a reproducible nonvolatile memorizer module, a storage unit and an oscillating circuit mould
Block, the oscillating circuit module include a register circuit, which does not include a stone
English oscillator, the reference frequency setting method include：
Using one first signaling path one is read out of the reproducible nonvolatile memorizer module or the storage unit
Code is set, and the setting code is stored in the register circuit, wherein the setting code includes one first set information；
Whether the data for detecting a first frequency are transfused to；
If the data of the first frequency are not transfused to, the setting code being stored in the register circuit is read, so that should
Oscillating circuit module produces one first reference frequency according to first set information of the setting code；
If the data of the first frequency are transfused to, updated storage using a secondary signal bang path in the register circuit
Interior setting code, wherein the setting code after renewal includes one second set information；And
If the data of the first frequency are transfused to, reading is stored in the setting code after the renewal in the register circuit, with
Make the oscillating circuit module according to second set information to produce one second reference frequency.
2. reference frequency setting method as claimed in claim 1, further includes：
First set information of the setting code is set according to the frequency of a host computer system, and the first setting letter will be included
The setting code of breath is stored in the reproducible nonvolatile memorizer module or the storage unit.
3. reference frequency setting method as claimed in claim 1, wherein first set information according to the setting code is produced
Raw first reference frequency meets the specification of one first test pattern.
4. reference frequency setting method as claimed in claim 3, wherein in first test pattern, the duplicative is non-easily
The property lost memory storage apparatus is electrically connected to one first test device, which does not export the number of the first frequency
According to the type nonvolatile storage device.
5. reference frequency setting method as claimed in claim 1, if wherein the data of the first frequency are not transfused to, the ginseng
Frequency setting method is examined not perform using the secondary signal bang path to update storage in the setting in the register circuit
The step of code.
6. reference frequency setting method as claimed in claim 1, further includes：
Second set information of the setting code is set according to the frequency of a host computer system, and the second setting letter will be included
The setting code of breath is stored in the reproducible nonvolatile memorizer module or the storage unit.
7. reference frequency setting method as claimed in claim 6, wherein being deposited using the secondary signal bang path to update
In the step of setting code being stored in the register circuit, the setting code before renewal includes second set information.
8. reference frequency setting method as claimed in claim 1, wherein second set information according to the setting code is produced
Raw second reference frequency meets the specification of one second test pattern.
9. reference frequency setting method as claimed in claim 8, wherein in second test pattern, the duplicative is non-easily
The property lost memory storage apparatus is electrically connected to one second test device, which exports the data of the first frequency
To the type nonvolatile storage device.
10. reference frequency setting method as claimed in claim 7, further includes：
If the data of the first frequency are transfused to, which is switched into the secondary signal bang path,
To be updated storage using the secondary signal bang path in the setting code in the register circuit.
11. reference frequency setting method as claimed in claim 1, wherein updating storage in the setting in the register circuit
The step of code, includes：
Compare first reference frequency or second reference frequency and the second frequency received in one second test pattern
Data between frequency-splitting；And
Second set information in the setting code in the register circuit is updated storage according to a comparative result.
12. reference frequency setting method as claimed in claim 11, further includes：
Second set information of the setting code according to obtained by the comparative result is stored to the duplicative is non-volatile and is deposited
In memory modules or the storage unit.
13. a kind of Memory Controller, for setting the reference frequency of a type nonvolatile storage device, its
In the type nonvolatile storage device include a reproducible nonvolatile memorizer module and one vibration
Circuit module, the oscillating circuit module include a register circuit, which includes：
One memory interface, is electrically connected to the reproducible nonvolatile memorizer module；
One memory management circuitry, is electrically connected to the memory interface；And
One storage unit, is electrically connected to the memory management circuitry,
Wherein the memory management circuitry controls the oscillating circuit module to utilize one first signaling path from the duplicative
A setting code is read in non-volatile memory module or the storage unit, and the setting code is stored in the register circuit
Interior, wherein the setting code includes one first set information；The memory management circuitry detect a first frequency data whether by
Input；If the data of the first frequency are not transfused to, which controls the oscillating circuit module to read and deposits
Setting code being stored in the register circuit, so that the oscillating circuit module is come according to first set information of the setting code
Produce one first reference frequency；If the data of the first frequency are transfused to, which controls the oscillating circuit
Module is updated storage in the setting code in the register circuit using a secondary signal bang path, wherein being somebody's turn to do after renewal
Setting code includes one second set information；And if the data of the first frequency are transfused to, memory management circuitry control should
Oscillating circuit module reads and is stored in the setting code after the renewal in the register circuit, so that the oscillating circuit module foundation
Second set information produces one second reference frequency.
14. Memory Controller as claimed in claim 13, if wherein the data of the first frequency are not transfused to, the storage
Device management circuit controls the oscillating circuit module not perform using the secondary signal bang path to update storage in the register
The operation of the setting code in circuit.
15. Memory Controller as claimed in claim 13, wherein the oscillating circuit module include a frequency tracking circuit, position
In the secondary signal bang path, the frequency tracking circuit to compare first reference frequency or second reference frequency with
Frequency-splitting between the data of the second frequency received in one second test pattern, and the oscillating circuit module according to
One comparative result updates storage second set information in the setting code in the register circuit.
16. Memory Controller as claimed in claim 15, the wherein memory management circuitry will be according to the comparative result institutes
Second set information of the setting code obtained is stored to the reproducible nonvolatile memorizer module or the storage unit.
17. a kind of type nonvolatile storage device, including：
One oscillating circuit module, including a register circuit；
One reproducible nonvolatile memorizer module；And
One Memory Controller, is electrically connected to the oscillating circuit and the reproducible nonvolatile memorizer module, the storage
Device controller includes a storage unit,
Wherein the Memory Controller controls the oscillating circuit module non-from the duplicative using one first signaling path
A setting code is read in volatile or the storage unit, and the setting code is stored in the register circuit,
Wherein the setting code includes one first set information；Whether the data that the Memory Controller detects a first frequency are transfused to；
If the data of the first frequency are not transfused to, which controls oscillating circuit module reading to be stored in this and posts
Setting code in latch circuit, so that the oscillating circuit module produces one according to one first set information of the setting code
One reference frequency；If the data of the first frequency are transfused to, which controls the oscillating circuit module to utilize one
Secondary signal bang path is updated storage in the setting code in the register circuit, wherein the setting code after renewal includes
One second set information；And if the data of the first frequency are transfused to, which controls the oscillating circuit module
The setting code being stored in the register circuit after renewal is read, so that the oscillating circuit module is according to second set information
To produce one second reference frequency.
18. type nonvolatile storage device as claimed in claim 17, if wherein the number of the first frequency
According to not being transfused to, which controls the oscillating circuit module not perform using the secondary signal bang path come more
The operation for the setting code being newly stored in the register circuit.
19. type nonvolatile storage device as claimed in claim 17, wherein the Memory Controller root
Set second set information of the setting code according to the frequency of a host computer system, and by including second set information should
Setting code is stored in the reproducible nonvolatile memorizer module or the storage unit.
20. type nonvolatile storage device as claimed in claim 19, wherein the setting code before renewal
Including second set information.
21. type nonvolatile storage device as claimed in claim 20, if wherein the number of the first frequency
According to being transfused to, which controls the oscillating circuit module that first signaling path is switched to the secondary signal
Bang path, to be updated storage using the secondary signal bang path in the setting code in the register circuit.
22. type nonvolatile storage device as claimed in claim 17, wherein the oscillating circuit module bag
A frequency tracking circuit is included, positioned at the secondary signal bang path, the frequency tracking circuit is comparing first reference frequency
Or the frequency-splitting between second reference frequency and the data of the second frequency received in one second test pattern, with
And the oscillating circuit module second is set according to a comparative result to update storage in this of the setting code in the register circuit
Determine information.
23. type nonvolatile storage device as claimed in claim 22, the wherein Memory Controller will
Second set information of the setting code according to obtained by the comparative result is stored to the type nonvolatile mould
In block or the storage unit.
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| US8656205B2 (en) * | 2010-10-04 | 2014-02-18 | Jmicron Technology Corp. | Generating reference clocks in USB device by selecting control signal to oscillator form plural calibration units |
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