CN104020391A - Method for detecting input outage of frequency converter - Google Patents

Method for detecting input outage of frequency converter Download PDF

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Publication number
CN104020391A
CN104020391A CN201410263855.3A CN201410263855A CN104020391A CN 104020391 A CN104020391 A CN 104020391A CN 201410263855 A CN201410263855 A CN 201410263855A CN 104020391 A CN104020391 A CN 104020391A
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frequency converter
breaks down
input power
detection method
converter breaks
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CN104020391B (en
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李兴鹤
金辛海
宋吉波
柳竹青
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Shanghai Step Electric Corp
Shanghai Sigriner Step Electric Co Ltd
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Shanghai Step Electric Corp
Shanghai Sigriner Step Electric Co Ltd
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Abstract

The invention relates to the control technology of electric motors and discloses a method for detecting an input outage of a frequency converter. The method for detecting the input outage of the frequency converter comprises the steps that the input current of the frequency converter is monitored in real time in each preset period T, and the output current and the busbar voltage of the frequency converter are monitored in real time; output energy Wout is calculated according to the output current; the energy storage change delta Wc of a busbar capacitor is calculated according to the busbar voltage; the frequency of breakdowns of the frequency converter is recorded according to the energy storage change delta Wc and the output energy Wout; it is judged that the input outage of the frequency converter occurs if it is detected that the frequency of the breakdowns of the frequency converter is larger than a preset frequency. Compared with the prior art, the method for detecting the input outage of the frequency converter has the advantages that the input outage of the frequency converter can be detected rapidly and timely, and hardware cost is reduced.

Description

A kind of detection method of frequency converter input power-off
Technical field
The present invention relates to the control technology of motor, particularly a kind of detection method of frequency converter input power-off.
Background technology
At present, generally, judge that the input method whether power-off adopts of frequency converter is, if busbar voltage is reduced to a certain degree (as lower than below 1/4 of rated voltage), think the input power-off of frequency converter.Although this method in most of the cases can correctly judge, but, can not detect very fast the whether power-off of input of frequency converter, (power-off continuation of the journey function refers in frequency converter operational process, while there is input power-off, takes certain measure particularly will to realize power-off continuation of the journey function, allow slower that busbar voltage declines, make frequency converter can maintain for more time electricity condition) time, if can not detect in time input power-off, this function can be had a greatly reduced quality.
Summary of the invention
The object of the present invention is to provide a kind of detection method of frequency converter input power-off, can detect in time fast frequency converter input power-off, and can save hardware cost.
For solving the problems of the technologies described above, embodiments of the present invention provide a kind of detection method of frequency converter input power-off, comprise following steps:
In each default cycle T, output current and the busbar voltage of frequency converter described in Real-Time Monitoring;
According to described output current, calculate output energy W out; According to described busbar voltage, calculate the energy storage changes delta W of bus capacitor c;
According to described Δ W cwith described W out, record the number of times that described frequency converter breaks down;
If the number of times that described frequency converter breaks down detected, be greater than preset times, judge described frequency converter input power-off.
Embodiment of the present invention in terms of existing technologies, while being the input power-off based on frequency converter, frequency converter does not have input power power supply, the energy that its output can only be stored by the bus capacitor of frequency converter provides, therefore, the present invention is in each default cycle (T), and by the busbar voltage of Real-Time Monitoring frequency converter, the energy storage of calculating bus capacitor changes (Δ W c), and directly according to frequency converter output energy (W out) energy (the Δ W that reduces with bus capacitor c) judge whether frequency converter breaks down, and record the number of times that frequency converter breaks down; If the number of times that frequency converter breaks down is greater than preset times, be judged as frequency converter input power-off.Like this, can detect in time fast frequency converter input power-off, and not need to increase extra hardware cost.
In addition, described according to described Δ W cwith described W out, record in the step of the number of times that described frequency converter breaks down, by stagnant ring count method, record the number of times that described frequency converter breaks down.The number of times that utilizes stagnant ring count method statistic frequency converter to break down, has improved the accuracy of counting.
In addition, described according to described Δ W cwith described W out, record in the step of the number of times that described frequency converter breaks down, by Continuous accumulation method, record the number of times that described frequency converter breaks down.Utilize Continuous accumulation method to record the number of times that frequency converter breaks down, method is simple, is easy to realize.
In addition, described according to described Δ W cwith described W out, record in the step of the number of times that described frequency converter breaks down, by certainly subtracting 1 computing method, record the number of times that described frequency converter breaks down.Utilize the number of times breaking down from subtracting 1 computing method statistics frequency converter, improved the accuracy of counting.
Accompanying drawing explanation
Fig. 1 is according to the detection method process flow diagram of the frequency converter input power-off of first embodiment of the invention;
Fig. 2 A is according to the frequency changer schematic diagram of the output three-phase current in first embodiment of the invention;
Fig. 2 B is according to the frequency changer schematic diagram of the output biphase current in first embodiment of the invention;
Fig. 3 is according to the detection method process flow diagram of the frequency converter input power-off of second embodiment of the invention;
Fig. 4 is according to the detection method process flow diagram of the frequency converter input power-off of third embodiment of the invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, the embodiments of the present invention are explained in detail.Yet, persons of ordinary skill in the art may appreciate that in each embodiment of the present invention, in order to make reader understand the application better, many ins and outs have been proposed.But, even without these ins and outs and the many variations based on following embodiment and modification, also can realize each claim of the application technical scheme required for protection.
The first embodiment of the present invention relates to a kind of detection method of frequency converter input power-off, and idiographic flow as shown in Figure 1, comprises following steps:
Step 101, in each default cycle (T), the output current of Real-Time Monitoring frequency converter and busbar voltage.
Wherein, the default cycle (T) can be the switch periods (T of frequency converter 0), can be also a period of time arranging according to actual conditions, can select flexibly.
Step 102, calculates output energy (W according to output current out), meanwhile, the energy storage of calculating bus capacitor according to busbar voltage changes (Δ W c).
Specifically, when input power-off, frequency converter does not have input power power supply, the energy that its output can only be stored by frequency converter bus capacitor provides, therefore when the energy of frequency converter output energy and bus capacitor minimizing is close, can thinks and input power-off (prerequisite: busbar voltage is below uncontrollable rectification crest voltage).Based on this, can calculate by the output current of real-time detection frequency converter output energy (W out), meanwhile, the energy storage of calculating bus capacitor by the busbar voltage of Real-Time Monitoring frequency converter changes (Δ W c), for the size of the two relatively, judge whether power-off of frequency converter.
Common frequency converter (not comprising four-quadrant frequency converter), as shown in Fig. 2 A, 2B.Wherein, D1, D2, D3, D4, D5 and D6 are diode, and C1, C2 and C3 are electric capacity, and R1, R2 and R3 are resistance, Q1, Q2, Q3, Q4, Q5 and Q6 are switching device IGBT (Insulated Gate Bipolar Transistor, insulated gate bipolar transistor).For the frequency converter in Fig. 2 A, output three-phase current, detects two-phase output current and busbar voltage to I haven't seen you for ages; For Fig. 2 B, output biphase current, at least detects a phase current and busbar voltage.
And, in this step, can be by calculating in real time the active power of output (P of frequency converter out), and according to the switch periods (T of frequency converter 0) and active power of output (P out), calculate output energy (W out).Specifically, a switch periods (T 0) in, the output energy of frequency converter is
W out=P out·T 0
In continuous n switch periods, the output energy (W) of frequency converter is:
W = P out k · T 0 + P out k + 1 · T 0 + . . . + P out k + n - 1 · T 0 , ? W = Σ i = k k + n - 1 P out i × T 0 ,
Wherein, be the active power of output of frequency converter in i switch periods, i, n, k are natural number.Utilize above-mentioned formula can calculate frequency converter at continuous several T 0time in output energy.
Meanwhile, can utilize formula below, the energy storage of calculating bus capacitor according to the busbar voltage detecting in real time changes (Δ W c):
ΔW c = ∫ t 1 t 2 u ( t ) c du ( t ) dt dt = c ∫ u ( t 1 ) u ( t 2 ) udu = 1 2 cu 2 | u ( t 1 ) u ( t 2 ) = 1 2 c [ u 2 ( t 2 ) - u 2 ( t 1 ) ] ,
Wherein, u (t) is busbar voltage, and c is bus capacitor, t1 is the initial time in each default cycle (T), and t2 is the finish time in each default cycle (T), and t is the time, dt is the Differential Elements of time, and du is the Differential Elements of busbar voltage.
Step 103, the energy storage of judgement bus capacitor changes (Δ W c) whether be greater than or equal to α output energy (α W doubly out); If so, perform step 104, if not, perform step 105.Wherein, α is default coefficient, is greater than 0.33.Be Δ W c>=α W outtime, execution step 104, otherwise, perform step 105.
Particularly, if the energy storage of bus capacitor detected, change (Δ W c) be greater than or equal to α output energy (α W doubly out), illustrate that the energy of the bus capacitor minimizing of frequency converter is greater than or equal to output energy, there is abnormal electrical power supply.
It should be noted that, while inputting power-off in theory, the variation of bus capacitor is the voltage of output, but actual in cannot accomplishing complete time consistency in the error on detecting and detection, therefore this condition should suitably be relaxed, but can not be reported by mistake, such as prevent input phase failure or when uneven (power passing over by uncontrollable rectifier bridge during phase shortage roughly can reduce 1/3) reported by mistake.So factor alpha value should be greater than 0.33.
Step 104, judges that frequency converter breaks down, and the number of times that frequency converter breaks down adds 1.In the present embodiment, the number of times that adopts virtual counter records frequency converter to break down, need not additionally increase hardware, has saved cost.
Step 105, the number of times zero clearing that frequency converter breaks down, and return to execution step 101.Be Δ W c< α W outtime, illustrate that converter power supply power supply is normal, there is not the fault of input power-off, the number of times zero clearing that frequency converter breaks down, again to count.
From step 103 to step 105, be according to Δ W cwith W outrelation, by Continuous accumulation method, record the number of times that frequency converter breaks down, method is simple, is easy to realize.
Step 106, judges whether the number of times that frequency converter breaks down is greater than preset times (N).If so, perform step 107, if not, return to execution step 101.Wherein, N is fault detect minimum number, is rule of thumb or the value that obtains of test, in this as the condition of judgement.N above fault of continuous detecting is in order to get rid of pseudo-fault, to avoid maloperation.
Step 107, judges frequency converter input power-off.If the number of times that frequency converter breaks down detected, be greater than fault detect minimum number, explanation causes that the reason of fault is input power-off, so be judged as frequency converter input power-off.
Step 108, output alarm prompting.After frequency converter input power-off, output alarm prompting, takes emergency measures for user, such as, can allow the bus longer time retainer belt electricity condition of frequency converter, thereby promote such as functions such as power-off continuations of the journey, reduce the loss or the infringement that because of input power-off, cause.
Compared with prior art, while being the input power-off based on frequency converter, frequency converter does not have input power power supply, the energy that its output can only be stored by the bus capacitor of frequency converter provides, therefore, present embodiment is in each default cycle (T), and by the busbar voltage of Real-Time Monitoring frequency converter, the energy storage of calculating bus capacitor changes (Δ W c), and directly according to frequency converter output energy (W out) energy (the Δ W that reduces with bus capacitor c) judge whether frequency converter breaks down, and record the number of times that frequency converter breaks down; If the number of times that frequency converter breaks down is greater than preset times, be judged as frequency converter input power-off.Like this, can detect in time fast frequency converter input power-off, and not need to increase extra hardware cost.
Second embodiment of the invention relates to a kind of detection method of frequency converter input power-off, and idiographic flow as shown in Figure 3.The second embodiment and the first embodiment are roughly the same, and key distinction part is: in the first embodiment, by Continuous accumulation method, record the number of times that frequency converter breaks down, method is simple, are easy to realize.And in second embodiment of the invention, by stagnant ring count method, record the number of times that frequency converter breaks down, improved the accuracy of counting.
Specifically, in the present embodiment, comprise following steps:
Step 301, in each default cycle (T), the output current of Real-Time Monitoring frequency converter and busbar voltage.This step is similar to the step 101 in the first embodiment, does not repeat them here.
Step 302, calculates output energy (W according to output current out), meanwhile, the energy storage of calculating bus capacitor according to busbar voltage changes (Δ W c).This step is similar to the step 102 in the first embodiment, does not repeat them here.
Step 303, the energy storage of judgement bus capacitor changes (Δ W c) whether be greater than or equal to α output energy (α W doubly out); If so, perform step 304, if not, perform step 305.This step is similar to the step 103 in the first embodiment, does not repeat them here.
Step 304, judges that frequency converter breaks down, and the number of times that frequency converter breaks down adds 1.Then perform step 308.
Step 305, the energy storage of judgement bus capacitor changes (Δ W c) whether be less than β output energy (β W doubly out); If so, perform step 306, if not, perform step 307.Wherein, β is for value is less than the default coefficient of α, is rule of thumb or test and setting.Namely, Δ W c< β W outtime, execution step 306, β W out≤ Δ W c< α W outtime, execution step 307.
Step 306, the number of times zero clearing that frequency converter breaks down, and return to execution step 301.If Δ W detected cbe less than β W out, illustrate that the Power supply of frequency converter is normal, there is not fault, therefore the number of times zero clearing that frequency converter is broken down, counting, avoids stored count after fault restoration again, occurs maloperation, has improved the accuracy of counting.
Step 307, the number of times that frequency converter breaks down is constant, then performs step 308.Namely, β W out≤ Δ W c< α W outtime, the number of times that frequency converter breaks down is constant.When the energy storage of bus capacitor changes within the scope of this, the number of times that frequency converter breaks down is constant, can avoid interference like this and mistake zero clearing.
From step 303 to step 307, be to record by stagnant ring count method the number of times that frequency converter breaks down, improved the accuracy of counting.
Step 308, judges whether the number of times that frequency converter breaks down is greater than preset times (N).If so, perform step 309, if not, perform step 301.This step is similar to the step 106 in the first embodiment, does not repeat them here.
Step 309, judges frequency converter input power-off.This step is similar to the step 107 in the first embodiment, does not repeat them here.
Step 310, output alarm prompting.This step is similar to the step 108 in the first embodiment, does not repeat them here.
Third embodiment of the invention relates to a kind of detection method of frequency converter input power-off, and idiographic flow as shown in Figure 4.The 3rd embodiment and the second embodiment are roughly the same, and key distinction part is: in the second embodiment, by stagnant ring count method, record the number of times that frequency converter breaks down, improved the accuracy of counting.And in third embodiment of the invention, by certainly subtracting 1 computing method, record the number of times that frequency converter breaks down, further improved the accuracy of counting.
Specifically, in the present embodiment, comprise following steps:
Step 401, in each default cycle (T), the output current of Real-Time Monitoring frequency converter and busbar voltage.This step is similar to the step 301 in the first embodiment, does not repeat them here.
Step 402, calculates output energy (W according to output current out), meanwhile, the energy storage of calculating bus capacitor according to busbar voltage changes (Δ W c).This step is similar to the step 302 in the first embodiment, does not repeat them here.
Step 403, the energy storage of judgement bus capacitor changes (Δ W c) whether be greater than or equal to α output energy (α W doubly out); If so, perform step 404, if not, perform step 405.This step is similar to the step 303 in the second embodiment, does not repeat them here.
Step 404, is judged as frequency converter and breaks down, and the number of times that frequency converter breaks down adds 1.Then perform step 410.
Step 405, judgement Δ W cwhether be less than β W out; If so, perform step 406, if not, perform step 407.Namely, β W out≤ Δ W c< α W outtime, execution step 407.
Step 406, judgement Δ W cwhether be less than γ W out; If so, perform step 408, if not, perform step 409.Namely, γ W out≤ Δ W c< β W outtime, execution step 409, Δ W c< γ W outtime, execution step 408.Wherein, γ is the default coefficient that is less than β, is rule of thumb or test and arrange.
Step 407, the number of times that frequency converter breaks down is constant, then performs step 410.
Step 408, the number of times zero clearing that frequency converter breaks down, and return to execution step 401.Namely, Δ W c< γ W outtime, the number of times zero clearing that frequency converter breaks down.
Step 409, the number of times that frequency converter breaks down subtracts 1, then performs step 410.Be γ W out≤ Δ W c< β W outtime, the number of times that frequency converter breaks down is from subtracting 1.By certainly subtracting 1 mode, the interference during by detection is down to compared with low degree, even if error detection does not have too large impact yet, if there is no fault, can gradually failure counter be reduced to 0.
From step 403 to step 409, be to record by certainly subtracting 1 computing method the number of times that frequency converter breaks down, further improved the accuracy of counting.
Step 410, judges whether the number of times that frequency converter breaks down is greater than preset times (N).If so, perform step 411, if not, perform step 401.This step is similar to the step 308 in the second embodiment, does not repeat them here.
Step 411, judges frequency converter input power-off.This step is similar to the step 309 in the second embodiment, does not repeat them here.
Step 412, output alarm prompting.This step is similar to the step 310 in the second embodiment, does not repeat them here.
The step of the whole bag of tricks is divided above, just in order being described clearly, can to merge into a step or some step is split while realizing, and is decomposed into a plurality of steps, as long as comprise identical logical relation, all in the protection domain of this patent; To adding inessential modification in algorithm or in flow process or introducing inessential design, but the core design that does not change its algorithm and flow process is all in the protection domain of this patent.
Persons of ordinary skill in the art may appreciate that the respective embodiments described above are to realize specific embodiments of the invention, and in actual applications, can to it, do various changes in the form and details, and without departing from the spirit and scope of the present invention.

Claims (10)

1. a detection method for frequency converter input power-off, is characterized in that, comprises following steps:
In each default cycle T, output current and the busbar voltage of frequency converter described in Real-Time Monitoring;
According to described output current, calculate output energy W out; According to described busbar voltage, calculate the energy storage changes delta W of bus capacitor c;
According to described Δ W cwith described W out, record the number of times that described frequency converter breaks down;
If the number of times that described frequency converter breaks down detected, be greater than preset times, judge described frequency converter input power-off.
2. the detection method of frequency converter according to claim 1 input power-off, is characterized in that, described according to described Δ W cwith described W out, record in the step of the number of times that described frequency converter breaks down, by stagnant ring count method, record the number of times that described frequency converter breaks down.
3. the detection method of frequency converter according to claim 2 input power-off, is characterized in that, in the described step that records the number of times that described frequency converter breaks down by stagnant ring count method, comprises following sub-step:
If described Δ W detected cbe greater than or equal to α W out, the number of times that described frequency converter breaks down adds 1; Wherein, described α is default coefficient;
If described Δ W detected cbe less than β W out, the number of times zero clearing that described frequency converter breaks down; Wherein, β is the default coefficient that is less than α;
Otherwise the number of times that described frequency converter breaks down is constant.
4. the detection method of frequency converter according to claim 1 input power-off, is characterized in that, described according to described Δ W cwith described W out, record in the step of the number of times that described frequency converter breaks down, by Continuous accumulation method, record the number of times that described frequency converter breaks down.
5. the detection method of frequency converter according to claim 4 input power-off, is characterized in that, in the described step that records the number of times that described frequency converter breaks down by Continuous accumulation method, comprises following sub-step:
If described Δ W detected cbe greater than or equal to α W out, the number of times that described frequency converter breaks down adds 1, otherwise, the number of times zero clearing that described frequency converter breaks down; Wherein, described α is default coefficient.
6. the detection method of frequency converter according to claim 1 input power-off, is characterized in that, described according to described Δ W cwith described W out, record in the step of the number of times that described frequency converter breaks down, by certainly subtracting 1 computing method, record the number of times that described frequency converter breaks down.
7. the detection method of frequency converter according to claim 6 input power-off, is characterized in that, in the described step that records the number of times that described frequency converter breaks down by certainly subtracting 1 computing method, comprises following sub-step:
If described Δ W detected cbe greater than or equal to α W out, the number of times that described frequency converter breaks down adds 1; Wherein, described α is default coefficient;
If described Δ W detected cbe greater than or equal to β W outand be less than α W out, the number of times that described frequency converter breaks down is constant; Wherein, β is the default coefficient that is less than α;
If described Δ W detected cbe greater than or equal to γ W outand be less than β W out, the number of times that described frequency converter breaks down subtracts 1; Wherein, γ is the default coefficient that is less than β;
Otherwise, the number of times zero clearing that described frequency converter breaks down.
8. the detection method of frequency converter input power-off according to claim 1, is characterized in that the switch periods that described default cycle T is described frequency converter.
9. the detection method of frequency converter input power-off according to claim 1, is characterized in that, at described calculating output energy W outstep in, comprise following sub-step:
Calculate in real time the active power of output P of described frequency converter out;
According to described default cycle T and described active power of output P out, calculate described output energy W out.
10. the detection method of frequency converter input power-off according to claim 1, is characterized in that, after the step of the described frequency converter input of described judgement power-off, comprises following steps:
Output alarm prompting.
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CN105158577A (en) * 2015-07-28 2015-12-16 苏州汇川技术有限公司 Unit series-connected high-voltage frequency converter and bus capacitance online monitoring method thereof
CN106054016A (en) * 2016-08-17 2016-10-26 科博达技术有限公司 Method for judging short circuit fault of inverter
CN108347213A (en) * 2017-01-24 2018-07-31 发那科株式会社 Motor drive
CN108736447A (en) * 2018-05-30 2018-11-02 刘顺炮 New energy automobile motor and its angular transducer fault diagnosis and protection algorism
CN109490675A (en) * 2018-12-27 2019-03-19 上海辛格林纳新时达电机有限公司 Method for early warning, electronic equipment and test macro
CN110131834A (en) * 2019-05-20 2019-08-16 珠海格力电器股份有限公司 Power off recognition methods, device and air-conditioning
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