CN104009625A - Determining a characteristic of a signal in response to a charge on a capacitor - Google Patents

Abstract

The invention discloses determining a characteristic of a signal in response to a charge on a capacitor. In an embodiment, an apparatus includes a charging circuit and a determining circuit. The charging circuit is configured to generate a charge on a capacitor with a first current that is related to a signal having a characteristic, and the determining circuit is configured to determine the characteristic of the signal in response to the charge on the capacitor. For example, such an apparatus can determine an average of an input current to a power supply, or an average of an output current from a power source for the power supply, by mirroring the input current, charging a capacitor with the mirroring current, and determining the voltage across the charged capacitor.

Description

In response to electric charge on capacitor, determine the feature of signal

The cross reference of related application

The application is the continuity of a part in pending trial U.S. Patent application when being 13/001,050 of the application number submitted on March 14th, 2013; The priority of pending trial U.S. Provisional Patent Application when wherein the application requires the application number of submission on February 26th, 2013 to be 61/769,404; Aforementioned all applications are all incorporated herein by reference here.

Technical field

The present invention relates to determine in response to electric charge on capacitor the feature of signal.

Background technology

Electric charge is determined the characteristic aspect existing problems of signal in response to capacitor in the prior art.

Summary of the invention

In one embodiment, a kind of equipment, for example power-supply controller, comprises charging circuit and definite circuit.Charging circuit is configured for the first electric current of using with having the signal correction of a feature and produces the electric charge on capacitor, and definite Circnit Layout is for determining the feature of signal in response to electric charge on capacitor.

For example, an embodiment of this equipment, by by input current mirror image and to adopt image current be that capacitor charges, can determine the mean value of the input current of power supply, or for electric power supply the mean value from electric power outputting current.In order to determine the mean value of input current, capacitor is by input current in power switching effective integral on the time period, and current mirror and capacitor are designed so that the amplitude of voltage on whole capacitor approximates greatly the amplitude of average current input.In order to determine the mean value of electric power outputting current, power-supply controller adopts impedance to carry out effective filtering to the voltage on whole capacitor, and this impedance approximates greatly the impedance between power supply and power supply input node.

Accompanying drawing explanation

Fig. 1 is according to the schematic diagram of the electric power system of an embodiment, and this electric power system comprises power supply, receive from the supply of electric power of power supply energy and receive the load from supply of electric power energy.

Fig. 2 is according to the time chart of supply of electric power input current in Fig. 1 of an embodiment.

Fig. 3 is according to the schematic diagram of the electric power system of another embodiment, and this electric power system comprises power supply, receive from the supply of electric power of power supply energy and receive the load from supply of electric power energy.

Fig. 4 is according to the schematic diagram of Fig. 3 current mirror circuit of an embodiment.

Fig. 5 is according to the schematic diagram in an embodiment Fig. 3 stage, generates the average current output of presentation graphs 3 power supplys in this this stage.

Fig. 6 is according to the time chart of voltage on the whole integrating condenser of Fig. 3 of an embodiment, the wherein average current input of the supply of electric power of voltmeter diagram 3.

Fig. 7 A is according to the time chart of the input current of the supply of electric power of Fig. 3 of an embodiment.

Fig. 7 B is according to the time chart of the input current average value of Fig. 3 supply of electric power of an embodiment, and from the time chart of the output current mean value of Fig. 3 power supply.

Fig. 8 A is according to an embodiment, the time chart of the average output current when supply of electric power is operated in current limit mode from power supply to supply of electric power, and wherein current limit mode is used conventional art for determining the average current input of supply of electric power.

Fig. 8 B is according to an embodiment, the time chart of the average output current when supply of electric power is operated in current limit mode from power supply to supply of electric power, and wherein current limit mode is used technology described in Fig. 3-6 for determining the average current input of supply of electric power.

Fig. 9 represents according to an embodiment, the schematic diagram figure of supply of electric power or electric power system in merging Fig. 3.Embodiment

Fig. 1 is according to the schematic diagram of the electric power system 10 of an embodiment, and it comprises power supply 12, supply of electric power (being a step-down controller) 14 and load 16 here.Supply of electric power 14 is by the input voltage V from power supply 12 _inbe converted to a controlled output voltage V _out, it is load 16 power supplies.Wherein, as in described embodiment, supply of electric power 14 is step-down controller, thereby makes | V _out| <|V _in|; For example, V _in=5V and V _out=1.3V.

Power supply 12 can be configured to and comprise desirable DC voltage source 18 and internal impedance 20.Ideal voltage source 18 is configured to formation voltage V _sourceand provide output current I _source, and the resistance R of impedance 20 is complex values, although described impedance only has real impedance value R.Therefore, if R>0 and I _source>0, so due to the V of the pressure drop in whole impedance 20 _in<V _source.

Step-down controller supply of electric power 14 comprises input node 22, electrical power by-pass capacitor 24, on-off controller 26, high-side switch and lower switching transistor 28 and 30, filtering inductor 32 and filtering capacitor 34.

For the nonzero frequency signal on all input nodes, by-pass capacitor 24 is by 36 providing low impedance path to stop voltage oscillation and voltage ring at input node 22 earthward.

In response to V _outor in response to V _outrelevant feedback signal, on-off controller 26 is controlled the timing of transistor 28 and 30 switches, and its mode adopting is by V _outremain on reference voltage V _refon the voltage levvl of setting.

When controller 26 starts high-side transistor 28, high-side transistor 28 is coupling in inductor 32 on input node 22, thus electric current I _in(as follows together with Fig. 2 describe) flows into from input node, by transistor 28 and inductor (low side transistors 30 is idle, and high-side transistor work), and arrives filtering capacitor 34 and load 16, thereby inductor is charged.The appearance of the network forming due to source impedance 20 and by-pass capacitor 24, so I _inbe not equal to I _source.

When controller 26 starts low side transistors 30, low side transistors 30 is coupled to ground 36, like this electric current I by inductor 32 _de-energizefrom ground, flow into, by low side transistors and inductor (high-side transistor 28 is idle, and low side transistors work), and arrive filtering capacitor 34 and load 16, thereby inductor is discharged.As follows together with described in Fig. 2, thereby at controller 26, again start before high-side transistor 28 repeats the above-mentioned cycle electric current I _de-energizeconventionally can not decay to zero always.

Intermediate node 38 places between transistor, transistor 28 and 30 switch produce one two levels, are approximately V _inand the numeric class voltage of changing between ground.

But inductor 32 and capacitor 34 are at the effective filtering voltage of intermediate node 38, a thereby controlled DC output voltage V of generation _out.

In addition, load 16 can be any suitable load, for example microprocessor, microcontroller or memory.

Fig. 2 is the input current I according to Fig. 1 of an embodiment _intime chart.Input current I _incycle be T, equal 1/F, wherein F is the frequency at controller 26 switching transistors 28 and 30 places; Namely, F is the switching frequency of supply of electric power 14.In addition, at the T of time period T _onpart, electric current I _infrom I _valleylinear growth is to I _peak; T _onthe idle time period of low side transistors 30 corresponding to high-side transistor 28 work.In addition, at the T of time period T _offpart, I _inbe zero; T _offthe time period that low side transistors 30 is worked corresponding to high-side transistor 28 is idle.In addition, at T _oni during this time _de-energizebe zero, and at T _offduring this time from I _peaklinear attenuation is to I _valley; That is to say, work as I _induring non-zero, I _de-energizebe zero, and work as I _inwhile being zero, I _de-energizenon-zero.And the duty ratio D of supply of electric power 14 equals T _on/ T.

Referring to Fig. 1 and Fig. 2, described according to the operation of the electric power system 10 shown in Fig. 1 of an embodiment.

At moment t ₀place, controller 26 starts high-side transistors 28 and low side transistors 30 is not reruned that (first controller can make low side transistors not rerun, thereby prevent that ripping bar electric current (crow-bar current) from flowing through two transistors simultaneously), electric current I like this _infrom node 22, flow out, by high-side transistor and inductor 32, flow to capacitor 34 and load 16.Because the electric current by inductor can not change immediately, t ₀i constantly _invalue equals I _valley, t constantly namely ₀not long ago flow through the discharging current I of inductor 32 _de-energizethe value of (not illustrating in Fig. 2).

At moment t ₀with moment t ₁between T _onduring this time, electric current I _inlinear growth.Voltage V on inductor and representing by the following equation of the relation between the electric current I of inductor:

(1)V=L(dl／dt)

Thereby

(2)dl／dt=V／L

For electric power supply system 10, can suppose in time T _onduring this time, the voltage on high-side transistor 28 is negligible, and the voltage V on inductor 32 equals (V like this _in-V _out)/L, thereby:

(3)dI _in／dt=(V _in-V _out)／L

And because can suppose T _onv during this time _inand V _outfor constant, T so _oni during this time _ingrowth rate dI _in/ dt is also constant, like this I _inthe straight line that is constant according to slope 40 increases, and slope equals (V _in-V _out)/L.

At moment t ₁place, controller 26 starts low side transistors 30 and makes high-side transistor 28 do not rerun (first controller can make high-side transistor not rerun, thereby prevents that ripping bar electric current from flowing through two transistors), like this electric current I simultaneously _de-energizefrom ground, 36 flow out, and by low side transistors and inductor 32, flow to capacitor 34 and load 16.Because the electric current by inductor can not change immediately, t ₁i constantly _de-energizevalue equals I _peak, t constantly namely ₁not long ago flow through the input current I of inductor 32 _insize.

Further, at moment t ₁place, electric current I _indrop to rapidly zero, and remain zero until moment t ₂, at moment t ₂locate above-mentioned being cycled to repeat.Same, moment t ₁and t ₂between, I _de-energize(not illustrating in Fig. 2) linear attenuation, slope is (V _out(voltage of low side transistors 30 can be assumed to and ignore)/L, can suppose that like this inductor 32 is connected to V _outand between ground).

Still with reference to figure 1 and Fig. 2, design a plurality of alternative embodiments of electric power system 50.For example, supply of electric power 14 comprises one or more above-mentioned assemblies that there is no explanation, or can omit the assembly of one or more above-mentioned explanations.

In addition, in some applications, people perhaps wish to know the I of each of section T switching time _inmean value, i.e. I _{in_avg}, each switching time section T I _sourcemean value, i.e. I _{source_avg}, or each switching time section T I _{in_avg}and I _{source_avg}.For example, people wish to limit I _{in_avg}thereby prevent from damaging supply of electric power 14.Or people wish to limit I _{source_avg}thereby prevent from damaging power supply 12; For example, if power supply is battery, people wish to limit I so _{source_avg}thereby prevent the overheated or discharging in advance of power supply.

The interior I of a kind of definite section T switching time _{in_avg}method be to insert inductive reactance between node 22 and high-side transistor 28, thereby and this induced voltage carried out to low-pass filtering generate one and I _{in_avg}proportional resulting low-pass filtering voltage.

But there are some problems in this method.For example, inductive reactance can reduce the efficiency of supply of electric power 14 greatly, and the relative I of resulting low-pass filtering voltage _inand I _{in_avg}can there is serious delay; This delay can make control loop or for limiting I _{in_avg}other circuit become very slow, with reference to figure 6A, describe as follows.

The interior I of another kind of definite section T switching time _{in_avg}method be to use processor to calculate I according to following equation _{in_avg}.

(4) $I_{\mathrm{in}\_\mathrm{avg}}=\frac{1}{T}{\&Integral;}_0^T{I}_{\mathrm{in}}\mathrm{dt}$

For example,, for the I of Fig. 2 _in, by the I of equation (4) acquisition section T switching time _{in_avg}by equation below, provided:

(5)I _{in_avg}=T _on／T(I _valley+I _peak／2)

But a problem of the method is that it requires complicated circuit to measure for example Ivalley, I _peakand T _onthereby, according to equation (4) or equation (5), calculate I _{in_avg}.

Fig. 3 is the schematic diagram of electric power system 50, except power supply 12, supply of electric power 14 and load 16, also comprises and determines circuit 52, and this is determined that circuit 52 is arranged to according to embodiment and determines I _{in_avg}and I _{source_avg}, and identical Reference numeral is used for identifying electric power system 10 (Fig. 1) and 50 common parts; Therefore the total parts that described together with Fig. 1 and Fig. 2 in the above will no longer describe together with Fig. 3.

Determine that circuit 52 comprises current mirror 54, integrating condenser 56, sampling hold circuit 58, reset circuit 60 and stage 62, effectively configuration is determined in response to I _{in_avg}i _{source_avg}.

Current mirror 54 is from NMOS high-side transistor 28 receiving grid pole tension V _gwith source voltage V _s, and be configured to produce in response to V _gand V _selectric current I _{in_integrate}.According to following equation, I _{in_integrate}with I _inbetween scale factor be S:

(6)I _{in_integrate}≈S·I _in

S<<1 wherein, current mirror 54 is by V like this _inthe electric current I obtaining _mirrornegligible, and therefore can suppose when high-side transistor is worked I _infrom node 22, flow out, and bulk flow is crossed high-side transistor 28.For example, S approximates greatly 1 * 10 ^-6.

The electric current I that integrating condenser 56 receives from current mirror 54 _{in_integrate}and it is carried out to effective integral; Namely as described below, be stored in the quantity of electric charge on integrating condenser, and the magnitude of voltage on this capacitor and I _{in_avg}proportional or equate with it.For example, together with the explanation of Fig. 6, can at electric power system 50 each switch periods end voltage constantly, determine electric current I by whole integrating condenser 56 as follows _{in_avg}.

58 pairs of whole integrating condensers 56 of sampling hold circuit carry out voltage sample and maintenance constantly at the end of each switch periods, and after at this sampling hold circuit, this condenser voltage being sampled and keeping, 60 pairs of integrating condensers of reset circuit discharge, thereby make integrating condenser, are that next switch periods is ready.Sampling hold circuit 58 comprises sampling switch 70 (for example, transistor), buffer 72, keeps capacitor 74 and produces voltage V _{lin_avg}another buffer 76, voltage V _{lin_avg}represent I _{in_avg}.And reset circuit 60 comprises nmos pass transistor.

Stage 62 is arranged in response to voltage V _{lin_avg}by power supply 12, produce I _{source_avg}.For example, the following explanation together with Fig. 3 and Fig. 5-Fig. 7 B, the approximately uniform effective impedance of network impedance between employing and node 22 and ideal voltage source 18, stage 62 couples of V _{lin_avg}thereby carrying out effective filtering achieves the above object.

Before the operation of electric power system 50 is described, to determining that the theory after circuit 52 describes.

By the following equation of relation between the electric current I of capacitor C and the voltage V at capacitor C two ends:

(7)I=C(dV／dt)

And by equation (7), can derive following equation:

(8) $V=\frac{1}{C}\&Integral;\mathrm{Idt}$

Therefore, referring to figs. 2 and 3, and equation (6)-(8), the V on integrating condenser 56 _{lin_avg}and electric current I _inbetween pass be following equation:

(9) $V_{\mathrm{lin}\_\mathrm{avg}}=\frac{1}{C}{\&Integral;}_0^T{I}_{\mathrm{in}\_\mathrm{integraie}}\mathrm{dt}=\frac{1}{C}{\&Integral;}_0^T(I_{\mathrm{in}}\&CenterDot;S)\mathrm{dt}=\frac{S}{C}{\&Integral;}_0^T{I}_{\mathrm{in}}\mathrm{dt}$

And equation (9) produces following equation:

(10) $V_{\mathrm{lin}\_\mathrm{avg}}\&CenterDot;\frac{C}{S}={\&Integral;}_0^T{I}_{\mathrm{in}}\mathrm{dt}$

In addition, equation (4) produces following equation:

(11) ${T\&CenterDot;I}_{\mathrm{lin}\_\mathrm{avg}}\&CenterDot;\frac{C}{S}={\&Integral;}_0^T{I}_{\mathrm{in}}\mathrm{dt}$

Therefore, merge equation (10) and (11) and produce following equation:

(12) $V_{\mathrm{lin}\_\mathrm{avg}}\&CenterDot;\frac{C}{S}=T\&CenterDot;I_{\mathrm{in}\_\mathrm{avg}}$

Ignore every unit in equation (12), suppose V _{lin_avg}numerical value equal I _{in_avg}numerical value, therefore for integrating condenser 56, take the numerical value C that farad (Farad) is unit and generate following equation:

(13)C=|T·S|

(14)C=|(S)／F|

Therefore, if selected integrating condenser 56 capacitances in equation (13) or (14) are C, so at switch periods latter end constantly, the voltage V that appears on integrating condenser and exported by sampling hold circuit 58 _{lin_avg}size equal upper average current input I of same switch cycle _{in_avg}size.

Fig. 4 is according to the schematic diagram of the current mirror as shown in Figure 3 54 of an embodiment.

Current mirror 54 comprises NMOS induction transistor 64, PMOS load transistor 66 and high-gain amplifier 68.The channel width-over-length ratio of this NMOS induction transistor 64 equals the channel width-over-length ratio that scale factor S is multiplied by NMOS high-side transistor 28 in Fig. 3.In this example, as mentioned above, S<<1, although although S is less than and approaches very much 1 in other embodiment, or is more than or equal to 1.

Still with reference to figure 4, current mirror 54 operates as follows, thereby produces I by above-mentioned formula (6) _{in_integrate}.

Thereby the source voltage that 66 actings in conjunction of amplifier 68 and PMOS load transistor keep NMOS induction transistors 64 substantially with the source voltage V of the NMOS high-side transistor 28 of Fig. 3 _sidentical.In detail, amplifier 68 is controlled the grid voltage of transistors 66, thereby makes the voltage (that is, the source voltage of induction transistor 64) of anti-phase input Nodes be substantially equal to voltage (that is, the source voltage V of high-side transistor 28 of its noninverting Nodes _s).In addition, current mirror 54 also comprises other circuit, feedback compensation circuit for example, and it is inner or coupled at amplifier 68.

Because the grid voltage of transistor 28 and 64 is roughly the same, and because these identical transistorized source voltages are also approximate identical, these transistorized grid-source voltages are approximately equal also; Therefore, induction transistor 64 can obtain electric current I _{in_integrate}, by following equation, provided, identical with above-mentioned equation (6):

(15)I _{in_scale}≈S·I _in

Still with reference to figure 4, a plurality of alternative embodiments of design current mirror 54.For example, current mirror 54 comprises suitable current mirroring circuit topological structure arbitrarily.

Fig. 5 is according to the schematic diagram in the stage 62 shown in Fig. 3 of an embodiment.As mentioned above, the stage 62 is to voltage V _{in_avg}apply an impedance, this impedance is equal in Fig. 3 transistor 28, capacitor 24 and source resistance 20 to electric current I _inthe impedance applying.

Stage 62 comprises resistor 82 and 84, and capacitor 86.In operating process, voltage V _{in_avg}make electric current I ₁flow through resistor 82, electric current I ₂flow through resistor 84.Electric current I ₂for capacitor 84 is charged to voltage V _{source_avg}, the electric current I of the power supply 12 shown in itself and Fig. 3 _sourcemean value I _{source_avg}proportional.With above-mentioned generation V _{in_avg}illustrated mode is similar, can select resistor 82 and 84 and the numerical value of capacitor 86, ignores unit, | V _{source_avg}|=| I _{source_avg}|.

Fig. 6 is according to an embodiment, the voltage V at integrating condenser 56 two ends shown in Fig. 3 _{lin_avg}and the time chart of the output of the sampling hold circuit shown in Fig. 3 58.

Referring to Fig. 3 and Fig. 6, illustrate according to the operation of the electric power system 50 of an embodiment.Because the operation of supply of electric power 14 is with identical about the explanation of Fig. 1 and Fig. 2, only describe the operation of determiner 52 here in detail above.

Time t constantly ₀, controller 26 starts high-side transistor 28, thus input current I _instart to flow through high-side transistor, as above in conjunction with described in Fig. 1 and Fig. 2, and as mentioned above, I in this example _mirrorenough little, thus can suppose I _infrom node 22, flow through high-side transistor.

In response to electric current I _instart to flow through high-side transistor 28, current mirror 54 starts to generate I _{in_integrate}.

And I _{in_integrate}start charging, therefore produce the voltage at integrating condenser 56 two ends.

At moment t ₀and t ₁between the T of switch periods _onduring part, I _inlinear growth, as shown in Figure 2.

Therefore, due to I _{in_integrate}i _inmirror image, I so _{in_integrate}at moment t ₀and t ₁between also linear growth.

By formula (8), due to I _{in_integrate}linear growth, so the voltage V at capacitor 56 two ends _{in_avg}parabolic increases, i.e. V _{in_avg}waveform be parabola.

At moment t ₁place, controller 26 is not worked high-side transistor 28, like this I _incan drop to fast zero, as above in conjunction with described in Fig. 1 and Fig. 2.

Equally at moment t ₁, controller 26 is not worked current mirror 54, like this I _{in_integrate}also drop to fast zero.

Therefore, at moment t ₁place, the voltage V at integrating condenser 56 two ends _{lin_avg}reached zero growth, and remain on the horizontal V of an approximate constant _finalupper, this is because idle current mirror 54, the switch 70 of opening (open) and idle reset circuit 60 are applied to the high impedance on integrating condenser.

At moment t ₁and moment t ₃between certain is a bit upper, controller 26 closures (close) switch 70, thus by buffer 72, maintenance capacitor 74 is charged to an approximate voltage levels V _finalupper, this voltage levvl V _finalbe present on integrating condenser 56 two ends.

And, keeping capacitor 74 to be charged to approximate V _finalafter, controller 26 is opened switch 70.

Then, at moment t ₃, controller 26 starts the transistor of refresh circuit 60, thereby by integrating condenser 56 electric discharges, prepares the next switch periods of electric power system 50 in advance.

Fig. 7 A is according to an embodiment, the input current I of the input node 22 shown in Fig. 3 _intime chart, this input current I _inin response to the load current I that passes through load 16 shown in Fig. 3 _loadstep change.

Fig. 7 B is according to an embodiment, represents average current input I _{in_avg}v _{in_avg}time chart, and the average power supply electric current I of the power supply shown in presentation graphs 3 12 _{source_avg}v _{source_avg}time chart, in response to load current I _loadstep change.V _{in_avg}and V _{source_avg}all according to one-period, following one-period illustrates.

Referring to Fig. 3, Fig. 7 A and Fig. 7 B, the operation in the stage 62 of definite circuit 52 has been described according to an embodiment.

As mentioned above, the voltage V that produces of stage 62 _{source_avg}, its amplitude and phase place and I _{source_avg}amplitude and phase place proportional or approximately equal roughly.

At moment t ₀before, suppose that by-pass capacitor 24 is charged to V _in, this is because I _in=0, V _in=V _source.

Early than moment t ₀before or at moment t ₀place, load current I _loadgeneration step increases, and the network being formed by inductor 32 and capacitor 34 at least partly makes transient response time section T _translentelectric current flows through inductor to cause " jingle bell (ring) " during this time.

At moment t ₀, controller 26 starts high-side transistor 28, effectively this jingle bell is connected to node 22, and causes thus I _injingle bell, as shown in Figure 7 A.

Because the main impedance network being formed from internal impedance, by-pass capacitor 24 and the active transistor 28 of power supply 12 can be by ideal voltage source 18 effective " ", through correction or the filtering of this impedance network, I _sourceequal I _in, that is to say, can think I _infor the input of this network, I _sourceoutput for this network.

As mentioned above, in this embodiment, based on one-period, follow one-period, V _{lin_avg}amplitude be approximately equal to I _{in_avg}amplitude.

Therefore, if by V _{lin_arg}input filter, effective transfer function of this filter is identical with the network that interior resistor 20, by-pass capacitor 24 and active transistor 28 form, so the output V of this filter _{source_avg}amplitude and phase place and I _{source_avg}amplitude and phase approximation equate.

Result, stage 62 can comprise filter, and the network in fact forming with resistor 20, by-pass capacitor 24 and active transistor 28 is identical, or different on topological structure (or adopting digital form to realize), but effectively transfer function is identical with this network, so V _{source_avg}amplitude and I _{source_avg}amplitude proportional or approximately equal roughly, and V _{source_avg}phase place and I _{source_avg}phase approximation equate.Term " effectively " and " effectively " also cause electric current I in this expression stage 62 _inand I _{in_avg}and voltage V _{in_avg}; That is to say, the impedance in stage 62 is by voltage V _{in_avg}carry out filtering, the impedance that itself and source resistance 20, capacitor 24 and active transistor 28 form is equal to, but not identical, and the impedance that wherein source resistance 20, capacitor 24 and active transistor 28 form is to electric current I _incarry out filtering.

Referring to Fig. 3 and Fig. 6-7B, design the alternative embodiment of a plurality of power-supply systems 50.For example, supply of electric power 15 can be the switched power supply of any type, rather than step-down controller.In addition, determiner 52 can be by controlling except on-off controller 26, and can be placed in the circuit except supply of electric power.In addition, can produce integrating circuit I by any proper circuit the current mirror except Fig. 3 and Fig. 4 _{in_integrate}.In addition, can adopt software or firmware to realize V _{lin_avg}calculating, for example by instruction, carry out processor, or the combination of software, firmware and hardware or sub-combination.In addition, the stage 62 can realize in software or firmware, for example, by program, carry out processor, or the combination of software, firmware and hardware or sub-combination.In addition, above, illustrated current average determines that technology can be for determining the mean value of the signal except supply of electric power input current.For example, this technology can be for battery charger, thereby determines the mean charging current that flows to battery; Charger comprises a circuit, for determine restriction mean charging current according to this, thereby prevents from damaging battery.In addition, technology wherein or embodiment can be for determining a feature except mean value of other signal beyond electric current.In addition, one or more assemblies of supply of electric power 14 and determiner 52 can be placed on power supply control, and this controller can be an integrated circuit.In addition, one or more assemblies of supply of electric power 14 and determiner 52 can be placed in supply of electric power module.

Fig. 8 A is in response to I _{in_avg}fig. 1 of increasing of step shown in the average power supply electric current I of power supply 12 of electric power system 10 _{source_avg}time chart, wherein according to embodiment, electric power system is arranged to I _{source_avg}be limited to max-thresholds I _ltmit.

Fig. 8 B is in response to I _{in_avg}fig. 3 of increasing of step shown in the average power supply electric current I of power supply 12 of electric power system 50 _{source_avg}time chart, wherein according to embodiment, electric power system is arranged to I _{source_avg}be limited to I _limit.

In the example of following explanation, I _limit=2A.

Now together with Fig. 1, Fig. 3 and Fig. 7 B-8B, by electric power system 10 (Fig. 1) by I _{source_avg}be limited in I _limitability and electric power system 50 (Fig. 3) by I _{source_avg}be limited in I _limitability compare.For example, electric power system 10 and 50 can limit I _{source_avg}thereby prevent from damaging power supply 12 (for example, battery).Due to this current limit, and the circuit of carrying out this current limit is conventional, the detailed description of therefore omitting for simplicity this current limit and current limit circuit.

Due under stable state, I _{source_avg}=I _{in_avg}, electric power system, for example electric power system 10 or 50 is by monitoring and limit I _{in_avg}limit I _{source_avg}.

As above in conjunction with described in Fig. 1 and Fig. 2, in order to determine I _{in_avg}, electric power system 10 can comprise and I _insense resistor and the low pass filter of series connection, produce and I thereby this low pass filter carries out filtering to the voltage at sense resistor two ends _{in_avg}relevant filtering voltage.

But equally as above illustrate, this low pass filter can cause I _inand the delay between filtering voltage; That is to say, this filtering voltage can lag behind I _inactual mean value I _{in_avg}.

Referring to Fig. 8 A, if this filtering voltage is used for monitoring I _{in_avg}and restriction I _{in_avg}, therefore in response to the I monitoring _{in_avg}by I _{source_avg}be restricted to threshold limit I _limit, so when filtering voltage indicates I _{in_avg}surpassed I _limittime, limiting circuit can be by I _{in_avg}be restricted to I _limit, I _{source_avg}may surpass restriction.In this example, I _{source_avg}from I _{in_avg}the moment t0 of step while increase starting start to surpass I _limit=2A, until the limiting circuit of electric power system 10 finally can be by I _{source_avg}be restricted to I _limitmoment t ₁.That is to say t ₀and t ₁between time be exactly I _{in_avg}step increase beginning and electric power system 10 are by I _{source_avg}be restricted to I _limitbetween time of delay.

Unfortunately, this of the long enough between t0 and t1 makes enough large average power supply electric current I of time long enough numerical value time of delay _{source_avg}can damage power supply 12.

Comparatively speaking, referring to Fig. 7 B, due to the determiner 52 of electric power system 50 (Fig. 3) this time of delay not, represent so I _{in_avg}v _{lin_avg}can release and represent I _{source_avg}v _{source_avg}, just as I _{lin_avg}release I _{source_avg}

Therefore, referring to Fig. 8 B, as electric power system 50 (Fig. 3) monitoring V _{in_avg}and in response to V _{in_avg}equal or exceed I _limittime by V _{in_avg}be restricted to I _limit, electric power system 50 can be at I _{source_avg}surpass IL _imitbefore by I _{source_avg}be restricted to I _limit.

Refer again to Fig. 3-Fig. 7 B, consider to use V _{in_avg}rather than restriction I _in, I _{in_avg}or I _{source_avg}, and consider to use V _{source_avg}.

For example, if power supply 12 is exactly or comprises battery, electric power system 50 can be configured to by monitoring V so _{source_avg}monitor I _{source_avg}thereby, estimate the dump energy of battery, or need to change battery or by the remaining time before battery charging.When battery has known electric discharge profile (profile), this technology is particularly useful.

In another embodiment, electric power system 50 can be configured to by monitoring V _{source_avg}monitor I _{source_avg}, and in response to V _{source_avg}equal or exceed threshold value and limit or reduce I _{source_avg}.This with by Fig. 8 B restriction I _{source_avg}different, because this reduction can more slowly complete, or in response to the V that surpasses threshold value _{source_avg}(that is, V _{source_avg}a relatively long time period, surpass threshold value) low-pass filtered version.

In another embodiment, electric power system 50 can be configured to mode monitoring V routinely _in, by monitoring V _{source_avg}monitor I _{source_avg}, and in response to the V monitoring _inand V _{source_avg}, control I _{source_avg}thereby keep the voltage-to-current operation area of power supply 12 in safety.

In another embodiment, electric power system 50 can be configured to by monitoring V _{source_avg}monitor I _{source_avg}, and in response to monitored V _{source_avg}, control charging circuit and obtain highest security, otherwise allow as early as possible I _{source_avg}level, or the level of charging current, and can not surpass I _{source_avg}maximum constraints or the maximum constraints of charging current.This technology makes discharging and recharging of battery or miscellaneous equipment faster than other charger, and can not cause the damage of charging circuit or battery or miscellaneous equipment.

In addition, in above-mentioned at least some embodiment, by monitoring V _{in_avg}rather than by monitoring V _{source_avg}, or additionally monitor V _{source_avg}, electric power system 50 can obtain similar result.

Fig. 9 is according to the block diagram of the embodiment of the computer system 100 of an embodiment, electric power system 50 shown in Fig. 3 that it is integrated (or only supply of electric power 14).Although illustrated system 100 is a computer system, it can also be the system of any suitable embodiment in electric power system 50 (or being only supply of electric power 14).

System 100 comprises counting circuit 102, except the supply system 50 (or only supplying 14) of Fig. 3, also comprise processor 104, at least one input equipment 106, at least one output equipment 108 and at least one data storage device 110 by system (or only supply) power supply.

Except deal with data, processor 104 can also be programmed or other mode control system 50 (or only supplying 14).For example, by processor 104, carried out the multiple function of power supply control 26.

Input equipment (for example, keyboard, mouse) 106 allows to provide data, program and instruction to counting circuit 102.

Output equipment (for example, display, printer, loud speaker) 108 allows counting circuit 102 that operator is provided understandable data.

Data storage device (for example, flash memory, hard disk drive, RAM, optical drive) 110 allows to store for example program and data.

Although should be appreciated that from noted earlier its object of specific embodiment is here for explanation, can make multiple variation not departing from disclosed spirit and scope situation.In addition, although disclose a kind of distortion for specific embodiment, this distortion can also, for other embodiment, be pointed out even without specific.In addition, said modules can be placed on monolithic IC or multi-disc IC small pieces (die) are upper, thereby forms one or more IC, and these one or more IC can interconnect.In addition, assembly described herein or operation can be implemented/carry out on hardware, software and firmware, or wherein two or more combination arbitrarily in hardware, software and firmware.In addition, one or more assemblies of described device or system omit from specification, for clear succinct or other reason.In addition, being included in described equipment in specification or one or more assemblies of system can omit from equipment or system.

Claims (28)

1. a device, comprising:

Charging circuit, is configured for and adopts the first electric current to produce the electric charge on capacitor, described the first electric current and the characteristic signal correction of tool; And

Determine circuit, be configured in response to the electric charge on described capacitor, determine the feature of described signal.

2. device according to claim 1, further comprises described capacitor.

3. device according to claim 1, wherein said signal comprises supply of electric power input current.

4. device according to claim 1, wherein said signal comprises the electric current of power generation, described power supply provides electric energy to supply of electric power.

5. device according to claim 1, further comprises:

Wherein said signal comprises the second electric current; And

Mirror image circuit, is configured in response to the second electric current, produces the first electric current.

6. device according to claim 1, wherein said definite Circnit Layout is used for

In response to the voltage at described capacitor two ends, determine the feature of described signal.

7. device according to claim 1, further comprises:

Filter, is configured for the voltage in response to described capacitor two ends, produces filtering voltage; And

Wherein said definite Circnit Layout, in response to described filtering voltage, is determined the feature of described signal.

8. device according to claim 1, further comprises:

Filter, is configured for the voltage in response to described capacitor two ends, produces filtering voltage; And

Wherein said definite Circnit Layout, in response to described filtering voltage, is determined the feature of another signal.

9. device according to claim 1, wherein said definite Circnit Layout is for determining the amplitude of feature of the described signal of the amplitude that is approximately equal to described capacitor voltage at both ends.

10. device according to claim 1, wherein said feature comprises mean value.

11. 1 kinds of supplies of electric power, comprising:

Capacitor;

Charging circuit, is configured for and adopts the first electric current to produce the electric charge on described capacitor, described the first electric current and the characteristic signal correction of tool; And

Determine circuit, be configured in response to the electric charge on described capacitor, determine the feature of signal.

12. supplies of electric power according to claim 11, further comprise:

Wherein said signal comprises the second electric current; And

Inductor, is configured for described the second electric current of conduction.

13. supplies of electric power according to claim 11, further comprise:

Wherein said signal comprises the second electric current; And

Input node, is configured for and receives described the second electric current.

14. supplies of electric power according to claim 11, further comprise:

Wherein said signal comprises the second electric current; And

Input node, is configured for and receives the electric current relevant to described the second electric current.

15. supplies of electric power according to claim 11, further comprise:

Wherein said signal comprises input current;

Input node, is configured for reception from the source current of power supply and described input current is provided;

Filter, is configured for the voltage in response to described capacitor two ends, produces filtering voltage; And

Wherein said definite Circnit Layout, in response to described filtering voltage, is determined the feature of source current.

16. supplies of electric power according to claim 11, further comprise:

Wherein said signal comprises input current;

Input node, is configured for reception from the source current of power supply and described input current is provided;

Filter, is configured for the voltage in response to described capacitor two ends, produces filtering voltage; And

Wherein said definite Circnit Layout, in response to described filtering voltage, is determined the mean value of source current.

17. 1 kinds of systems, comprising:

Supply of electric power, it comprises:

Capacitor;

Charging circuit, is configured for and adopts the first electric current to produce the electric charge on described capacitor, described the first electric current and the characteristic signal correction of tool; And

Determine circuit, be configured in response to the electric charge on described capacitor, determine the feature of signal; And

Load, is connected with described supply of electric power.

18. systems according to claim 17, further comprise:

Wherein said supply of electric power comprises input node;

Wherein signal comprises the second electric current; And

Power supply, is configured for to described input node described the second electric current is provided.

19. systems according to claim 17, further comprise:

Wherein said supply of electric power comprises input node;

Wherein signal comprises the second electric current; And

Power supply, is configured for to described input node the 3rd electric current is provided, and described the 3rd electric current is relevant to described the second electric current.

20. systems according to claim 17, further comprise:

Wherein said supply of electric power comprises input node;

Wherein signal comprises the input current from input node;

Power supply, is configured for to described input node source current is provided;

Filter, is configured for the voltage in response to described capacitor two ends, produces filtering voltage; And

Wherein said definite Circnit Layout, in response to described filtering voltage, is determined the mean value of described source current.

21. systems according to claim 17, further comprise:

Wherein said supply of electric power comprises input node;

Wherein said signal comprises the input current from described input node;

Battery, is configured for to described input node source current is provided;

Filter, is configured for the terminal voltage in response to described capacitor two, produces filtering voltage; And

Wherein said definite Circnit Layout, in response to described filtering voltage, is determined the mean value of described source current.

22. systems according to claim 17, wherein said supply of electric power comprises step-down controller.

23. 1 kinds of methods, comprising:

Adopt the first electric current to produce the electric charge on capacitor, described the first electric current and the characteristic signal correction of tool; And

In response to the electric charge on described capacitor, determine the feature of signal.

24. methods according to claim 23, further comprise:

Wherein said signal comprises the second electric current; And

Described the second electric current is offered to supply of electric power.

25. methods according to claim 23, further comprise:

Wherein said signal comprises the second electric current; And

Adopt power supply to generate described the second electric current.

26. methods according to claim 23, further comprise:

Wherein said signal comprises supply of electric power input current;

In response to the source current from power supply, produce described supply of electric power input current;

In response to the voltage at described capacitor two ends, produce filtering voltage; And

In response to described filtering voltage, determine the mean value of source current.

27. methods according to claim 23, further comprise:

In response to the voltage at described capacitor two ends, determine the feature of signal.

28. 1 kinds of power supply controls, comprising:

Charging circuit, is configured for and adopts the first electric current to produce electric charge on capacitor, described the first electric current and the characteristic signal correction of tool; And

Determine circuit, be configured in response to the electric charge on described capacitor, determine the feature of signal.