CN104008005A - Apparatus, method and system for controlling processor - Google Patents
Apparatus, method and system for controlling processor Download PDFInfo
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- CN104008005A CN104008005A CN201410058002.6A CN201410058002A CN104008005A CN 104008005 A CN104008005 A CN 104008005A CN 201410058002 A CN201410058002 A CN 201410058002A CN 104008005 A CN104008005 A CN 104008005A
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- task
- repetition period
- priority
- processor
- many times
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
- G06F9/4887—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues involving deadlines, e.g. rate based, periodic
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- General Engineering & Computer Science (AREA)
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Abstract
The invention relates to an apparatus for controlling a processor. The apparatus comprises a first task (40012, 40014, 40022, 40023, 40024, 50013-50025, 60012-60024) having a first priority and a first repeated cycle; and a second task (40014-40026, 50017-50024, 60014-60026) having a second priority and a second repeated cycle. The second priority is lower than the first priority. The second repeated cycle is multiple times the first repeated cycle. The first task (40012, 40014, 40022, 40023, 40024, 50013-50025, 60012-60024) comprises an activating mechanism used for activating the second task (40014-40026, 50017-50024, 60014-60026). The invention also relates to a control mechanism (1201, 1202), a motor vehicle (100), a method, a system and a computer program product.
Description
Technical field
The present invention relates to for to processor, the especially polycaryon processor of the control gear of motor vehicle or device, the method and system that multiprocess system is controlled.
Background technology
Fig. 1 shows motor vehicle 100, and it has control gear (controller, electronic control unit Electronic Control Unit, ECU) 120
1, 120
2, described control gear is for controlling and/or regulate the assembly 110,140 of described motor vehicle 100.Motor controller (motor control unit Engine Control Unit, ECU) 120
2for example can be used in the operation process of vehicle motor 110 it is controlled and is regulated.Described motor controller 120
2the boost pressure of the temperature of air quality, motor and the environment that can be sucked by input parameter, for example per time unit and if desired turbosupercharger by means of control and regulation mechanism is determined output parameter, for example, for time for spraying, emitted dose and the time of ignition if desired of each cylinder of described vehicle motor 110.Control gear 120
1can regulate for the dynamic adjustments of travelling (Electronic Stability Program (ESP) Elektronisches Stabilit tsprogramm, ESP, electronic stability are controlled Electronic Stability Control, ESC) detent 140 of described motor vehicle 100.Described control gear 120
1, 120
2can pass through vehicle bus 130, for example Controller Area Network BUS (Controller Area Network Bus, CAN bus) or FlexRay at described control gear 120
1, 120
2between carry out exchanges data and be connected to each other.
Described control gear 120
1, 120
2comprise processor.This processor can comprise calculate core (single core processor, Single-Core-Processor).In addition described control gear 120,
1, 120
2can comprise storer and/or interface (Interface).Described storer for example can comprise operating system (Operating System, OS), application program (application software Application software, Software) and/or data for example input parameter, output parameter, function table and/or variable.By described interface, described control gear 120
1, 120
2for example can with described assembly exchange parameter, for example input and output parameter or with other control gears 120
1, 120
2carry out communication.
For can " simultaneously " or " concurrently ", that is to say to a certain extent simultaneously or process concurrently to a certain extent the multi-task (Task), described control gear 120 for example
1, 120
2calculation task or process, described operating system can be simulated concurrency (Concurrency).For this reason, in advance described application program is divided into a plurality of tasks of separating.At described control gear 120
1, 120
2in the process of operation, the process control system of described operating system (course control program, scheduler program) is managing described task and which kind of task when judgement carry out.For the control gear 120 for motor vehicle
1, 120
2, can in requirement of real time, use the strictly scheduler program based on priority (rate monotonic scheduling Rate Monotonic Scheduler, RMS) for task that can interrupt, periodic.In addition, as dispatching method, can use time-based method (earliest-deadline-first algorithm Earliest Deadline First, EDF), described time-based method is so made it and is determined, thereby observes deadline (Deadline).
Fig. 2 schematically shows a kind of exemplary time curve 20 according to the task of the ESP controller of prior art.Along the time shaft t of level, with the interval of for example 5ms, drawn t constantly
1to t
5.Along vertical priority axle P, with the priority reducing, drawn task 200 from the top down
1, 200
4, 200
5, 200
6, 200
7with 200
8and finally drawn idle process (Idle Task) 200
9.The conclusive exchange of predetermining and require and can realize data on current regulation technology is considered in the design of described priority and timeslice.At this, a task can be on the one hand for example as using Reference numeral 202
4with 202
9but such activation theing represent moved in other words and stopped, and on the other hand as for example using Reference numeral 204
4with 204
9represented such operation.If all tasks 200
1-200
8all stop, that just moves idle task 200 thus
9.Task can be as for example using Reference numeral 212
1with 212
4-212
8represented activates according to period planning (Time Table) or by interrupt routine (interrupt service routine Interrupt Service Routine, ISR) like that.Described activation for example, by timer (Timer), the timer functional block of described processor realizes.The task 200 of for example moving with the interval (of short duration) of 1ms
1be system task and do not rely on other tasks.The task 200 of for example moving with the interval of 5ms
4(x1) have than described system task 200
1lower priority.The task 200 of for example moving with the interval of 10ms
5(x2) depend on task 200
4(x1) and its repetition period be described task 200
4(x1) many times, for example 2 times of repetition period.The task 200 of for example moving with the interval of 20ms
6(x4) depend on task 200
5and its repetition period is described task 200
5many times of repetition period, for example 2 times and be also described task 200 thus
4many times, for example 4 times of repetition period.The task 200 of for example moving with the interval of 40ms
7(x8) depend on task 200
6and its repetition period is described task 200
6many times of repetition period, for example 2 times and be also described task 200 thus
4many times, for example 8 times of repetition period.The task 200 of for example moving with the interval of 120ms
8(x24) depend on described task 200
6and its repetition period is described task 200
7many times of repetition period, for example 3 times and be also described task 200 thus
4many times of repetition period, for example 24 times.The repetition period of a task is shorter, that is to say that its repetition rate is higher, just activates more continually this task.Said scheduler program assurance, the task with higher priority can not had the tasks interrupt of lower priority.About the exchanges data between the task of subordinate, on the one hand can be as for example using Reference numeral 222
4-5, 222
5-6, 222
6-7with 222
7-8represented gives a task with lower priority by the data transmission of a task like that, and on the other hand as for example using Reference numeral 224
5-4, 224
6-4with 224
6-5represented gives a task with higher priority by the data transmission of a task like that.At this, expire monitoring (Deadline Monitor) check of time limit, exists in time for being transferred to the data of task task, that have lower priority with higher priority.
As shown in Figure 2, by described timer, activate the multi-task simultaneously, and described scheduler program starts the operation of described task successively according to the priority of described task, make described operating system guarantee that described task is with desired order operation, first the task namely with the highest priority is moved.This process for single core processor is controlled to overlap and is used polycaryon processor, because the task that ought be activated is assigned to different core simultaneously, even a task in described task has in the time of need to having the also non-existent data of task of higher priority than the high priority of other tasks and task, and described being simultaneously activated of task is no longer successively operation but operation simultaneously.
DE 102 29 520 A1 disclose method and apparatus and the corresponding operating system for the process of vehicle is controlled, wherein said process by least one, control faster by task program and a slower task program, wherein described at least one in task program and described at least one slower task program, use at least one output parameter and it copied to another memory block from a memory block for this reason faster, wherein described at least one copy while copying for the output parameter of described at least one slower task program and/or in described at least one beginning of task program faster when task program finishes faster for described at least one output parameter of task program faster, if be correspondingly provided with such output parameter for these two task programs.
Summary of the invention
Therefore, task of the present invention is, is provided for processor, methods, devices and systems that especially polycaryon processor is controlled.
This task is resolved by the claim arranged side by side of enclosing, and especially by a kind of method, a kind of device and a kind of system, is resolved.
One aspect of the present invention relates to a kind of device for control processor, and this device comprises: have the first priority and the first task of the first repetition period 400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24and second task 400 with the second priority and the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26, wherein said the second priority is lower than described the first priority, and wherein said the second repetition period is many times of described the first repetition period, wherein said first task 400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24comprise for activate described the second task 400 according to described the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26activation mechanism.If described the second task comprise for example by described first task, provided, for example form is the information of the data data as input, if so (once) these Information Availabilities, just can implement activation.
By this aspect of the present invention and if desired other aspects be provided for processor, feasible program that especially polycaryon processor is controlled.Described system produces the activation of described task dominantly.At this, described system in other words scheduler program or timer for example activates first task by function call, and described first task for example activates second task with lower priority and/or lower repetition rate when it finishes by function call with corresponding interval.At this, described interval is corresponding to the described repetition rate ratio of repetition period in other words.The first task x1 for example,, with the first repetition period has the second task x2 of the second repetition period when often activating for the second time described in activation.Every task can both comprise corresponding counter mechanism.For this reason, described counter mechanism for example can take global variable and/or local variable, as static local variable.This second task can activate again the 3rd task with also lower preference and/or lower repetition rate.Activation for other tasks can correspondingly be carried out.At this, between described task, can exist the ratio of the identical or different integer of described repetition period.By described, by system of the present invention, also application scheme, computing machine, control gear, program etc. can be used polycaryon processor from single core processor cover.
Another aspect of the present invention relates to a kind of device, and wherein said first task comprises for being brought up to the raising mechanism of described the second repetition period described the first repetition period.
Another aspect of the present invention relates to a kind of device, and wherein said raising mechanism comprises for to described first task 400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24the counting mechanism counted of activation, for by counted activation and the described many times of comparison mechanisms that compare and the control gear for described activation mechanism is controlled.
Another aspect of the present invention relates to a kind of device, wherein for the first time, for the second time, for the third time, the 4th time, the 5th time or while having activated described first task more continually, activate for the first time described the second task.
Another aspect of the present invention relates to a kind of device, and wherein said many times is many times of integer.
Another aspect of the present invention relates to a kind of device, and wherein said processor comprises the first calculating core 312
1with the second calculating core 312
2, described first task 400
12-400
14; 500
13-500
18; 600
12-600
14be assigned to described first and calculate core 312
1, and described the second task 400
14-400
26; 500
17-500
24; 600
22-600
26be assigned to described second and calculate core 312
2.
Other aspects of the present invention relate to a kind of control gear 120
1, 120
2, described control gear comprises one of described device.
Other aspects of the present invention relate to a kind of motor vehicle 100, and this motor vehicle comprises described control gear 120
1, 120
2one of.
Other aspects of the present invention relate to a kind of method for control processor, and the method comprises providing to have the first priority and the first task of the first repetition period 400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24and provide second task 400 with the second priority and the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26, wherein said the second priority is lower than described the first priority, and wherein said the second repetition period is many times of described the first repetition period, wherein said first task 400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24comprise for activate described the second task 400 according to described the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26activation function.Described activation function on the different position of described first task, for example starting, central or arrange when finishing or carry out.If described the second task comprise for example by described first task, provided, for example form is the information of the data data as input, if so (once) these Information Availabilities, just can carry out described activation function.
Another aspect of the present invention relates to a kind of method, and wherein said first task comprises a kind of for the raising function that risen to described the second repetition period described the first repetition period function (Funktion) in other words.
Another aspect of the present invention relates to a kind of method, and wherein said raising function comprises for to described first task 400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24the counting function counted of activation, for by counted activation and the described many times of comparison functions that compare and the control function for described activation function is controlled.
Another aspect of the present invention relates to a kind of method, wherein for the first time, for the second time, for the third time, the 4th time, the 5th time or while activating described first task more continually, activate described the second task.
Another aspect of the present invention relates to a kind of method, and wherein said many times is many times of integer.
Another aspect of the present invention relates to a kind of method, and wherein said processor comprises the first calculating core 312
1with the second calculating core 312
2, described first task 400
12-400
14; 500
13-500
18; 600
12-600
14be assigned to described first and calculate core 312
1, and described the second task 400
14-400
26; 500
17-500
24; 600
22-600
26be assigned to described second and calculate core 312
2.
Other aspects of the present invention relate to a kind of system for control processor, and this system comprises one of method for control processor.
Other aspects of the present invention relate to a kind of computer program, and this computer program comprises: computer program, described computer program is stored in data carrier or is stored in computing machine 120
1, 120
2, in 30 storer and comprise computer-readable order, described order at it by described computing machine 120
1, 120
2, 30 be identified for carrying out one of described method while carrying out.
The dynamic adjusting system (Electronic Stability Program (ESP) ESP, electronic stability control ESC) that travels is a kind of computing machine, and this computing machine is controlled, regulated and monitor and develop and construct for the function of the detent 140 to motor vehicle 100.
Motor control system (motor controller, motor control unit ECU) is a kind of computing machine, and this computing machine is for for example, to described motor 110, the function of the combustion engine as petrol engine or diesel motor or motor is controlled, regulated and monitor and develops and construct.For example electronic diesel control system (EDC) regulates the spraying system of diesel motor.
Accompanying drawing explanation
In detailed description below, with reference to accompanying drawing, the feature of embodiments of the invention, advantage and embodiment are as an alternative described, in the accompanying drawings element like similar Reference numeral representation class.Accompanying drawing illustrates:
Fig. 1 is the motor vehicle with control gear;
Fig. 2 is according to the schematic diagram of a kind of exemplary time curve of the task of the ESP controller of prior art;
Fig. 3 is for controlling according to the schematic diagram of the system of a kind of processor preferred embodiment of the present invention;
Fig. 4 is according to a kind of exemplary time curve of the task of processor preferred embodiment described in of the present invention;
Fig. 5 is a kind of exemplary time curve according to the task of the processor of another embodiment of the invention; And
Fig. 6 is a kind of exemplary time curve according to the task of the processor of another embodiment of the invention.
Embodiment
Fig. 3 shows for the schematic diagram to the system 30 of controlling according to a kind of processor preferred embodiment of the present invention.Described system 30 comprises processor layer 310, operating system layer 320 and application layer 330.
Described processor layer 310 comprises processor.This processor can be single core processor (Single Core Processor), the processor (multi-threaded Central Processing Unit(CPU) for example with the primary processor of multithreading), or polycaryon processor (Multi-core Processor), dual core processor (Dual-core Processor) for example, three core processors (Triple-core Processor), four core processors (Quad-core Processor), six core processors (Hexa-core Processor), eight core processors (Octa-core Processor) or polycaryon processor (Many-core Processor).Described processor can comprise symmetrical identical calculating core or asymmetrical namely different calculating core, for example primary processor and the coprocessor (Co-processor) of that is to say.Described processor can be microprocessor or microcontroller, the processor namely with, two, three, four or more peripheral function functional blocks.As exemplarily delineated out in Fig. 3, described processor can comprise a plurality of calculating core 312
1312
n.As an alternative, described processor layer 310 can comprise a plurality of processors (multiprocess system).
Described operating system layer 320 comprises operating system, open system and the interface thereof for the electronic installation of motor vehicle as OSEK(for example) real time operating system, described OSEK for example has OSEK/VDX, FreeOSEK or openOSEK or AUTOSAR(AUTomotive Open System Architecture automobile open systems architecture).As exemplarily and simplifiedly illustrated in Fig. 3, described operating system comprise include process control system (course control program, scheduler program) 324 control system 322, such as be provided for interface, calculating, coding etc. routine library resource 326 and for example form be working time environment (Run Time Environment, RTE) with described calculating core 312
1312
nthe service organization being connected (Services) 328
1328
n.At this, can be a plurality of core or processor setting (common) scheduler program.As an alternative, can a scheduler program be set for each core or processor.
Described application layer 330 comprises application program (software).Described application program can comprise a plurality of functional blocks 332,334,336,338, for example function, routine library, program, parameter, form etc.Described application program in other words described functional block 332,334,336,338 is passed through described service organization 328
1328
nwith described calculating core 312
1312
nbe connected.
Described service organization 328 thus
1328
ncan be by means of described calculating core 312
1312
ndescribed process is processed.
Described system 30 can be by computing machine, for example, as the control gear for motor vehicle 100 (controller, motor controller, ESP controller) 120
1, 120
2the same control gear, the computing machine as working platform type computing machine (desk-top computer), portable computer (laptop computer, notebook computer, panel computer), the terminal device as telecommunication terminal equipment (mobile phone, smart mobile phone) are included.In order to control described processor, described scheduler program 324 for example regulates the temporal implementation status of (scheduling) a plurality of processes (task) by means of arbitrated logic.As already described, also can a scheduler program be set for each core or processor, make described scheduler program dispatch the temporal implementation status of described task.By means of priority scheduling (Priority Scheduling), the priority that has been each course allocation in a plurality of processes, and described scheduler program 324 correspondingly puts the executable process with the highest priority into practice.Described scheduler program 324 can be used rate monotonic scheduling (Rate Monotonic Scheduling as priority dispatching method for the periodic task that can interrupt, RMS), wherein according to the duration in cycle of task, determine statically described priority, the duration in cycle that is to say a task is shorter, and its priority is just higher.Described scheduler program 324 can guarantee the predictability for overdue monitoring of time limit and system performance thus.Said scheduler program guarantees, there is higher repetition rate namely the task of shorter repetition period can not there is lower repetition rate namely the task of longer repetition period interrupt.If there is activation repeatedly, that is to say that the task of an operation is repeatedly activated, can be interpreted as fault so if desired.
Described application program comprises a plurality of tasks 400
11, 400
12, 400
14, 400
22, 400
23, 400
24, 400
26, 500
11, 500
12, 500
13, 500
17, 500
18, 500
24, 500
25, 600
11, 600
12, 600
13, 600
14, 600
22, 600
23, 600
24with 600
26, wherein for every task, distributed a priority.Described task is managed and is put into practice by described scheduler program 324, wherein at different calculating core 312
1with 312
2the task 400 of moving above
11, 400
12, 400
14, 500
11, 500
12, 500
13, 500
17, 500
18, 600
11, 600
12, 600
13, 600
14or 400
22, 400
23, 400
24, 400
26, 500
24, 500
25, 600
22, 600
23, 600
24with 600
26can in situation independent of each other, be scheduled.Described scheduler program can interdependently be dispatched the task that a plurality of core is carried out above by the foundation of dependence targetedly thus.
Fig. 4 shows according to a kind of exemplary time curve (task layout) 40 of the task of processor preferred embodiment described in of the present invention.Time shaft t along level has drawn t constantly with the interval of for example 5ms
1to t
5.Along two vertical priority axle P
1and P
2, drawn from top to bottom described task 400
11, 400
12, 400
13, 400
14, 400
22, 400
23, 400
24with 400
26.Fig. 4 also shows the idle process (Idle Task) 400 moving with minimum priority respectively
19with 400
29.The conclusive exchange of predetermining and require and can realize data on current regulation technology is considered in the design of described priority and timeslice (Zeitscheibe).At this, a task on the one hand for example can be as using Reference numeral 402
26with 402
29but represented such activation do not moved or stops, and on the other hand as for example using Reference numeral 404
29represented such operation.If calculate core 312
1, 312
2all tasks 400
11-400
14in other words 400
22-400
26stop, moving so thus corresponding idle task 400
19in other words 400
29.Task on the one hand can be as for example using Reference numeral 412
11with 412
12represented activates according to period planning (Time Table) like that and can look like with Reference numeral 414 on the other hand
13represented is such for example, by interrupt routine (Interrupt Service Routine, ISR) FlexRay ISR activation.Described activation for example, by timer (Timer), the timer functional block realization of described processor.The described task 400 of for example moving with the interval (of short duration) of 1ms
11can be system task and do not rely on other tasks.The described task 400 of for example moving with the interval of 2.5ms
13can be FlexRay task and do not rely on other tasks.
The very first time sheet of the task of described subordinate (" task " (x1)) can have than described FlexRay task 400 thus
14high priority, and exceedingly do not hinder described FlexRay task 400 at this
14, described very first time sheet for example comprise in this embodiment with the interval operation of 5ms, have than described FlexRay task 400
13first subtask 400 of high (high, h) priority
12(x1h) and equally with the interval of 5ms, move and depend on described the first subtask 400
12, have than described FlexRay task 400
13second subtask 400 of low (low, l) priority
14(x1l).Described the second subtask 400
14reference numeral 416 for picture
12-14represented like that in described the first subtask 400
12during end, be activated and move.Described the first subtask 400
12no longer be activated.Described task 400
11, 400
12, 400
13with 400
14in described first, calculate core 312 as described above
1above.Described the second task 400 of for example moving with the interval of 10ms
22(x2) depend on described the second subtask 400
14and its repetition period is many times, for example 2 times of repetition period of described first task.Described the second task 400
22reference numeral 416 for picture
14-22represented like that when described first task finishes, for example, in its second subtask 400
14during end, be activated and move.Described (activate) the second subtask 400
14no longer be activated.The 3rd task 400 of for example moving with the interval of 20ms
23(x4) depend on described the second task 400
22and its repetition period is described the second task 400
14many times, for example 2 times and be also described first task 400 thus
14many times, for example 4 times of repetition period.Described the 3rd task 400
23reference numeral 416 for picture
22-23represented like that in described the second task 400
22during end, be activated and move.Described (activate) the second task 400
22no longer be activated.The 4th task 400 of for example moving with the interval of 40ms
24(x8) depend on described the 3rd task 400
23and its repetition period is described the 3rd task 400
23many times of repetition period, for example 2 times and be also described first task 400 thus
14many times, for example 8 times of repetition period.Described the 4th task 400
24reference numeral 416 for picture
23-24represented like that in described the 4th task 400
23during end, be activated and move.Described (activate) the 3rd task 400
23no longer be activated.In addition the 5th task 400 of for example moving with the interval of 120ms,
26(x24) depend on described the 4th task 400
24and its repetition period is described the 4th task 400
24many times of repetition period, for example 3 times and be also described first task 400 thus
14many times, for example 24 times of repetition period.Described the 5th task 400
26reference numeral 416 for picture
24-25represented like that in described the 5th task 400
24during end, be activated and move.Described (activation) the 4th task 400
24no longer be activated.The described second to the 5th task 400
22, 400
23, 400
24with 400
26in described second, calculate core 312 as described above
2above.Due to described the second task 400
22operation once again, wherein the priority of this second task is higher than described the 5th task 400
26priority, thereby described the 5th task 400
26operate in constantly and be interrupted after t3, that is to say described the 5th task 400
26reference numeral 402 for picture
26but represented is activated and does not move like that, so that described the second task 400
22can move.Described application program can comprise the task that other are studied no longer in more detail here.
Contrary with the task of fragmentary task, for example interrupt enable, studying of task, especially the task of subordinate (x1 ..., x24) time synchronized, that is to say that they are activated and the repetition period (inverse of repetition rate) is moved in other words with repetition rate given in advance.The described repetition period is each other many times.Repetition period by the first task (x1) (timeslice) of exemplary duration in cycle of the described 5ms of having sets out, described the second task (x2) has the exemplary duration in cycle of 5 ms x2=10 ms, described the 3rd task (x4=2x2) has the exemplary duration in cycle of 5 ms x4=20 ms, described the 4th task (x8=2x2x2) has the exemplary duration in cycle of 5 ms x8=40 ms, and described the 5th task (x24=2x2x2x3) has the exemplary duration in cycle of 5 ms x24=120 ms.Correspondingly, every task is not when finishing (termination) at every turn but with described many times of corresponding intervals and activate or rather back to back have lower priority and the task of many times given in advance in the situation that not relying on corresponding calculating core, wherein said task is moved on corresponding calculating core.The task as already described, with the highest priority that is to say described first task its first subtask 400 in other words
12can be by described operating system, for example by means of the timer that can realize with hardware or software, activate.For improve the described repetition period in other words by shorter cycle produce the mechanism in longer cycle can be for example for described first task (x1) utilize following exemplary or similarly pseudo-program order realize, wherein when task described in initial activation (x1), just activated described the second task (x2):
Activate a task _ x1 ()
! When calling for the first time, be that counter produces
! Static variable and carry out initialization with numerical value-1
Static task _ x1_ counter=-1;
! Counter has been improved to 1: call for the first time: 0; Call for the second time: 1; ...
Task _ x1_ counter ++;
! Order for task _ x1
…
! Test:
! The step-by-step of unessential data bit and logic
! Call for the first time: 0 → false → activate a task _ x2 not;
! Call for the second time: 1 → true → activate a task _ x2; ...
(if 0==task _ x1_ counter & 1)
Activate a task _ 2 ();
! End task _ x1
Terminated task ();
}
}。
Another kind of for improve the mechanism of described repetition period can be for example for described first task (x1) utilize following exemplary or similarly pseudo-program order realize, wherein only when activating described task (x1) for the second time, just activate described the second task (x2):
Activate a task _ x1 ()
! When calling for the first time, be that counter produces
! Static variable and carry out initialization with numerical value 0
Static task _ x1_ counter=0;
! Counter has been improved to 1: call for the first time: 1; Call for the second time: 2; ...
Task _ x1_ counter ++;
! Order for task _ x1
…
! Test:
! The step-by-step of unessential data bit and logic
! Call for the first time: 1 → true → activate a task _ x2; ...
! Call for the second time: 2 → false → activate a task _ x2 not;
(if 0==task _ x1_ counter & 1)
Activate a task _ 2 ();
! End task _ x1
Terminated task ();
}
In described mechanism and described another kind of mechanism, with the interval of the secondary activating of described first task, activate described the second task.Other repetition periods in other words interval, for example 3,4,5,6,7,8,9,10 or more repetition period or interval can be similarly or other modes realize.For example can in described test, expression formula (0==task _ x1_ counter & 1) be changed to expression formula (0==task _ x1_ counter %2).
In addition, can will mix use with the dominant activation of being undertaken by the task in described system 30 by the recessive activation that described timer carries out in other words of described operating system.
Fig. 5 shows a kind of exemplary time curve 50 according to the task of the processor of this different embodiment of the present invention.Time shaft t along level has drawn moment t1 to t5 with the interval of for example 5ms.Along two vertical priority axle P1 and P2, drawn from top to bottom described task.Task (x1) 500
11, (x2) 500
12, (x4) 500
13, (x32) 500
17(x64) 500
18be assigned to described first and calculate core 312
1, and task (x8) 500
24(x16) 500
25be assigned to described second and calculate core 312
2.Here, only in the situation that crossing over described calculating core, that is to say when needing by a mission-enabling of task is assigned to another and calculates core, by described task, realize dominant activation.Described task (x1) 500 then
11, (x2) 500
12, (x4) 500
13just as using Reference numeral 512
11, 512
12, 512
13represented like that by described operating system in other words described timer activate.Thus, described scheduler program 324 guarantees, first can activate and move the task (x1) 500 with limit priority
11, can activate and move described task (x2) 500 subsequently
12and then can activate and move described task (x4) 500
13.In task (x4) 500
13during end, as using Reference numeral 516
13-24represented such described task (x8) 500 that activates
24.In task (x4) 500
13during end, as using Reference numeral 516
13-25the represented described task (x16) 500 that also can activate like that if desired
25.Here, that is to say for described second and calculate core 312
2, described scheduler program 324 guarantees described in first can activating and move, to have the task (x8) 500 of higher priority
24and then could activate and move described task (x16) 500
25.In task (x16) 500
25during end, as using Reference numeral 516
25-17represented such described task (x32) 500 that activates
17.In task (x16) 500
25during end, as using Reference numeral 516
25-18the represented described task (x64) 500 that also can activate like that if desired
18.But, once exist all results that the next item down required by task wants data in other words, namely as described, when calling of a task finishes or if desired the centre in for example calling before this of task, just can carry out the activation of described the next item down task.
In addition, can be in described system 30 the time limit for offering monitoring (Deadline Monitor) that expires.
Fig. 6 shows a kind of exemplary time curve 60 according to the task of the processor of described another kind of embodiment of the present invention.Time shaft t along level has drawn moment t1 to t5 with the interval of for example 5ms.Along two vertical priority axle P1 and P2, drawn from top to bottom described task.Task 600
11, (x1h) 600
12, 600
13, (x1l) 600
14be assigned to described first and calculate core 312
1, and task (x2) 600
22, (x4) 600
23, (x8) 600
24(x24) 500
26be assigned to described second and calculate core 312
2.As described with reference to Fig. 4, the described task 600 of for example moving with the interval (of short duration) of 1ms
11system task, and the described task 600 of for example moving with the interval of 2.5ms
13it can be FlexRay task.Thus the first task (x1) in the task of described subordinate can as described with reference to Fig. 4, have than as described in FlexRay task 600
14high priority, and exceedingly do not hinder described FlexRay task 600 at this
14, described first task (x1) for example comprise in this embodiment with the interval operation of 5ms, have than described FlexRay task 600
13the first subtask 600 of the priority of high (high, h)
12(x1h) and equally with the interval operation of 5ms, depend on described the first subtask 600
12, have than described FlexRay task 600
13the second subtask 600 of the priority of low (low, l)
14(x1l).In addition, Fig. 6 also shows the idle task 600 of correspondingly moving with lowest priority
19with 600
29.
The deadline picture of a task is for example used Reference numeral 620
14to 620
26represented is such general given in advance by its repetition period.At this, described deadline can (slightly) be shorter than the corresponding repetition period.In order correspondingly to read by task, for example task (x1) with higher priority the data that produce and provide by the task with lower priority, for example task (x2), described in must finishing, there is the task (task (x2)) of lower priority when thering is the task (task (x1)) of higher priority described in again activating.Can carry out deadline monitoring by described task (x1) now., when described task (x1) starts, check for this reason, whether have the data of all next needed attached tasks.
A kind of for mechanism that described deadline is monitored can be for example for described first task (x1) utilize following exemplary or similarly pseudo-program order realize:
Activate a task _ x1 ()
! When calling for the first time, be that counter produces
! Static variable and carry out initialization with numerical value-1
Static task _ x1_ counter=-1;
! Counter has been improved to 1: call for the first time: 0; Call for the second time: 1; ...
Task _ x1_ counter ++;
! Corresponding test:
! The step-by-step of unessential data bit and logic
! With
! Task also will be moved
(if 0==task _ x1_ counter & 1) & &
(task status (task _ x2)==just at fortune row ∣, prepare))
Task _ mistake ();
If ((0==task _ x1_ counter
! Order for task _ x1
…
! Test: the step-by-step of unessential data bit and logic
! Call for the first time: 0 → false → activate a task _ x2 not;
! Call for the second time: 1 → true → activate a task _ x2; ...
(if 0==task _ x1_ counter & 1)
Activate a task _ 2 ();
! End task _ x1
Terminated task ();
}
At this, function: task status (TaskState) (task names TaskName) provides the have title current state of task of " task names (TaskName) ", and this does not rely on function: activate a task _ x1 () (Activate Task_x1 ()) and task status () (TaskState ()) and task (x1) ... which is assigned to and calculates core.
Claims (14)
1. for the device of control processor, comprising:
-there is the first priority and the first task of the first repetition period (400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24), and
-there is the second task (400 of the second priority and the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26), wherein said the second priority is lower than described the first priority, and wherein said the second repetition period is many times of described the first repetition period,
Wherein
-described first task (400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24) comprise for activate described the second task (400 according to described the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26) activation mechanism.
2. by device claimed in claim 1, wherein said first task comprises:
-for being risen to the raising mechanism of described the second repetition period described the first repetition period.
3. by device claimed in claim 2, wherein said raising mechanism comprises:
-for to described first task (400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24) the counting mechanism counted of activation,
-for by counted activation and the described many times of comparison mechanisms that compare, and
-for controlling the described control gear that activates mechanism.
4. by the device described in any one in claim 1 to 3, wherein:
-described many times is many times of integer.
5. by the device described in any one in claim 1 to 4, wherein:
-described processor comprises the first calculating core 312
1with the second calculating core 312
2,
-described first task (400
12-400
14; 500
13-500
18; 600
12-600
14) be assigned to described first and calculate core 312
1, and
-described the second task (400
14-400
26; 500
17-500
24; 600
22-600
26) be assigned to described second and calculate core 312
2.
6. control gear (120
1, 120
2), comprising:
-by the device described in any one in claim 1-5.
7. motor vehicle (100), comprising:
-by control gear (120 claimed in claim 6
1, 120
2).
8. for the method for control processor, comprising:
-provide to there is the first priority and the first task of the first repetition period (400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24), and
-second task (400 with the second priority and the second repetition period is provided
14-400
26; 500
17-500
24; 600
14-600
26), wherein said the second priority is lower than described the first priority, and wherein said the second repetition period is many times of described the first repetition period,
Wherein
-described first task (400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24) comprise for activate described the second task (400 according to described the second repetition period
14-400
26; 500
17-500
24; 600
14-600
26) activation function.
9. by method claimed in claim 8, wherein said first task comprises:
-for being risen to the raising function of described the second repetition period described the first repetition period.
10. by method claimed in claim 9, wherein said raising function comprises:
-for to described first task (400
12, 400
14, 400
22, 400
23, 400
24; 500
13-500
25; 600
12-600
24) the counting function counted of activation,
-for by counted activation and the described many times of comparison functions that compare, and
-for controlling the control function of described activation function.
11. by the method described in any one in claim 8 to 10, and wherein said many times is many times of integer.
12. by the method described in any one in claim 8 to 11, wherein:
-described processor comprises the first calculating core 312
1with the second calculating core 312
2,
-described first task (400
12-400
14; 500
13-500
18; 600
12-600
14) be assigned to described first and calculate core 312
1, and
-described the second task (400
14-400
26; 500
17-500
24; 600
22-600
26) be assigned to described second and calculate core 312
2.
13. systems for control processor, comprising:
-by the method for control processor described in any one in claim 8-12.
14. computer programs, comprising:
-computer program, described computer program is stored in data carrier or is stored in computing machine (120
1, 120
2, 30) storer in and comprise computer-readable order, described order at it by described computing machine (120
1, 120
2, 30) be identified for carrying out by the method described in any one in claim 8-12 while carrying out.
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| DE201310202774 DE102013202774A1 (en) | 2013-02-20 | 2013-02-20 | Apparatus for controlling processor of motor vehicle, has primary task that is provided with activating unit for activating secondary task according to secondary repetition period which is multiple of primary repetition period |
| DE102013202774.5 | 2013-02-20 |
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| FR3085770B1 (en) * | 2018-09-11 | 2020-08-07 | Continental Automotive France | PROCESS FOR DETECTION OF A STAIN DISAPPEARANCE |
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| CN104008005B (en) | 2020-08-11 |
| DE102013202774A1 (en) | 2014-08-21 |
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