CN103997208A - Circuit and method for controlling direct-current BUS voltages in inverter - Google Patents
Circuit and method for controlling direct-current BUS voltages in inverter Download PDFInfo
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- CN103997208A CN103997208A CN201410250607.5A CN201410250607A CN103997208A CN 103997208 A CN103997208 A CN 103997208A CN 201410250607 A CN201410250607 A CN 201410250607A CN 103997208 A CN103997208 A CN 103997208A
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Abstract
The invention discloses a circuit for controlling direct-current BUS voltages in an inverter. The circuit comprises a current sampling module, a BUS voltage regulating module and a BUS capacitor. The output end of the current sampling module is connected with the input end of the BUS voltage regulating module, and the output end of the BUS voltage regulating module is connected with the BUS capacitor. The current sampling module is used for acquiring the output currents of the inverter. The BUS voltage regulating module is used for controlling the voltage value of the BUS capacitor according to the output current value of the inverter, and when the output currents of the inverter are higher than a preset current value, the voltages of the BUS capacitor are controlled to be reduced. When the output currents of the inverter are lower than the preset current value, the voltages of the BUS capacitor are controlled to be increased. The invention further discloses a method for controlling the direct-current BUS voltages in the inverter. The reactive power of the inverter can be reduced, and the power level of a DC-DC convertor is lowered.
Description
Technical field
The present invention relates to inverter field, particularly relate to a kind of for the voltage-controlled circuit of inverter DC B US and method.
Background technology
As shown in Figure 1, be the main circuit framework of inverter in prior art.When DC-AC is transformed to full-bridge inverting topological structure, the voltage of DC B US is the direct voltage of stable 380V.The load connecing when the 220Vac output rear class of inverter is when holding resistive load, compare with pure resistive load, under same active power loading condition, while holding resistive load, have a large amount of reactive powers, cause instantaneous active power very large, and instantaneous very large power can be embodied on the DC-DC converter of prime.Therefore when deisgn product, DC-DC converter need to design the power grade of large several multiples, and difficulty and the cost of design cost promote greatly, also cannot meet the design concept of the miniaturization of product simultaneously.As shown in Figure 2, oscillographic 3 passages are that inverter load is the voltage waveform while holding resistive load, and 2 passages are current waveform, and the half period that t1-t4 is inverter is 10mS; The t2-t3 time period is the time span that has output current, is 2.8mS.The active power of calculating whole half wave cycles is 3.3KW, and the effective value electric current in whole half wave cycles is 24.7A; But the current effective value of t2-t3 in the time period reached 24.7*10/2.8=88.2A.That is to say there is being the t2-t3 of output current in the time period, the real output of inverter has reached 88.2A*230V=20.3KW, for the 20.3/3.3=6.1 of active power doubly.After this power is added the loss of converter, at t2-t3, be constantly embodied on the DC-DC converter of prime.Due to the different qualities of inverter load, an inverter that power grade is 5000VA/4000W, it is 20.3KW that the power grade of DC-DC conversion but needs, and causes the design difficulty of DC-DC converter and cost greatly to increase.
Summary of the invention
Technical problem to be solved by this invention is: provide a kind of for the voltage-controlled circuit of inverter DC B US, this circuit can reduce DC-DC inverter power grade in inverter.
In order to solve the problems of the technologies described above, the technical solution used in the present invention is:
For the voltage-controlled circuit of inverter DC B US, comprise current sample module, BUS voltage regulator module and BUS electric capacity;
The output of described current sample module is connected in the input of BUS voltage regulator module, and the output of BUS voltage regulator module is connected in BUS electric capacity;
Described current sample module is for obtaining the output current of inverter;
Described BUS voltage regulator module, for control BUS capacitance voltage value according to the output current value of described inverter, when inverter output current is greater than default current value, is controlled BUS capacitance voltage and is reduced; When inverter output current is less than default current value, controls BUS capacitance voltage and raise.
Another technical scheme provided by the invention is:
For the voltage-controlled method of inverter DC B US, comprise step:
Obtain the output current of inverter;
Judge described output current and default current value and default current value magnitude relationship,
When described output current is greater than described high current value, controls BUS capacitance voltage and reduce; When described output current is less than described low current value, controls BUS capacitance voltage and raise.
Beneficial effect of the present invention is: be different from prior art, the voltage of the DC-DC converter of inverter is stablized constant, the present invention gathers the output current of inverter by current sample module, and adjust BUS capacitance voltage by the adjustment of BUS voltage regulator module, when output current is less, control BUS capacitance voltage value and raise, make DC-DC converter provide energy toward BUS capacitor charging; When output current is larger, control BUS magnitude of voltage and reduce, make BUS electric capacity by the needed energy of the most of rear class DC-AC converter of discharging compensation, thereby reduced the reactive power of inverter, reduced the power grade requirement of DC-DC converter.
Accompanying drawing explanation
Fig. 1 is the main circuit block diagram of inverter in prior art;
Fig. 2 is inverter output current wave figure in the prior art detecting by oscilloscope;
Fig. 3 is for the circuit diagram of the voltage-controlled circuit of inverter DC B US in an embodiment of the present invention;
Fig. 4 is for the circuit diagram of the voltage-controlled circuit of inverter DC B US in an embodiment of the present invention;
Fig. 5 is for the flowchart of the voltage-controlled method of inverter DC B US in an embodiment of the present invention;
Fig. 6 is the circuit connecting relation figure of BUS electric capacity and DC-DC converter in an embodiment of the present invention;
Main label declaration:
10-current sample module; 20-BUS voltage regulator module; 30-BUS electric capacity.
Embodiment
By describing technology contents of the present invention, structural feature in detail, being realized object and effect, below in conjunction with execution mode and coordinate accompanying drawing to be explained in detail.
The design of most critical of the present invention is: the voltage of adjusting BUS electric capacity 30 by BUS voltage regulator module 20, make the power of DC-DC converter be distributed in uniformly each moment in the cycle, thereby reduced the reactive power of inverter, reduced the power grade requirement of DC-DC converter.
The explanation of noun involved in the present invention
BUS electric capacity: dc-link capacitance, is connected between DC-DC converter DC-AC converter, as the electric capacity of energy storage device;
DC-DC converter: DC-DC converter, converts direct voltage to the circuit structure of another one direct voltage;
DC-AC converter: direct-current-alternating-current converter, by the circuit structure of converting direct-current voltage into alternating-current voltage;
Refer to Fig. 3, a kind of for the voltage-controlled circuit of inverter DC B US, comprise current sample module 10, BUS voltage regulator module 20 and BUS electric capacity 30;
The output of described current sample module 10 is connected in the input of BUS voltage regulator module 20, and the output of BUS voltage regulator module 20 is connected in BUS electric capacity 30;
Described current sample module 10 is for obtaining the output current of inverter;
Described BUS voltage regulator module 20, for control BUS electric capacity 30 magnitudes of voltage according to the output current value of described inverter, when inverter output current is greater than default current value, is controlled BUS electric capacity 30 lower voltages; When inverter output current is less than default current value, controls BUS electric capacity 30 voltages and raise.
Refer to Fig. 6, in the present embodiment, described BUS electric capacity 30 is connected in parallel with DC-DC converter, and by adjusting, the voltage of BUS electric capacity 30 can be realized DC-DC converter and BUS electric capacity 30 carries out charge or discharge each other.
Wherein, described BUS voltage regulator module 20 comprises BUS voltage reference control circuit U1 and PWM controller; The input of described BUS voltage reference control circuit is connected with the output of described processor, and the output of BUS voltage reference control circuit is connected with the input of PWM controller, and the output of PWM controller is connected with BUS electric capacity 30.
The test side of described current sample module 10 is arranged at the ac output end of inverter, and current sample module 10 obtains different voltage signal DSP_VERF according to the size of inverter output current.BUS voltage reference control circuit compares voltage signal DSP_VERF and default reference voltage 5V-REV, the reference voltage BUS_REF of controlled BUS electric capacity 30 voltages.
Wherein, in the present embodiment, described BUS voltage reference control circuit U1 is subtracter, and BUS voltage reference control circuit subtracts each other voltage signal DSP_VERF and reference voltage 5V-REV, obtains reference voltage BUS_REF.In other embodiments, described BUS voltage reference control circuit can have for single-chip microcomputer etc. the process chip of certain comparison operation function.
PWM controller, according to the control signal of described BUS_REF reference voltage output different duty, is controlled the magnitude of voltage on BUS electric capacity 30.When inverter output current is compared with hour (being less than default current value), the DSP_VERF magnitude of voltage that current sample module 10 obtains is less, therefore, the reference voltage BUS_REF of the BUS electric capacity 30 obtaining is larger, now PWM controller is controlled the 30 voltages risings of BUS electric capacity, and DC-DC converter charges on BUS electric capacity 30; When inverter output current is larger, the DSP_VERF magnitude of voltage that current sample module 10 obtains is larger, obtain BUS reference voltage BUS_REF less, now PWM controller is controlled BUS electric capacity 30 lower voltages, BUS electric capacity 30 provides most of energy by self-discharge toward DC-AC converter, and DC-DC converter provides fraction energy.
From foregoing description, beneficial effect of the present invention is: the present invention utilizes the little magnitude of voltage size of controlling greatly on BUS electric capacity 30 of the current value of inverter output, and when making inverter current less, DC-DC converter is toward 30 chargings of BUS electric capacity; When inverter output current is larger, BUS electric capacity 30 self-discharge compensation energy, reach the object that reduces the required power grade of DC-DC converter thus.
Refer to Fig. 4, in one embodiment, between described BUS voltage reference control circuit U1 and PWM controller, be also provided with voltage error feedback circuit U2, voltage error feedback circuit calculates the error signal of BUS voltage and reference voltage, be used for controlling BUS magnitude of voltage, and add feedback element, the stability of keeping system.
Further, in the present embodiment, described current sample module 10 comprises Hall element and processor, and the output of described Hall element is connected in the input of processor, and the output of processor is connected in described BUS voltage regulator module 20.Hall element gathers the output current of inverter, and the output current signal collecting is delivered to processor, and processor provides different voltage signal DSP_VERF after carrying out computing according to the size of output current.
In the present embodiment, described Hall element can be sent to the output current signal collecting the processor of inverter, after the size of the output current receiving being carried out to computing by the processor of inverter, provides different voltage signal DSP_VERF.Wherein, the processor of described inverter can be selected dsp chip.In other execution mode, described processor can be selected other conventional digital processing units.
Refer to Fig. 5, the present invention also discloses a kind of for the voltage-controlled method of inverter DC B US, comprises step:
Obtain the output current of inverter;
Judge described output current and default current value and default current value magnitude relationship, when described output current is greater than described high current value, control BUS electric capacity 30 lower voltages; When described output current is less than described low current value, controls BUS electric capacity 30 voltages and raise.
Further, the concrete grammar of described " obtaining the output current of inverter " is: the output current that obtains inverter by Hall element and processor;
Wherein, the output of described Hall element is connected in the input of processor, and the output of processor is connected in described BUS voltage regulator module 20.
Below in conjunction with accompanying drawing and instantiation, the present invention is described in detail.
This example is to be output as 220V/50Hz, and rated power is 5000VA, and the inverter that maximum power is 0.8 is that example is illustrated.The capacitance of the BUS electric capacity 30 of inverter is that 4 820uF/450V electrochemical capacitors are in parallel, and its total capacitance is 820*4=3280uF.When the load of inverter is resistive load, power factor is 1, and now output current maximum is (5000*0.8/220) * 1.414=25.7A, and maximum output current appears at crest and the trough place of output voltage.
Because maximum output current value is 25.7A, when the output current that selection collects when Hall element is in the present example less than 20A (described default current value is 20A), DSP_VREF magnitude of voltage in processor control chart 4 is 0V, the reference voltage BUS_REF=5V_REF-DSP_VREF=5V-0V=5V of BUS electric capacity 30 voltages now, by the feedback proportional resistance of BUS capacitance voltage is set, make when BUS_REF=5V, the magnitude of voltage of BUS electric capacity 30 is 390V.
The discharge energy that BUS electric capacity 30 is set can meet 80% loading demand, has
Wherein, C=3280uF; u
high=390V; p
out=5000VA*0.8=4000W; T=1/100Hz=10mS;
Can be calculated u
low=364V.
When needs are controlled BUS voltage and are 364V, BUS_REF voltage should be 5*364/390=4.67V.Now DSP_VREF voltage should be controlled as 5V-4.67V=0.33V.That is to say, when processor detects inverter output current and is greater than 20A, control DSP_VREF voltage and become fast 0.33V, now the voltage of BUS electric capacity 30 is set to 364V, therefore originally for the BUS electric capacity 30 of 390V voltage starts electric discharge, toward DC-AC conversion, provide energy; When output current being detected and be less than 20A, control DSP_VREF voltage and by 0.33V before, reduce to 0V lentamente, with the slope of 0.33V/7mS, decline.Now BUS voltage is risen to 390V by control, and DC-DC converter is toward BUS electric capacity 30 makeup energy.
Because inverter regulation needs to meet the ratio of the 3:1 peak value of exporting effective value electric current.Test finds, when output effective value electric current is peak current 1/3 time, power factor is about 0.7 left and right.Waveform as shown in Figure 1.Effective value electric current is now 5000VA*0.7/220=16A; Peak current is 3*16=48A, and continuing there is the time of output current is 3mS left and right.
With reference to figure 2, within the time of t2-t3, power output is 240V*48A=11520W; Effect due to BUS voltage reference circuit, the moment before output current is greater than 20A, BUS voltage is controlled as 390V, after being greater than 20A, the benchmark BUS_REF of BUS voltage is controlled to 4.67V, the most of load energy of t2-t3 in the time provided by 30 electric discharges of BUS electric capacity, and DC-DC converter only need provide fraction energy.When output current is less than 20A again, the benchmark BUS_REF of BUS voltage is controlled from 4.67V rises to 5V, rise time is 7mS according to the property settings of inverter output voltage, within the time of 7mS, DC-DC converter slowly charges to 390V toward BUS electric capacity 30, to limit the power of DC-DC converter.Because set point is 20A, so the maximum instantaneous power of DC-DC converter is about 20A*240V=4800W.That is to say that the maximum design power of DC-DC converter only needs 4800W when the maximum instantaneous power of inverter output is 11520W, power grade declines one times, has greatly saved components and parts cost and the volume of DC-DC converter.
In sum, the reactive power that can reduce inverter for the voltage-controlled circuit of inverter DC B US and method provided by the invention, reduce the power grade requirement of DC-DC converter in inverter, greatly saved components and parts cost and the volume of DC-DC converter.
The foregoing is only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or conversion of equivalent flow process that utilizes specification of the present invention and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.
Claims (7)
1. for the voltage-controlled circuit of inverter DC B US, it is characterized in that, comprise current sample module, BUS voltage regulator module and BUS electric capacity;
The output of described current sample module is connected in the input of BUS voltage regulator module, and the output of BUS voltage regulator module is connected in BUS electric capacity;
Described current sample module is for obtaining the output current of inverter;
Described BUS voltage regulator module, for control BUS capacitance voltage value according to the output current value of described inverter, when inverter output current is greater than default current value, is controlled BUS capacitance voltage and is reduced; When inverter output current is less than described default current value, controls BUS capacitance voltage and raise.
2. according to claim 1ly for the voltage-controlled circuit of inverter DC B US, it is characterized in that, described current sample module comprises Hall element and processor;
The output of described Hall element is connected in the input of processor, and the output of processor is connected in described BUS voltage regulator module.
3. according to claim 2ly for the voltage-controlled circuit of inverter DC B US, it is characterized in that, described processor is dsp chip.
4. according to claim 2ly for the voltage-controlled circuit of inverter DC B US, it is characterized in that, described BUS voltage regulator module comprises BUS voltage reference control circuit and PWM controller;
The input of described BUS voltage reference control circuit is connected with the output of described processor, and the output of BUS voltage reference control circuit is connected with the input of PWM controller, and the output of PWM controller is connected with BUS electric capacity.
5. described for the voltage-controlled circuit of inverter DC B US according to described in claim 3 or 4, is characterized in that, described BUS voltage reference control circuit is subtracter.
6. for the voltage-controlled method of inverter DC B US, it is characterized in that, comprise step:
Obtain the output current of inverter;
Judge described output current and default current value and default current value magnitude relationship,
When described output current is greater than described high current value, controls BUS capacitance voltage and reduce; When described output current is less than described low current value, controls BUS capacitance voltage and raise.
7. according to claim 6ly for the voltage-controlled method of inverter DC B US, it is characterized in that, the concrete grammar of described " obtaining the output current of inverter " is: the output current that obtains inverter by Hall element and processor;
Wherein, the output of described Hall element is connected in the input of processor, and the output of processor is connected in described BUS voltage regulator module.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107561346A (en) * | 2017-07-27 | 2018-01-09 | 佛山市新光宏锐电源设备有限公司 | A kind of method of rapid detection three-phase mains electric voltage exception |
WO2023024984A1 (en) * | 2021-08-26 | 2023-03-02 | Oppo广东移动通信有限公司 | Current control circuit, electrical energy supply apparatus and related product |
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CN203984241U (en) * | 2014-06-06 | 2014-12-03 | 深圳市英可瑞科技开发有限公司 | A kind of for the voltage-controlled circuit of inverter DC B US |
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CN1193715A (en) * | 1997-03-19 | 1998-09-23 | 株式会社日立制作所 | Air conditioning system and power converter apparatus for the same |
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WO2023024984A1 (en) * | 2021-08-26 | 2023-03-02 | Oppo广东移动通信有限公司 | Current control circuit, electrical energy supply apparatus and related product |
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Application publication date: 20140820 |