CN103997069A - UPS parallel system and counter synchronizing signal receiving method thereof - Google Patents

UPS parallel system and counter synchronizing signal receiving method thereof Download PDF

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CN103997069A
CN103997069A CN201310052245.4A CN201310052245A CN103997069A CN 103997069 A CN103997069 A CN 103997069A CN 201310052245 A CN201310052245 A CN 201310052245A CN 103997069 A CN103997069 A CN 103997069A
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ups
port
self
receiving
synchronisation signal
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CN103997069B (en
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王丛
沈宝山
卢军
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Vertiv Corp
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Liebert Corp
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Abstract

The invention discloses a UPS parallel system and a counter synchronizing signal receiving method thereof. The UPS parallel system includes a plurality of UPSs connected in parallel; a first receiving port of each UPS is connected with a first sending port of itself, and is connected with a first sending port of each of other UPSs; a first judging port of each UPS is connected with a first sending port of itself, and is connected with a first sending port of each of other UPSs; a second receiving port of each UPS is connected with a second sending port of itself, and is connected with a second sending port of each of other UPSs; and a second judging port of each US is connected with a second sending port of itself, and is connected with a second sending port of each of other UPSs. By adoption of the UPS parallel system and the counter synchronizing signal receiving method which are provided by the invention, high-frequency circular current between the UPSs connected in parallel can be reduced.

Description

UPS parallel system and counter synchronisation signal acceptance method thereof
Technical field
The present invention relates to control technology field, relate in particular to a kind of UPS parallel system and counter synchronisation signal acceptance method thereof.
Background technology
UPS(Uninterruptible Power Supply; uninterrupted power supply) refer in the time that abnormal or power-off occur alternating current input power supplying (custom is called civil power); can also continue to power to the load; and can ensure power supply quality; make the impregnable device of load supplying, can ensure the reliability of power supply.In the occasion of power supply reliability being had relatively high expectations at some, conventionally can adopt the mode of multiple UPS parallel connections further to improve power supply reliability.
In a UPS, mainly comprise control unit, rectification unit and inversion unit etc., wherein, the conducting of controllable devices or turn-off the moment in the count value control inversion unit of the copped wave counter by control unit.But, in actual applications, owing to being difficult to ensure that the power-on time of multiple UPS in parallel is identical, therefore the count value that is also difficult to ensure copped wave counter in the control unit of multiple UPS in parallel is identical, the conducting or the shutoff that are controllable devices in inversion unit are difficult to realize synchronous, make the out-put supply of multiple UPS in parallel inconsistent, cause producing high frequency circulation between UPS, affect the electrical stability that supplies of UPS parallel system.
Summary of the invention
The embodiment of the present invention provides a kind of UPS parallel system and counter synchronisation signal acceptance method thereof, in order to reduce the high frequency circulation between UPS in parallel.
The embodiment of the present invention provides a kind of UPS parallel system, comprising:
Multiple UPS in parallel;
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
The first receiving port of each UPS in described multiple UPS is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively; Each UPS receives described counter synchronisation signal by the first receiving port of self, is used to indicate UPS the count value of copped wave counter is updated to preset value;
First of each UPS in described multiple UPS judges that port is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively;
The second receiving port of each UPS in described multiple UPS is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS judges that by self first port is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, be used to indicate UPS the count value of copped wave counter is updated to preset value, and start judge port count pick up device synchronizing signal and judge processing by self second, and time-out pass through the first receiving port count pick up device synchronizing signal of self;
Second of each UPS in described multiple UPS judges that port is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS judges that by self second port, in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, gives the alarm.
The embodiment of the present invention provides a kind of counter synchronisation signal acceptance method of above-mentioned uninterrupted power supply UPS parallel system, comprising:
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
Each UPS receives described counter synchronisation signal by the first receiving port of self, is used to indicate UPS the count value of copped wave counter is updated to preset value;
When UPS judges that by self first port is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, be used to indicate UPS the count value of copped wave counter is updated to preset value, and start judge port count pick up device synchronizing signal and judge processing by self second, and time-out pass through the first receiving port count pick up device synchronizing signal of self.
The embodiment of the present invention also provides a kind of UPS parallel system, comprising:
Multiple UPS in parallel;
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
The first receiving port of each UPS in described multiple UPS is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively; Each UPS receives described counter synchronisation signal by the first receiving port of self; When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS; When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, and suspends by the first receiving port count pick up device synchronizing signal of self;
The second receiving port of each UPS in described multiple UPS is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS by self the second receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS; When UPS by self the second receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, give the alarm.
The embodiment of the present invention also provides a kind of counter synchronisation signal acceptance method of above-mentioned uninterrupted power supply UPS parallel system, comprising:
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
Each UPS receives described counter synchronisation signal by the first receiving port of self;
When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, and suspends by the first receiving port count pick up device synchronizing signal of self.
The UPS parallel system that the embodiment of the present invention provides, one of multiple UPS in parallel can be used as main equipment transmitting counter synchronizing signal, each UPS all receives this counter synchronisation signal, the count value of copped wave counter is separately updated to preset value simultaneously, thereby can realize the state synchronized of controllable devices in the inversion unit of multiple UPS in parallel, and then improve the consistency of the out-put supply of multiple UPS in parallel, reduce the high frequency circulation between UPS, and, system is provided with the counter synchronisation signal path of redundancy, each road counter synchronisation signal path is by a transmit port of each UPS, a receiving port and a circuit formation judging between port and each port, when a UPS judges that by self first port is in the upper Preset Time once receiving after normal counter synchronisation signal, while again not receiving normal counter synchronisation signal, switch the port of this UPS count pick up device synchronizing signal, by another road counter synchronisation signal path count pick up device synchronizing signal, therefore can further improve for electrical stability.
Brief description of the drawings
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, is used from explanation the present invention with the embodiment of the present invention one, is not construed as limiting the invention.In the accompanying drawings:
One of structure chart of the UPS parallel system that Fig. 1 provides for the embodiment of the present invention;
One of flow chart of the counter synchronisation signal acceptance method of the UPS parallel system that Fig. 2 provides for the embodiment of the present invention;
The structure chart of the UPS parallel system that Fig. 3 provides for the embodiment of the present invention 1;
The structure chart of the UPS parallel system that Fig. 4 provides for the embodiment of the present invention 2;
Two of the structure chart of the UPS parallel system that Fig. 5 provides for the embodiment of the present invention;
Two of the flow chart of the counter synchronisation signal acceptance method of the UPS parallel system that Fig. 6 provides for the embodiment of the present invention;
The structure chart of the UPS parallel system that Fig. 7 provides for the embodiment of the present invention 3.
Embodiment
In order to provide the implementation that can reduce high frequency circulation between UPS in parallel, the embodiment of the present invention provides a kind of UPS parallel system and counter synchronisation signal acceptance method thereof, below in conjunction with Figure of description, the preferred embodiments of the present invention are described, be to be understood that, preferred embodiment described herein only, for description and interpretation the present invention, is not intended to limit the present invention.And in the situation that not conflicting, the feature in embodiment and embodiment in the application can combine mutually.
The embodiment of the present invention provides a kind of UPS parallel system, as shown in Figure 1, comprises multiple UPS(UPS1, UPS2......UPSn in parallel), Vi is ups power input, Vo is ups power output, wherein:
The the first receiving port R11 of each UPS in the plurality of UPS is connected with the first transmit port T11 of self, and is connected with the first transmit port T11 of other each UPS respectively; First of each UPS in the plurality of UPS judges that port J11 is connected with the first transmit port T11 of self, and is connected with the first transmit port T11 of other each UPS respectively; The the second receiving port R12 of each UPS in the plurality of UPS is connected with the second transmit port T12 of self, and is connected with the second transmit port T12 of other each UPS respectively; Second of each UPS in the plurality of UPS judges that port J12 is connected with the second transmit port T12 of self, and is connected with the second transmit port T12 of other each UPS respectively.
Further, this first receiving port R11 and this second receiving port R12 can be enhancement mode pulse width modulation synchronization pulse input EPWMSYNCI port.
Further, this first transmit port T11 and this second transmit port T12 can be enhancement mode pulse width modulation EPWM port; This first judges that port J11 and this second judge that port J12 can be that universal input is exported GPIO port.
Further, this first transmit port T11 and this second transmit port T12 can be also universal input output GPIO port; This first judges that port J11 and this second judge that port J12 can be also enhancement mode seizure ECAP port.
The embodiment of the present invention also provides the counter synchronisation signal acceptance method of the UPS parallel system shown in a kind of Fig. 1, as shown in Figure 2, comprising:
One of step 201, the plurality of UPS are by self the first transmit port T11 and the second transmit port T12 transmitting counter synchronizing signal simultaneously;
Step 202, each UPS receive this counter synchronisation signal by the first receiving port R11 of self, be used to indicate UPS the count value of copped wave counter is updated to preset value;
Step 203, judge that by self first port J11 is in the upper Preset Time once receiving after correct counter synchronisation signal as UPS, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port R12 count pick up device synchronizing signal of self, be used to indicate UPS the count value of copped wave counter is updated to preset value, and start judge port J12 count pick up device synchronizing signal and judge processing by self second, and time-out pass through the first receiving port R11 count pick up device synchronizing signal of self.
Further, when UPS judges that by self second port J12, in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, gives the alarm.
Below taking two UPS parallel connections as example, above-mentioned UPS parallel system provided by the invention and counter synchronisation signal acceptance method thereof are elaborated with specific embodiment.
Embodiment 1:
Figure 3 shows that the structure chart of the UPS parallel system that the embodiment of the present invention 1 provides, specifically comprise UPS1 and UPS2, each UPS comprises that respectively two transmit ports, two receiving ports and two judge port, and Vi is ups power input, Vo is ups power output, wherein:
The first receiving port R311 of UPS1 is connected with the first transmit port T311 of self, and is connected with the first transmit port T321 of UPS2; First of UPS1 judges that port J311 is connected with the first transmit port T311 of self, and is connected with the first transmit port T321 of UPS2; The second receiving port R312 of UPS1 is connected with the second transmit port T312 of self, and is connected with the second transmit port T322 of UPS2; Second of UPS1 judges that port J312 is connected with the second transmit port T312 of self, and is connected with the second transmit port T322 of UPS2.Accordingly, the first receiving port R321 of UPS2 is connected with the first transmit port T321 of self, and is connected with the first transmit port T311 of UPS1; First of UPS2 judges that port J321 is connected with the first transmit port T321 of self, and is connected with the first transmit port T311 of UPS1; The second receiving port R322 of UPS2 is connected with the second transmit port T322 of self, and is connected with the second transmit port T312 of UPS1; Second of UPS2 judges that port J322 is connected with the second transmit port T322 of self, and is connected with the second transmit port T312 of UPS1.
The UPS parallel system providing in order to further illustrate the embodiment of the present invention 1, is described in detail its operation principle below.
Any one in UPS1 and UPS2 all can be used as main equipment transmitting counter synchronizing signal, in the present embodiment, by UPS1 as periodically transmitting counter synchronizing signal of main equipment.System powers in running, and UPS1 is by self the first transmit port T311 and the second transmit port T312 transmitting counter synchronizing signal simultaneously.
UPS1 is by the first receiving port R311 count pick up device synchronizing signal of self, and UPS2, by the first receiving port R321 count pick up device synchronizing signal of self, is updated to preset value by the count value of the copped wave counter of self simultaneously.
Simultaneously, UPS1 judges also count pick up device synchronizing signal of port J311 by self first, UPS1 judges by self first and judges whether port J311, in the upper Preset Time once receiving after correct counter synchronisation signal, receives correct counter synchronisation signal again; UPS2 judges also count pick up device synchronizing signal of port J321 by self first, UPS2 judges by self first and judges whether port J321, in the upper Preset Time once receiving after correct counter synchronisation signal, receives correct counter synchronisation signal again.
Wherein, judge that the whether correct concrete mode of counter synchronisation signal receiving can be for to judge whether counter synchronisation signal exists the upset of signal in predetermined period.
In the time that UPS1 judges that by self first port J311 has received the counter synchronisation signal of a upset that has signal in predetermined period in the upper Preset Time once receiving after correct counter synchronisation signal, determine that UPS1 judges that by self first port J311, in the upper Preset Time once receiving after correct counter synchronisation signal, receives correct counter synchronisation signal again; When judging port J311 by self first, UPS1 in the upper Preset Time once receiving after correct counter synchronisation signal, receives a counter synchronisation signal that does not have the upset of signal in predetermined period, or while not receiving counter synchronisation signal, determine that UPS1 judges that by self first port J311, in the upper Preset Time once receiving after correct counter synchronisation signal, does not receive correct counter synchronisation signal again.
Equally, UPS2 also adopts aforesaid way to judge by self first to judge whether port J321 again receives correct counter synchronisation signal in the upper Preset Time once receiving after correct counter synchronisation signal.
When a UPS determines while judging that by self first port again receives correct counter synchronisation signal in the upper Preset Time once receiving after correct counter synchronisation signal, this UPS continues by the first receiving port count pick up device synchronizing signal of self, and continue to judge by self first and judge whether port, in the upper Preset Time once receiving after correct counter synchronisation signal, receives correct counter synchronisation signal again, when a UPS determines while judging that by self first port does not again receive correct counter synchronisation signal in the upper Preset Time once receiving after correct counter synchronisation signal, this UPS suspends by the first receiving port count pick up device synchronizing signal of self, start by the second receiving port count pick up device synchronizing signal of self, and startup judges port count pick up device synchronizing signal by self second, judge by self second and judge that port is in the upper Preset Time once receiving after correct counter synchronisation signal, whether again receive correct counter synchronisation signal.
For example, when determining, UPS2 judges that by self first port J321 is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, UPS2 just suspends the first receiving port R321 count pick up device synchronizing signal by self, start by the second receiving port R322 count pick up device synchronizing signal of self, and startup judges port J322 count pick up device synchronizing signal by self second, judge by self second and judge that port J322 is in the upper Preset Time once receiving after correct counter synchronisation signal, whether again receive correct counter synchronisation signal.
When UPS2 judges that by self second port J322, in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, can give the alarm, there is power supply risk in prompting user.
Visible, the UPS parallel system and the counter synchronisation signal acceptance method thereof that adopt the embodiment of the present invention to provide, the equal count pick up device of each UPS synchronizing signal, the count value of copped wave counter is separately updated to preset value simultaneously, thereby can realize the state synchronized of controllable devices in the inversion unit of multiple UPS in parallel, and then improve the consistency of the out-put supply of multiple UPS in parallel, reduce the high frequency circulation between UPS, and, system is provided with the counter synchronisation signal path of redundancy, can improve for electrical stability.
For the confession electrical stability of the UPS parallel system that further the raising embodiment of the present invention 1 provides, can also adopt the UPS parallel system shown in following embodiment 2.
Embodiment 2:
The structure chart that Figure 4 shows that the UPS parallel system that the embodiment of the present invention 2 provides, specifically comprises UPS1 and UPS2, and each UPS comprises that respectively n transmit port, a n receiving port and n judge port, n is greater than 2, Vi is ups power input, and Vo is ups power output, wherein:
The first receiving port R411 of UPS1 is connected with the first transmit port T411 of self, and is connected with the first transmit port T421 of UPS2; First of UPS1 judges that port J411 is connected with the first transmit port T411 of self, and is connected with the first transmit port T421 of UPS2; The second receiving port R412 of UPS1 is connected with the second transmit port T412 of self, and is connected with the second transmit port T422 of UPS2; Second of UPS1 judges that port J412 is connected with the second transmit port T412 of self, and is connected with the second transmit port T422 of UPS2 ... the n receiving port of UPS1 is connected with the n transmit port of self, and is connected with the n transmit port of UPS2; The n of UPS1 judges that port is connected with the n transmit port of self, and is connected with the n transmit port of UPS2.Accordingly, the first receiving port R421 of UPS2 is connected with the first transmit port T421 of self, and is connected with the first transmit port T411 of UPS1; First of UPS2 judges that port J421 is connected with the first transmit port T421 of self, and is connected with the first transmit port T411 of UPS1; The second receiving port R422 of UPS2 is connected with the second transmit port T422 of self, and is connected with the second transmit port T412 of UPS1; Second of UPS2 judges that port J422 is connected with the second transmit port T422 of self, and is connected with the second transmit port T412 of UPS1 ... the n receiving port of UPS2 is connected with the n transmit port of self, and is connected with the n transmit port of UPS1; The n of UPS2 judges that port is connected with the n transmit port of self, and is connected with the n transmit port of UPS1.
The operation principle of the UPS parallel system that the operation principle of the UPS parallel system that the present embodiment 2 provides and above-described embodiment 1 provide is similar, the quantity of counter synchronisation signal path has been provided on the basis of the UPS parallel system providing at above-described embodiment 1, when a UPS judges that by self second port is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, can suspend the second receiving port count pick up device synchronizing signal by self, start by the 3rd receiving port count pick up device synchronizing signal of self, and startup is judged port count pick up device synchronizing signal and is judged processing by self the 3rd.Therefore, can further improve for electrical stability.
The embodiment of the present invention also provides a kind of UPS parallel system, as shown in Figure 5, comprises multiple UPS(UPS1, UPS2 in parallel ... UPSn), Vi is ups power input, and Vo is ups power output, wherein:
The the first receiving port R51 of each UPS in the plurality of UPS is connected with the first transmit port T51 of self, and is connected with the first transmit port T51 of other each UPS respectively;
The the second receiving port R52 of each UPS in the plurality of UPS is connected with the second transmit port T52 of self, and is connected with the second transmit port T52 of other each UPS respectively.
The embodiment of the present invention also provides the counter synchronisation signal acceptance method of the UPS parallel system shown in a kind of Fig. 5, as shown in Figure 6, comprising:
One of step 601, the plurality of UPS are by self the first transmit port T51 and the second transmit port T52 transmitting counter synchronizing signal simultaneously;
Step 602, each UPS receive this counter synchronisation signal by the first receiving port R51 of self;
Step 603, when UPS by self the first receiving port R51 in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port R52 count pick up device synchronizing signal of self, and suspends by the first receiving port R51 count pick up device synchronizing signal of self.
Further, when UPS by self the first receiving port R51 in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS;
Further, when UPS by self the second receiving port R52 in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS; When UPS by self the second receiving port R52 in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, give the alarm.
Below taking two UPS parallel connections as example, above-mentioned UPS parallel system provided by the invention and counter synchronisation signal acceptance method thereof are elaborated with specific embodiment.
Embodiment 3:
The structure chart that Figure 7 shows that the UPS parallel system that the embodiment of the present invention 3 provides, specifically comprises UPS1 and UPS2, and each UPS comprises respectively two transmit ports and two receiving ports, and Vi is ups power input, and Vo is ups power output, wherein:
The first receiving port R711 of UPS1 is connected with the first transmit port T711 of self, and is connected with the first transmit port T721 of UPS2; The second receiving port R712 of UPS1 is connected with the second transmit port T712 of self, and is connected with the second transmit port T722 of UPS2.Accordingly, the first receiving port R721 of UPS2 is connected with the first transmit port T721 of self, and is connected with the first transmit port T711 of UPS1; The second receiving port R722 of UPS2 is connected with the second transmit port T722 of self, and is connected with the second transmit port T712 of UPS1.
The UPS parallel system providing in order to further illustrate the embodiment of the present invention 3, is described in detail its operation principle below.
Any one in UPS1 and UPS2 all can be used as main equipment transmitting counter synchronizing signal, in the present embodiment, by UPS1 as periodically transmitting counter synchronizing signal of main equipment.System powers in running, and UPS1 is by self the first transmit port T711 and the second transmit port T712 transmitting counter synchronizing signal simultaneously.
UPS1 is by the first receiving port R711 count pick up device synchronizing signal of self, UPS1 judges by self the first receiving port R711 in the upper Preset Time once receiving after correct counter synchronisation signal, whether again receives correct counter synchronisation signal.
When UPS1 by self the first receiving port R711 in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS1; When UPS1 by self the first receiving port R711 in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, UPS1 starts by the second receiving port R712 count pick up device synchronizing signal of self, and suspends by the first receiving port R711 count pick up device synchronizing signal of self.
When UPS1 by self the second receiving port R712 in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by UPS1; When UPS1 by self the second receiving port R712 in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, can give the alarm, there is power supply risk in prompting user.
Wherein, judge that the whether correct concrete mode of counter synchronisation signal receiving can be for to judge whether counter synchronisation signal exists the upset of signal in predetermined period.
Meanwhile, UPS2 is also by the first receiving port R721 count pick up device synchronizing signal of self, and corresponding follow-up judgement control flow is identical with above-mentioned UPS1, is not described in detail in this.
For the confession electrical stability of the UPS parallel system that further the raising embodiment of the present invention 3 provides, can also adopt in UPS1 and UPS2, multiple transmit ports and multiple receiving port are set, specifically repeat no more.
Visible, the UPS parallel system that provides of the embodiment of the present invention is provided, and the equal count pick up device of each UPS synchronizing signal, has improved the consistency of the out-put supply of multiple UPS in parallel, reduce the high frequency circulation between UPS, and UPS is receiving after a counter synchronisation signal, first judge whether correct, determine when correct and just the count value of copped wave counter is updated to preset value, when incorrect, switch receiving port, can improve for electrical stability, saved port resource.
In sum, the UPS parallel system that the embodiment of the present invention provides, comprises multiple UPS in parallel, and one of the plurality of UPS is by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously; The first receiving port of each UPS in the plurality of UPS is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively; Each UPS receives this counter synchronisation signal by the first receiving port of self, is used to indicate UPS the count value of copped wave counter is updated to preset value; First of each UPS in the plurality of UPS judges that port is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively; The second receiving port of each UPS in the plurality of UPS is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS judges that by self first port is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, be used to indicate UPS the count value of copped wave counter is updated to preset value, and start judge port count pick up device synchronizing signal and judge processing by self second, and time-out pass through the first receiving port count pick up device synchronizing signal of self; Second of each UPS in the plurality of UPS judges that port is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS judges that by self second port, in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, gives the alarm.The UPS parallel system that adopts the embodiment of the present invention to provide, can reduce the high frequency circulation between UPS in parallel.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if these amendments of the present invention and within modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.

Claims (10)

1. a uninterrupted power supply UPS parallel system, comprises multiple UPS in parallel, it is characterized in that:
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
The first receiving port of each UPS in described multiple UPS is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively; Each UPS receives described counter synchronisation signal by the first receiving port of self, is used to indicate UPS the count value of copped wave counter is updated to preset value;
First of each UPS in described multiple UPS judges that port is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively;
The second receiving port of each UPS in described multiple UPS is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS judges that by self first port is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, be used to indicate UPS the count value of copped wave counter is updated to preset value, and start judge port count pick up device synchronizing signal and judge processing by self second, and time-out pass through the first receiving port count pick up device synchronizing signal of self;
Second of each UPS in described multiple UPS judges that port is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS judges that by self second port, in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, gives the alarm.
2. the system as claimed in claim 1, is characterized in that, described the first receiving port and described the second receiving port are enhancement mode pulse width modulation synchronization pulse input EPWMSYNCI port.
3. the system as claimed in claim 1, is characterized in that, described the first transmit port and described the second transmit port are enhancement mode pulse width modulation EPWM port; Described first judges that port and described second judges that port is universal input output GPIO port.
4. the system as claimed in claim 1, is characterized in that, described the first transmit port and described the second transmit port are universal input output GPIO port; Described first judges that port and described second judges that port is that enhancement mode catches ECAP port.
5. a counter synchronisation signal acceptance method for uninterrupted power supply UPS parallel system as claimed in claim 1, is characterized in that, comprising:
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
Each UPS receives described counter synchronisation signal by the first receiving port of self, is used to indicate UPS the count value of copped wave counter is updated to preset value;
When UPS judges that by self first port is in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, be used to indicate UPS the count value of copped wave counter is updated to preset value, and start judge port count pick up device synchronizing signal and judge processing by self second, and time-out pass through the first receiving port count pick up device synchronizing signal of self.
6. method as claimed in claim 5, is characterized in that, also comprises:
When UPS judges that by self second port, in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, gives the alarm.
7. a uninterrupted power supply UPS parallel system, comprises multiple UPS in parallel, it is characterized in that:
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
The first receiving port of each UPS in described multiple UPS is connected with the first transmit port of self, and is connected with the first transmit port of other each UPS respectively; Each UPS receives described counter synchronisation signal by the first receiving port of self; When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS; When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, and suspends by the first receiving port count pick up device synchronizing signal of self;
The second receiving port of each UPS in described multiple UPS is connected with the second transmit port of self, and is connected with the second transmit port of other each UPS respectively; When UPS by self the second receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS; When UPS by self the second receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, give the alarm.
8. a counter synchronisation signal acceptance method for uninterrupted power supply UPS parallel system as claimed in claim 7, is characterized in that, comprising:
One of described multiple UPS are by self the first transmit port and the second transmit port transmitting counter synchronizing signal simultaneously;
Each UPS receives described counter synchronisation signal by the first receiving port of self;
When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, this UPS starts by the second receiving port count pick up device synchronizing signal of self, and suspends by the first receiving port count pick up device synchronizing signal of self.
9. method as claimed in claim 8, is characterized in that, also comprises:
When UPS by self the first receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS.
10. method as claimed in claim 8, is characterized in that, also comprises:
When UPS by self the second receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again receiving correct counter synchronisation signal, the count value of copped wave counter is updated to preset value by this UPS; When UPS by self the second receiving port in the upper Preset Time once receiving after correct counter synchronisation signal, while again not receiving correct counter synchronisation signal, give the alarm.
CN201310052245.4A 2013-02-18 2013-02-18 UPS parallel system and counter synchronization signal method of reseptance thereof Active CN103997069B (en)

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Citations (3)

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Publication number Priority date Publication date Assignee Title
CN1430325A (en) * 2001-12-31 2003-07-16 艾默生网络能源有限公司 Switch synchronization method of parallel converter system.
US20090174260A1 (en) * 2008-01-07 2009-07-09 Wu Chin-Chang UPS System having a Function of Parallel Operation
CN202737568U (en) * 2012-08-14 2013-02-13 煤炭科学研究总院 Management and monitoring system of down hole uninterrupted power supply (UPS)

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Publication number Priority date Publication date Assignee Title
CN1430325A (en) * 2001-12-31 2003-07-16 艾默生网络能源有限公司 Switch synchronization method of parallel converter system.
US20090174260A1 (en) * 2008-01-07 2009-07-09 Wu Chin-Chang UPS System having a Function of Parallel Operation
CN202737568U (en) * 2012-08-14 2013-02-13 煤炭科学研究总院 Management and monitoring system of down hole uninterrupted power supply (UPS)

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