CN103995035A - Multi-grid graphene field-effect tube structure for detection of base sequence and preparation method thereof - Google Patents
Multi-grid graphene field-effect tube structure for detection of base sequence and preparation method thereof Download PDFInfo
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- CN103995035A CN103995035A CN201410236223.8A CN201410236223A CN103995035A CN 103995035 A CN103995035 A CN 103995035A CN 201410236223 A CN201410236223 A CN 201410236223A CN 103995035 A CN103995035 A CN 103995035A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N33/00—Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00
- G01N33/48—Biological material, e.g. blood, urine; Haemocytometers
- G01N33/483—Physical analysis of biological material
- G01N33/487—Physical analysis of biological material of liquid biological material
- G01N33/48707—Physical analysis of biological material of liquid biological material by electrical means
- G01N33/48721—Investigating individual macromolecules, e.g. by translocation through nanopores
Abstract
The invention provides a multi-grid graphene field-effect tube structure for detection of a base sequence and a preparation method thereof. A semiconductor layer is released firstly to reduce the thickness of the semiconductor layer at a structure area; a gate electrode window is etched on a silicon oxide insulation layer to manufacture a metal gate electrode; graphene is transferred to the surface of the silicon oxide insulation layer which is supported by the semiconductor layer and imaging is carried out on the graphene to obtain a plurality of graphene micron belts; metal source electrodes and metal drain electrodes are manufactured on the upper surfaces of two end faces of the graphene micron belts; an insulation layer is manufactured to cover the surfaces of a graphene microchip, the metal gate electrode, the metal source electrodes and the metal drain electrodes so as to form a sandwich structure; finally, a nanopore is formed to realize the penetration among the semiconductor layer, the silicon oxide insulation layer, the graphene micron belts and the insulation layer. When a base to be detected passes through the graphene nanopore, voltage modulation is carried out on the metal gate electrode and base signals are detected at the ends of the metal source electrodes so as to realize the recognition of the base sequence. The structure is simple in process, low in cost, small in structure volume, has good expansibility by being compatible with CMOS process, and has wide application prospect in the field of biomedical applications.
Description
Technical field
The present invention relates to multiple-grid utmost point graphene field effect tubular construction and preparation method, particularly relate to the multiple-grid utmost point graphene field effect tubular construction and the preparation method that detect for base sequence, adopt microelectronic processing technique, the invention belongs to microelectromechanical systems field.
Background technology
Utilize CMOS fabrication techniques micro-nano biology sensor be widely applied in the field such as biological, medical at present.These sensors have cost low, can be mass, the advantage such as good stability, sensitivity height.Due to the sensitivity that the specific physical that has nanoscale effect and produced by it, chemical characteristic make nanoscale sensor can effectively improve sensor, the quality factor of device is significantly improved.Third generation gene sequencing based on nano-pore is the Typical Representative of nanoscale sensor, and its principle is to utilize base occupy-place in nano-pore passage to cause that gas current changes to identify base sequence.Along with the development of micro-nano process technology, third generation gene sequencing has obtained obvious progress.The device major part of current detection base sequence is to adopt single nano-pore to detect, and can not detect multiple signal sources simultaneously, lacks effectively contrast, and efficiency is not high.
In the third generation gene sequencing system based on nano-pore, the selection of the material of nano-pore receives much concern always.Mano-porous material mainly contains two classes at present.One class is biological nano hole, as α blood lysin nano-pore; Another kind of is solid nano hole, as SiN, and SiO2 nano-pore etc.Biological nano hole, in the time of genetic test, has higher resolution, but biological nano hole is short serviceable life, is unfavorable for production application.But solid nano hole is difficult to again be worked into the yardstick close with base size, brings difficulty to order-checking.Therefore, the selection of new material is the key problem that solves third generation gene sequencing.Graphene is as emerging two-dimensional nano material.There is excellent electrology characteristic, the very thin thickness of Graphene simultaneously, single-layer graphene thickness is only 0.34nm, in the same size with the base spacing of DNA molecular.Therefore, utilize Graphene to receive scientific research personnel's great concern as DNA molecular Sequence Detection.Utilize Graphene to produce grapheme nano-pore, then utilize the characteristic that grapheme nano-pore three dimension scale is close with DNA base size to identify base sequence.Though this method can be identified DNA molecular characteristic through nano-pore under electrophoretic force effect, still cannot fundamentally identify the single base of DNA molecular.First, the same with the order-checking of SiN film nano hole, due to the existence of white noise, bring difficulty to base signal extraction.In addition, detect DNA molecular base sequence with grapheme nano-pore and also have another one problem, can not realize hyperchannel and detect simultaneously.There is at present experiment to adopt multiple solid nanos hole to detect DNA molecular base sequence.But its signal sampling channel is single, cannot realize effective separation of multiple signals.
Therefore,, if propose under a kind of prerequisite that realizes hyperchannel real-time detector part, the impact that reduces white noise will overcome above-mentioned limitation to a certain extent.
Summary of the invention
Technical matters: the shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of multiple-grid utmost point graphene field effect tubular construction and preparation method who detects for base sequence.The present invention can realize hyperchannel base sequence input, improves detection efficiency, and modulation reference current reduces the interference of white noise to detection signal.Realize prior art and CMOS technical compatibility simultaneously, can effectively reduce manufacturing process complexity, reduce production costs.
Technical scheme: the multiple-grid utmost point graphene field effect tubular construction detecting for base sequence of the present invention comprises the mask substrate setting gradually from bottom to up, semiconductor layer, insulating layer of silicon oxide, electrode layer and insulation course, described mask substrate middle part is provided with release window, in described semiconductor layer, be provided with and be positioned at the etching groove that discharges window top and be communicated with it, branch's one and a half conductor layer nanometer blind hole in etching groove, described insulating layer of silicon oxide is provided with gate electrode window, in insulating layer of silicon oxide, be provided with the silicon oxide nano pore that is positioned at semiconductor layer nanometer blind hole top the monox nanometer blind hole being communicated with it and is positioned at described monox nanometer blind hole central authorities top, described electrode layer comprises gate electrode metal, Graphene micro belt, the metal leakage utmost point, source metal electrode and grapheme nano-pore, Graphene micro belt is positioned at silicon oxide nano pore top, and Graphene micro belt connects the metal leakage utmost point and the source metal electrode that are arranged on its two ends, grapheme nano-pore is positioned at silicon oxide nano pore top and is communicated with silicon oxide nano pore, realizes the connection of grapheme nano-pore, silicon oxide nano pore, monox nanometer blind hole and semiconductor layer nanometer blind hole, described insulation course is positioned at described electrode layer top, and is provided with the external window of described gate electrode, drain electrode window and source electrode window through ray and is positioned at described gate electrode metal, the metal leakage utmost point and metal leakage utmost point top, above described grapheme nano-pore, be provided with described insulation course nano-pore, realize and communicating with described grapheme nano-pore.
Described Graphene micro belt is single-layer graphene, and the insulating layer of silicon oxide, electrode layer and the insulation course that connect successively from bottom to up form sandwich structure.
The nano-pore of a connection of described silicon oxide nano pore, grapheme nano-pore and insulation course nano-pore composition.
The material of described mask substrate is monox or silicon nitride, and the material of described semiconductor layer is silicon, germanium or germanium silicon.
The quantity of described Graphene micro belt is more than or equal to 2, and the quantity of Graphene micro belt equates with semiconductor layer nanometer blind hole, monox nanometer blind hole, silicon oxide nano pore, grapheme nano-pore and insulation course nano-pore quantity.
Described gate electrode metal is positioned at gate electrode window.
The material of described insulation course is aluminium oxide or titanium dioxide.
The preparation method of the multiple-grid utmost point graphene field effect pipe that base sequence of the present invention detects comprises the following steps:
1) produce mask substrate at the downside of semiconductor layer, the upside of semiconductor layer is produced insulating layer of silicon oxide;
2) make and discharge window in the central etching of described mask substrate;
3) utilize described release window to etch etching groove on described semiconductor layer;
4) etching gate electrode window on described insulating layer of silicon oxide
5) in described gate electrode window, make gate electrode metal
6) single-layer graphene is transferred to the upper surface of insulating layer of silicon oxide, and by graphical treatment, obtained the Graphene micro belt of regular shape, described Graphene micro belt is positioned at central authorities directly over etching groove;
7) make respectively a metal leakage utmost point and source metal electrode at described Graphene micro belt two ends, the described metal leakage utmost point is realized electricity with source metal electrode by Graphene micro belt and is connected;
8) make the insulation course that covers described insulating layer of silicon oxide, gate electrode metal, Graphene micro belt, the metal leakage utmost point and source metal electrode top, on etching insulation course, be positioned at the position of gate electrode metal, the metal leakage utmost point, source metal electrode top, obtain the external window of gate electrode, drain electrode window and source electrode window through ray for being connected with extraneous electricity;
9) on remaining semiconductor layer above described etching groove, produce described semiconductor layer nanometer blind hole, and in the described monox nanometer blind hole of described semiconductor layer nanometer blind hole central authorities' making.
10) above described monox nanometer blind hole, produce the nano-pore that silicon oxide nano pore, grapheme nano-pore and insulation course nano-pore form a connection; Gate electrode metal, Graphene micro belt, the metal leakage utmost point, source metal electrode and grapheme nano-pore have formed electrode layer.
Beneficial effect: the invention provides the multiple-grid utmost point graphene field effect tubular construction and the preparation method that detect for base sequence, compared with prior art, tool of the present invention has the following advantages:
1) hyperchannel detects in real time.In the present invention, in multiple grapheme nano-pores, any one nano-pore detects signal when DNA molecular passes through this hole, both can identify the base sequence of this DNA molecular.This design increases the quantity of nano-pore and detecting electrode simultaneously, and raising DNA molecular is crossed the probability of nano-pore.Meanwhile, the output signal of each nano-pore is relatively independent, can detect multiple signals simultaneously, and more signal source is provided, and can obtain correlation data, corrects detection error.
2) utilize graphene field effect pipe principle, improve signal to noise ratio (S/N ratio).With respect to existing detection technique, graphene field effect pipe can regulate detection reference current amplitude, improves signal to noise ratio (S/N ratio), reduces the impact of white noise on detection signal, thereby improves the resolution of base identification.
To sum up, multiple-grid utmost point single-layer graphene nano-pore field-effect transistor structure that a kind of volume provided by the invention is little, technique is simple and cost is low and preparation method thereof, utilize multiple grapheme nano-pores to realize hyperchannel and detect in real time, can regulate signal to noise ratio (S/N ratio), detection efficiency is improved simultaneously.In the present invention, utilize source metal electrode and the metal leakage utmost point to realize the inside and outside electrical connection of device, the modulation of gate electrode metal, realizes conveying and the regulation and control of detection signal.
Brief description of the drawings
Fig. 1 is a) the structure schematic top plan view of substrate;
Fig. 1 is b) the structure cross-sectional schematic of substrate;
Fig. 2 is a) the structure schematic top plan view of electrode layer;
Fig. 2 is b) the structure cross-sectional schematic of electrode layer;
Fig. 3 is a) the structure schematic top plan view of insulation course;
Fig. 3 is b) the structure cut-open view schematic diagram of insulation course;
Fig. 4 is the structural representation that semiconductor layer surface is produced mask substrate and insulating layer of silicon oxide;
Fig. 5 is that mask substrate central authorities etch the structural representation that discharges window;
Fig. 6 is the structural representation after semiconductor layer discharges;
Fig. 7 is a) that insulating layer of silicon oxide surface makes the structure schematic top plan view after gate electrode window;
Fig. 7 is b) that insulating layer of silicon oxide surface makes the structural representation cross-sectional schematic after gate electrode window;
Fig. 8 is a) for making the structure schematic top plan view after gate electrode metal;
Fig. 8 b) shows and analyses and observe view for the structure after making gate electrode metal;
Fig. 9 is a) for making Graphene micro belt, source metal electrode and the metal leakage structure schematic top plan view after extremely;
Fig. 9 is b) for making Graphene micro belt, source metal electrode and the metal leakage structural representation cross-sectional schematic after extremely;
Figure 10 is the structural representation covering after insulation course;
Figure 11 a) for making the structure schematic top plan view after gate electrode window, source metal electrode window through ray and metal leakage utmost point window on insulation course;
Figure 11 b) for making the structural representation cross-sectional schematic after gate electrode window, source metal electrode window through ray and metal leakage utmost point window on insulation course;
Figure 12 a) for making the structure schematic top plan view after semiconductor nano blind hole, monox nanometer blind hole, silicon oxide nano pore, grapheme nano-pore and insulation course nano-pore on insulation course;
Figure 12 b) for making the structural representation cross-sectional schematic after semiconductor nano blind hole, monox nanometer blind hole, silicon oxide nano pore, grapheme nano-pore and insulation course nano-pore on insulation course;
In figure, have: mask substrate 1, semiconductor layer 2, insulating layer of silicon oxide 3, electrode layer 4, insulation course 5, discharge window 11, etching groove 21, semiconductor layer nanometer blind hole 22, gate electrode window 31, monox nanometer blind 32, silicon oxide nano pore 33, gate electrode metal 41, Graphene micro belt 42, the metal leakage utmost point 43, source metal electrode 44, grapheme nano-pore 45, the external window 51 of gate electrode, drain electrode window 52, source electrode window through ray 53, insulation course nano-pore 54.
Embodiment
Further illustrate the present invention below in conjunction with Figure of description and specific embodiment, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this instructions.The present invention can also be implemented or be applied by other different embodiment, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications or change not deviating under spirit of the present invention.
Refer to Fig. 4 to Figure 12 b), it should be noted that, the diagram providing in following specific embodiment only illustrates basic conception of the present invention in a schematic way, satisfy and only show with assembly relevant in the present invention in graphic but not component count, shape and size drafting while implementing according to reality, when its actual enforcement, kenel, quantity and the ratio of each assembly can be a kind of random change, and its assembly layout kenel also may be more complicated.
As Fig. 4 to Figure 12 b) as shown in, for base sequence detect multiple-grid utmost point graphene field effect tubular construction, its method for making comprises the following steps:
Step 1), as shown in Figure 4, first produce mask substrate 1 at the downside of the semiconductor layer 2 as matrix, the upside of semiconductor layer 2 is produced insulating layer of silicon oxide 3.In the present embodiment, semiconductor layer 2 is silicon, and insulating layer of silicon oxide 3 is monox, and the material of mask substrate 1 is monox, utilizes thermal oxidation technology to obtain mask substrate 1 and insulating layer of silicon oxide 3 at upside and the downside of semiconductor layer 2 simultaneously.In the present embodiment, the thickness of insulating layer of silicon oxide 3 is 300nm.
In step 2) in, as shown in Figure 5, utilize reactive ion etching process (Reactive-Ion Etching, RIE) etch mask substrate 1, in mask substrate 1, form one and discharge window 11.
In step 3) in, as shown in Figure 6, utilize deep reaction ion etching technique (Deep Reactive-Ion Etching, DRIE) etching semiconductor layer 2, on semiconductor layer 2, form an etching groove 21.
In step 4) in, as Fig. 7 a) and 7b) as shown in, utilize reactive ion etching process etching oxidation silicon insulation course 3, on insulating layer of silicon oxide 3, form a gate electrode window 31.
In step 5) in, as Fig. 8 a) and 8b) as shown in, adopt sputter or evaporation, in insulating layer of silicon oxide 3 and gate electrode window 31 surface deposition layer of metal, then by peeling off or lithographic method, form gate electrode metal 41.In the present embodiment, the material of gate electrode metal 41 is titanium.
In step 6) in, as Fig. 9 a) and 9b) as shown in, Graphene is transferred to insulating layer of silicon oxide 3 surfaces, and passes through graphical treatment, obtain the Graphene micro belt 42 of regular shape, realize Graphene micro belt 42 and be positioned at central authorities directly over etching groove 21.In the present embodiment, utilize photoetching and oxygen plasma etching, obtain the Graphene micro belt 42 of regular shape.Adopt again sputter or evaporation, in insulating layer of silicon oxide 3 surfaces and Graphene micro belt 42 surface deposition layer of metal, then by peeling off or lithographic method, the metal leakage utmost point 43 of formation is realized electricity with source metal electrode 44 by Graphene micro belt 42 and is connected.In the present embodiment, the quantity of Graphene micro belt 42 is 4, and the material of the metal leakage utmost point 43 and source metal electrode 44 is titanium.
Step 7) in, as shown in figure 10, make insulation course 5 total is covered.In the present embodiment, insulation course 5 materials are aluminium oxide.
Step 8) in, as Figure 11 a) and 11b) as shown in, the insulation course of etching gate electrode metal 41, the metal leakage utmost point 43 and source metal electrode 44 tops, obtain the external window 51 of gate electrode, drain electrode window 52 and source electrode window through ray 53, be used to form lead-in wire, realize electrode and extraneous being electrically connected.In the present embodiment, utilize the potassium hydroxide solution etching that photoetching and normal temperature cushioned to obtain gate electrode window 51, source electrode window through ray 52 and drain electrode window 53.
Step 9) in, produce monox nanometer blind hole 32 in insulating layer of silicon oxide 3 central authorities of etching groove 21 1 sides, then produce silicon oxide nano pore 33, grapheme nano-pore 45 and insulation course nano-pore 54.As Figure 12 a) and 12b) as shown in.In the present embodiment, utilize focused ion beam (Focused Ion beam, FIB) etching oxidation silicon insulation course 3, form nanometer blind hole 31 at insulating layer of silicon oxide 3.Recycling focused ion beam is produced silicon oxide nano pore 33, grapheme nano-pore 45 and insulation course nano-pore 54, forms a nanometer through hole.
In sum, multiple-grid utmost point graphene field effect tubular construction and the preparation method who detects for base sequence provided by the invention, has solved conventional fabrication processes and cannot reach the electrode problems of producing single Nano grade.This manufacture craft is simple, and cost is low and have advantages of that structural volume is little, and meanwhile, the present invention and CMOS process compatible make it have good extendability and wider usable range.So the present invention has effectively overcome various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all can, under spirit of the present invention and category, modify or change above-described embodiment.Therefore, such as in affiliated technical field, have and conventionally know that the knowledgeable, not departing from all equivalence modifications that complete under disclosed spirit and technological thought or changing, must be contained by claim of the present invention.
Claims (8)
1. the multiple-grid utmost point graphene field effect tubular construction detecting for base sequence, it is characterized in that, this structure comprises the mask substrate (1) setting gradually from bottom to up, semiconductor layer (2), insulating layer of silicon oxide (3), electrode layer (4) and insulation course (5), described mask substrate (1) middle part is provided with and discharges window (11), in described semiconductor layer (2), be provided with and be positioned at the etching groove (21) that discharges window (11) top and be communicated with it, branch's one and a half conductor layer nanometer blind hole (22) in etching groove (21), described insulating layer of silicon oxide (3) is provided with gate electrode window (31), in insulating layer of silicon oxide (3), be provided with the silicon oxide nano pore (33) that is positioned at semiconductor layer nanometer blind hole (22) top the monox nanometer blind hole (32) being communicated with it and is positioned at described monox nanometer blind hole (32) central authorities top, described electrode layer (4) comprises gate electrode metal (41), Graphene micro belt (42), the metal leakage utmost point (43), source metal electrode (44) and grapheme nano-pore (45), Graphene micro belt (42) is positioned at silicon oxide nano pore (33) top, and Graphene micro belt (42) connects the metal leakage utmost point (43) and the source metal electrode (44) that are arranged on its two ends, grapheme nano-pore (45) is positioned at silicon oxide nano pore (33) top and is communicated with silicon oxide nano pore (33), realizes the connection of grapheme nano-pore (45), silicon oxide nano pore (35), monox nanometer blind hole (32) and semiconductor layer nanometer blind hole (22), described insulation course (5) is positioned at described electrode layer (4) top, and is provided with the external window of described gate electrode (51), drain electrode window (52) and source electrode window through ray (53) and is positioned at described gate electrode metal (41), the metal leakage utmost point (43) and the metal leakage utmost point (44) top, be provided with described insulation course nano-pore (54) in described grapheme nano-pore (45) top, realize and communicating with described grapheme nano-pore (45).
2. the multiple-grid utmost point graphene field effect tubular construction that base sequence according to claim 1 detects, it is characterized in that, described Graphene micro belt (42) is single-layer graphene, and the insulating layer of silicon oxide (3), electrode layer (4) and the insulation course (5) that connect successively from bottom to up form sandwich structure.
3. the multiple-grid utmost point graphene field effect tubular construction that base sequence according to claim 1 detects, it is characterized in that the nano-pore of a connection of described silicon oxide nano pore (33), grapheme nano-pore (45) and insulation course nano-pore (54) composition.
4. the multiple-grid utmost point graphene field effect tubular construction that base sequence according to claim 1 detects, it is characterized in that: the material of described mask substrate (1) is monox or silicon nitride, the material of described semiconductor layer (2) is silicon, germanium or germanium silicon.
5. the multiple-grid utmost point graphene field effect tubular construction that base sequence according to claim 1 detects, it is characterized in that: the quantity of described Graphene micro belt (42) is more than or equal to 2, and the quantity of Graphene micro belt equates with semiconductor layer nanometer blind hole (22), monox nanometer blind hole (32), silicon oxide nano pore (33), grapheme nano-pore (45) and insulation course nano-pore (54) quantity.
6. the multiple-grid utmost point graphene field effect tubular construction that base sequence according to claim 1 detects, is characterized in that: described gate electrode metal (41) is positioned at gate electrode window (31).
7. the multiple-grid utmost point graphene field effect tubular construction that base sequence according to claim 1 detects, is characterized in that: the material of described insulation course (5) is aluminium oxide or titanium dioxide.
8. a preparation method who prepares the multiple-grid utmost point graphene field effect pipe of base sequence detection as claimed in claim 1, is characterized in that, the method comprises the following steps:
1) produce mask substrate (1) at the downside of semiconductor layer (2), the upside of semiconductor layer (2) is produced insulating layer of silicon oxide (3);
2) make and discharge window (11) in the central etching of described mask substrate (1);
3) utilize described release window (11) on described semiconductor layer (2.), to etch etching groove (21);
4) at the upper etching gate electrode window (31) of described insulating layer of silicon oxide (3)
5) in described gate electrode window (31), make gate electrode metal (41)
6) single-layer graphene is transferred to the upper surface of insulating layer of silicon oxide (3), and pass through graphical treatment, obtain the Graphene micro belt (42) of regular shape, described Graphene micro belt (42) is positioned at central authorities directly over etching groove (21);
7) make respectively a metal leakage utmost point (43) and source metal electrode (44) at described Graphene micro belt (42) two ends, the described metal leakage utmost point (43) is realized electricity with source metal electrode (44) by Graphene micro belt (42) and is connected;
8) make the insulation course (5) that covers described insulating layer of silicon oxide (3), gate electrode metal (41), Graphene micro belt (42), the metal leakage utmost point (43) and source metal electrode (44) upper surface, on etching insulation course (5), be positioned at the position of gate electrode metal (41), the metal leakage utmost point (43), source metal electrode (44) top, obtain the external window of gate electrode (51), drain electrode window (52) and source electrode window through ray (53) for being connected with extraneous electricity;
9) on described etching groove (21) the remaining semiconductor layer in top (2), produce described semiconductor layer nanometer blind hole (22), and make described monox nanometer blind hole (32) in described semiconductor layer nanometer blind hole (22) central authorities.
10) produce in described monox nanometer blind hole (32) top the nano-pore that silicon oxide nano pore (33), grapheme nano-pore (45) and insulation course nano-pore (54) form a connection; Gate electrode metal (41), Graphene micro belt (42), the metal leakage utmost point (43), source metal electrode (44) and grapheme nano-pore (45) have formed electrode layer (4).
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