CN103986139A - Design method for restraining surge current - Google Patents
Design method for restraining surge current Download PDFInfo
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- CN103986139A CN103986139A CN201410228617.9A CN201410228617A CN103986139A CN 103986139 A CN103986139 A CN 103986139A CN 201410228617 A CN201410228617 A CN 201410228617A CN 103986139 A CN103986139 A CN 103986139A
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Abstract
The invention provides a design method for restraining surge current. Slow connection of an MOS switching tube is controlled to restrain the surge current at the starting up moment; an RC delay circuit is additionally arranged at the Gate electrode of the MOS switching tube so that control voltage at the Gate electrode can rise slowly until the MOS switching tube is opened; the MOS switching tube is an N type MOS switching tube; +5 V voltage input through VR is applied to the left end of the MOS switching tube; +5 V_HDD at the right end of the MOS switching tube is +5 V voltage used for supplying electricity to a hard disk; the RC delay circuit is additionally arranged at the G electrode of the MOS switching tube, a starting up signal PSON is processed through the delay circuit, and a signal of slow voltage rising is generated at the G electrode of the MOS switching tube.
Description
Technical field
The present invention relates to a kind of server power supply technical field, specifically a kind of method for designing of surge current suppression.
Background technology
Be accompanied by the fast development of the Internet, the continuous rise of cloud computing technology, operational line amount constantly increases.Data-handling capacity, memory capacity to machine room server are all had higher requirement.General large-scale data center machine room, an inch of land is an inch of gold.No matter be machine room lease or self-built machine room, rent and cost are all very expensive.In order to save floor space, make full use of space, the RACK enclosure product of high-density deployment arises at the historic moment.This series products generally has, and centrally connected power supply, concentrates heat radiation, manages this three large feature concentratedly.For as far as possible on unit space, promote data-handling capacity and the memory capacity of server node, in rack, generally dispose according to the situation of practical application: 20 or 32 of server nodes, each node is with the form of 1U pallet, from withdrawing in rack, facilitate O&M.The mainboard of node and hard disk are all fixed in 1U pallet, and current node, according to the configuration of 1 node 8 hard disks, is deployed in the cabinet pallet of 1U.Due in the pallet of 1U, be deployed with mainboard, hard disk and power panel; The all power takings on power panel of mainboard and hard disk, on power panel to hard disk power supply+12V and+5V voltage is all to control a metal-oxide-semiconductor switch by starting-up signal PSON to realize hard disk is powered.In the process of reality debugging; can run into: when the moment of node start; on power panel to hard disk power supply+5V there will be because of moment surge current excessive, the circuit of turn+5V of cause+12V triggers OCP(Over Current Protection overcurrent protection), finally can cause the system machine of delaying.For addressing this problem, a kind of method for designing of succinct surge current suppression is proposed herein, be used for suppressing the large electric current of booting moment, there is the machine of delaying in anti-locking system.
The method for designing of a kind of succinct surge current suppression in this paper.The method increases by a RC branch road by the Gate utmost point at metal-oxide-semiconductor to be controlled metal-oxide-semiconductor and slowly opens, to reach the effect that suppresses booting moment surge current.
Summary of the invention
The object of this invention is to provide a kind of method for designing of surge current suppression.
The object of the invention is to realize in the following manner, realize the inhibition to booting moment surge current by the slow conducting of controlling MOS switching tube, add a RC delay circuit by the Gate utmost point at MOS switching tube, the control voltage of the Gate utmost point is slowly climbed, until metal-oxide-semiconductor is opened, metal-oxide-semiconductor is a N-type metal-oxide-semiconductor, the left end of metal-oxide-semiconductor is VR input+5V, right-hand member+5V_HDD is to power+5V of hard disk, add a RC delay circuit at the G of the metal-oxide-semiconductor utmost point, starting-up signal PSON is through delay circuit processing, produce at the G of the MOS utmost point signal that voltage slowly climbs, according to following formula:
Wherein, for passing through the electric current of the metal-oxide-semiconductor DS utmost point, for the equivalent capacity of load end, for the rate of change of voltage, control the conducting of metal-oxide-semiconductor if adopt PSON signal, in conducting moment, it is infinitely great that voltage change ratio is tending towards in theory, actual track can be also very large numerical value, understands like this moment can become very large, i.e. said surge current, control metal-oxide-semiconductor conducting if adopt the voltage slowly climbing, it is very little that voltage change ratio can become, thereby the surge current producing also can diminish, and surge current is suppressed;
Concrete implementation procedure is as follows:
1) add a RC series circuit at the GATE of the metal-oxide-semiconductor utmost point;
2), with reference to the SOA in metal-oxide-semiconductor datasheet, determine the time that metal-oxide-semiconductor allows in half conducting state;
3) according to the time, determine the value of R and C in conjunction with the conducting voltage of metal-oxide-semiconductor, according to following formula:
Wherein, be that metal-oxide-semiconductor allows time of conducting, the voltage being extremely finally discharged for the G of metal-oxide-semiconductor, is the initial voltage of the G utmost point of metal-oxide-semiconductor, the voltage of the G utmost point during for the complete conducting of metal-oxide-semiconductor, the circuit of surge current suppression can be realized.
Excellent effect of the present invention: in architecture, the collection of monitor data, the arrangement of monitor data and parsing, the transmission of monitor data, modularized processing has all been carried out in the expansion of monitor mode, and the gatherer process of whole monitor data is all to have controlled according to the data monitoring control centre overall situation.User installs this Agent in server OS, just can realize collection, arrangement, parsing and the displaying of complicated monitor data.
Based on the system architecture of server OS Agent, in architecture, user or developer can self-defined monitoring tools and monitor data knowledge modules, customize self-defined monitoring content, gather self-defined monitor data, customize self-defined analytic method, the monitor data of past complexity is integrated into unified monitor data structure by self-defining mode, realize the integration to monitor data, realize the clear displaying of monitor data.
Brief description of the drawings
Fig. 1 is circuit principle structure schematic diagram.
specific implementation
With reference to Figure of description, method of the present invention is described in detail below.
Concrete implementation procedure is as follows:
Realize the inhibition to booting moment surge current by the slow conducting of controlling MOS switching tube, add a RC delay circuit by the Gate utmost point at MOS switching tube, the control voltage of the Gate utmost point is slowly climbed, until metal-oxide-semiconductor is opened, metal-oxide-semiconductor is a N-type metal-oxide-semiconductor, the left end of metal-oxide-semiconductor is VR input+5V, right-hand member+5V_HDD is to power+5V of hard disk, add a RC delay circuit at the G of the metal-oxide-semiconductor utmost point, starting-up signal PSON, through delay circuit processing, produces at the G of the MOS utmost point signal that voltage slowly climbs; According to following formula:
Wherein, for passing through the electric current of the metal-oxide-semiconductor DS utmost point, for the equivalent capacity of load end, for the rate of change of voltage, control the conducting of metal-oxide-semiconductor if adopt PSON signal, in conducting moment, it is infinitely great that voltage change ratio is tending towards in theory, actual track can be also very large numerical value, understands like this moment can become very large, i.e. said surge current, control metal-oxide-semiconductor conducting if adopt the voltage slowly climbing, it is very little that voltage change ratio can become, thereby the surge current producing also can diminish, and surge current is suppressed;
Concrete implementation procedure is as follows:
1) add a RC series circuit at the GATE of the metal-oxide-semiconductor utmost point;
2), with reference to the SOA in metal-oxide-semiconductor datasheet, determine the time that metal-oxide-semiconductor allows in half conducting state;
3) according to the time, determine the value of R and C in conjunction with the conducting voltage of metal-oxide-semiconductor, according to following formula:
Wherein, be that metal-oxide-semiconductor allows time of conducting, the voltage being extremely finally discharged for the G of metal-oxide-semiconductor, is the initial voltage of the G utmost point of metal-oxide-semiconductor, the voltage of the G utmost point during for the complete conducting of metal-oxide-semiconductor, the circuit of surge current suppression can be realized.
The main thought of method for designing of a kind of succinct surge current suppression in this paper is: realize the inhibition to booting moment surge current by the slow conducting of controlling MOS switching tube.Specifically, by adding a RC delay circuit at the Gate of the MOS switching tube utmost point, the control voltage of the Gate utmost point is slowly climbed, until metal-oxide-semiconductor is opened.
In Fig. 1, metal-oxide-semiconductor is a N-type metal-oxide-semiconductor, the left end of metal-oxide-semiconductor is VR input+5V, right-hand member+5V_HDD is to power+5V of hard disk, add a RC delay circuit at the G of the metal-oxide-semiconductor utmost point, starting-up signal PSON is a step signal in the lower left corner, through circuit processing, produces at the G of the MOS utmost point signal that the voltage shown in the right slowly climbs.
According to following formula:
Wherein, for by the electric current of the metal-oxide-semiconductor DS utmost point, be the equivalent capacity of load end, be the rate of change of voltage.
If adopt the PSON signal in the lower left corner to control the conducting of metal-oxide-semiconductor, in conducting moment, it is infinitely great that voltage change ratio is tending towards in theory, and actual track can be also very large numerical value, understands like this moment can become very large, i.e. said surge current.
If the voltage that adopts the right slowly to climb is controlled metal-oxide-semiconductor conducting, it is very little that voltage change ratio can become, thereby the surge current producing also can diminish, and surge current is suppressed.
Embodiment
1) add a RC series circuit at the GATE of the metal-oxide-semiconductor utmost point;
2) with reference to the SOA in metal-oxide-semiconductor datasheet (that is: area of safety operaton curve chart), determine the time that metal-oxide-semiconductor allows in half conducting state;
3), according to the time, determine the value of R and C in conjunction with the conducting voltage of metal-oxide-semiconductor.According to following formula:
Wherein, be that metal-oxide-semiconductor allows time of conducting, the voltage being extremely finally discharged for the G of metal-oxide-semiconductor, is the initial voltage of the G utmost point of metal-oxide-semiconductor, the voltage of the G utmost point during for the complete conducting of metal-oxide-semiconductor.
Like this, the circuit of a simple surge current suppression can be realized.
Except the technical characterictic described in specification, be the known technology of those skilled in the art.
Claims (1)
1. the method for designing of a surge current suppression, it is characterized in that the slow conducting by controlling MOS switching tube realizes the inhibition to booting moment surge current, add a RC delay circuit by the Gate utmost point at MOS switching tube, the control voltage of the Gate utmost point is slowly climbed, until metal-oxide-semiconductor is opened, metal-oxide-semiconductor is a N-type metal-oxide-semiconductor, the left end of metal-oxide-semiconductor is VR input+5V, right-hand member+5V_HDD is to power+5V of hard disk, add a RC delay circuit at the G of the metal-oxide-semiconductor utmost point, starting-up signal PSON is through delay circuit processing, produce at the G of the MOS utmost point signal that voltage slowly climbs, according to following formula:
Wherein, for passing through the electric current of the metal-oxide-semiconductor DS utmost point, for the equivalent capacity of load end, for the rate of change of voltage, control the conducting of metal-oxide-semiconductor if adopt PSON signal, in conducting moment, it is infinitely great that voltage change ratio is tending towards in theory, actual track can be also very large numerical value, understands like this moment can become very large, i.e. said surge current, control metal-oxide-semiconductor conducting if adopt the voltage slowly climbing, it is very little that voltage change ratio can become, thereby the surge current producing also can diminish, and surge current is suppressed;
Concrete implementation procedure is as follows:
1) add a RC series circuit at the GATE of the metal-oxide-semiconductor utmost point;
2), with reference to the SOA in metal-oxide-semiconductor datasheet, determine the time that metal-oxide-semiconductor allows in half conducting state;
3) according to the time, determine the value of R and C in conjunction with the conducting voltage of metal-oxide-semiconductor, according to following formula:
Wherein, be that metal-oxide-semiconductor allows time of conducting, the voltage being extremely finally discharged for the G of metal-oxide-semiconductor, is the initial voltage of the G utmost point of metal-oxide-semiconductor, the voltage of the G utmost point during for the complete conducting of metal-oxide-semiconductor, the circuit of surge current suppression can be realized.
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| CN201410228617.9A CN103986139A (en) | 2014-05-28 | 2014-05-28 | Design method for restraining surge current |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104571450A (en) * | 2015-02-09 | 2015-04-29 | 浪潮电子信息产业股份有限公司 | Design method for preventing upper MOS of VR from being broken down to burn up CPU |
| CN104598003A (en) * | 2015-01-13 | 2015-05-06 | 浪潮电子信息产业股份有限公司 | Design method for inhabiting hard disk surge current by chip soft starting |
| CN106020407A (en) * | 2016-05-16 | 2016-10-12 | 浪潮电子信息产业股份有限公司 | Load switch design method and load switch |
| CN111384845A (en) * | 2018-12-31 | 2020-07-07 | 长沙湘计海盾科技有限公司 | Input surge current suppression circuit |
| CN115377937A (en) * | 2022-10-24 | 2022-11-22 | 浙江富特科技股份有限公司 | Electronic fuse structure, power supply device comprising same and working method of power supply device |
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| CN101325411A (en) * | 2008-04-16 | 2008-12-17 | 中兴通讯股份有限公司 | Slow starting circuit for electrifying DC power supply |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104598003A (en) * | 2015-01-13 | 2015-05-06 | 浪潮电子信息产业股份有限公司 | Design method for inhabiting hard disk surge current by chip soft starting |
| CN104571450A (en) * | 2015-02-09 | 2015-04-29 | 浪潮电子信息产业股份有限公司 | Design method for preventing upper MOS of VR from being broken down to burn up CPU |
| CN106020407A (en) * | 2016-05-16 | 2016-10-12 | 浪潮电子信息产业股份有限公司 | Load switch design method and load switch |
| CN111384845A (en) * | 2018-12-31 | 2020-07-07 | 长沙湘计海盾科技有限公司 | Input surge current suppression circuit |
| CN115377937A (en) * | 2022-10-24 | 2022-11-22 | 浙江富特科技股份有限公司 | Electronic fuse structure, power supply device comprising same and working method of power supply device |
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Application publication date: 20140813 |