CN103957132B - Reflecting internal storage network node card shared storage zone data mapping error rate testing method - Google Patents
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Abstract
A reflecting internal storage network node card shared storage zone data mapping error rate testing method comprises fourteen steps. Comprehensive testing can be carried out on a local storage zone reading-writing link, a bottom layer network protocol firmware processing link and a physical layer transmitting-receiving link in a shared storage zone data mapping process of all node cards in a reflecting internal storage network. Accurate error rate parameter indexes can be obtained in real time, and a text-form testing report can be given. Data for testing used in the method are abundant in changing and high in randomness, a reflecting internal storage network practical working situation can be better simulated, and higher reliability is achieved. Testing is started by a testing sending node card, all the node cards in the whole network can be tested at the same time, covering performance is good, testing efficiency is greatly improved, and time consumed during testing is effectively shortened.
Description
Technical field
The present invention relates to a kind of reflective memory network node card shared memory data map test method for bit error rate, the survey
Method for testing can be used to carrying out all node cards in reflective memory network locally stored in shared memory data mapping process
Area's read-write link, the processing links of underlying network protocols firmware, physical layer transceiver link carry out integration test.Both can be real-time
To accurate bit error rate parameter index, the test report of textual form can be given again.The invention belongs to compunication, calculates
Machine subtest and field of automatic testing.
Background technology
Reflective memory network（Or be referred to as：Real-time reflective memory network, English is referred to as：reflective memory
systems）It is a kind of real-time network of high speed, it is allowed using the computer of different bus structures and different operating system
Between with determine speed and time delay Real-Time Sharing data.Reflective memory network is Distributed Shared Memory System
（Distributed Shared-Memory systems, referred to as：DSM system）One kind.
Reflective memory network overcomes complicated traditional ethernet communication mechanism, host software burden weight, uncertainty and prolongs
When etc. defect.Reflective memory network has advantage following prominent：
（1）Strict transmission definitiveness and predictability
（2）Data transmission bauds is fast
（3）Agreement is simple
（4）Host load is light
（5）Hardware and software platform strong adaptability, compatibility are good
（6）Reliable transmission error correcting capability
Reflective memory network is mainly by reflective memory network node card（Referred to as：Node card）By transmission mediums such as optical fiber
Be formed by connecting loop network or star network.Every host computer installs one piece of reflective memory network node card, in reflection
Depositing has the shared memory data of other node cards in reflective memory network in the local storage of each node card in net
Mapping（Or be referred to as：Copy）.Reflective memory network node card is adapted to polytype host expansion bus, such as VME, PCI,
CompactPCI etc..Because reflective memory network is real-time, the network system based on shared memory, substantially its institute
Some work is all completed by hardware, almost without software overhead, along with adopting optical fiber transmission medium, therefore can be reached
The data transmission rate of tens of megabytes and the data transfer delay of Microsecond grade.The transmission delay of this network of what is more important is
It is determined that and it is expected that, therefore in Industry Control and field tests and distributed measurement and control system, HWIL simulation system
Have a very wide range of applications in system.
Each node card shared memory data mapping function, correctness, the reliability of data mapping in reflective memory network
Property and the bit error rate it is most important, become and evaluate the good and bad key reference index of whole reflective memory network performance.But, current pin
Test to reflective memory network there is no unified, effective integrated approach, most cases to adopt PRBS27- 1 coding is to section
Point card own physical layer transceiver channel carries out a certain degree of test, and this method still cannot be in whole reflective memory network
All node cards and its links of shared memory data mapping carry out comprehensive test comprehensively.
The content of the invention
A kind of reflective memory network node card shared memory data of the present invention map test method for bit error rate, its purpose
It is：A kind of method of testing is provided, for carrying out shared memory data mapping process to all node cards in reflective memory network
In local storage read-write link, the processing links of underlying network protocols firmware, physical layer transceiver link carry out integration test.
A kind of reflective memory network node card shared memory data of the present invention map test method for bit error rate, and its design is thought
Think be：First, it is a test sending node and some test forward node by reflective memory network node division.Next, by
Test sending node produces and writes random data.Afterwards, standard random number is compared by test forward node and maps what is received
Data, and the bit error rate is shown, misregistration information.Finally, retest process.
More specifically, a kind of reflective memory network node card shared memory data of the invention map error rate test side
Method, its step includes following 14 step：(for embodiment directly perceived, sending node for test and needing the step of performing for α is indicated, indicate β's
The step of performing is needed to test check-node)
Step one (α β)：Select test sending node and test forward node.Arbitrarily choose in reflective memory network
, used as test sending node, remaining node card is used as test forward node in network for individual node.
Step 2 (α β)：Divide shared memory address realm region.By whole reflective memory network shared memory
Address realm is divided into several grade address realm regions, and what these were marked off waits the sum in address realm region to be n, marks off
These regions can be labeled as A1、A2、……、An。
Test is implemented according to periodic formation, is divided into test large period and test subcycle.When completing certain address area Aj's
During test, that is, have passed through a test subcycle.After n is tested subcycle, all address area A1、A2、……、AnJust
Can test one time, that is, travel through once, so as to form a test large period.In test process then, constantly repeat this
Test large period.
Step 3 (α β)：Test pointer points to the first block address range areas.Test pointer is used to indicate current test
Address realm region A corresponding to cyclej.When a test is begun, testing pointer should point to A1。
Step 4 (α β)：State and reset statistics and counting variable.In order to calculate the bit error rate, correlated count change need to be set up
Amount.
In particular it is necessary to the variable safeguarded and update has：Test subcycle number, wrong period number, error bit
Number, this cycle error bit number；Can have by calculating the variable for obtaining indirectly by above variable：Large period number, always than
Special number, the bit error rate.
Step 5 (β)：Test forward node registration interrupt event.This step is divided into two sub-steps, and one is will to interrupt thing
Part processing routine is registered to the invocation list of interrupt event, and two is to enable the reception interrupted.
In most reflective memory card, enable and interrupt reception, can just make hardware monitoring and process from other nodes
Interruption；Registration interrupt event processing program, could perform the operation specified when interruption is received.
Step 6 (β)：Test forward node waits interrupt event to arrive, and when receiving the interruption that sending node sends is tested
Afterwards, step 9 is jumped to.
Step 7 (α)：Test sending node is produced and writes random data to AjAddress area.
In order that other each test forward node can get the primary standard data of every group of random number for comparing,
Employ the mode that random number generation seed sends together with the random data for being generated.I.e. in certain address area AjFour rise
Beginning address field writes a 32bit random number and seed occurs, and subsequent address field write occurs seed and produced by this random number
Raw random data.
It is above-mentioned that subtraction random number of the method using Donald E.Knuth that seed produces random data occurs by random number
Generating algorithm, this is a kind of Fibonacci sequence generation method delayed, and be may certify that, the random number sequence week that this method is generated
Phase is up to 230(255-1)。
According to the operation principle of Reflective memory network, in a short period of time, all test forward node all can map updating
Test sending node is received to certain shared drive address area AjThe data write.
Step 8 (α)：Test sending node sends to other test forward node and interrupts, to notify other test forwarding sections
Dot address region AjMap updating.
Step 9 (β)：Test forward node extracts random number and seed occurs, and then seed life occurs according to this random number
Into one group of primary standard random number for comparison.
According to step 7, there is seed and be stored in address realm A in the random number of 32bitjFour starting points
Location section.When random number occurs seed and random number generating algorithm all same, the mark for comparison that forward node is produced is tested
Quasi random number is just identical with the original random number that test sending node is produced.
Step 10 (α β)：Comparison standard original random number and address area AjRandom number, and to the number of each subcycle
Bit accumulated counts are pressed according to amount.When the random data indifference that standard random number and mapping are received, it is believed that test forwarding
Nodal function is correct；If there is difference, the number of bits of mistake is added up, such that it is able to calculate the bit error rate, and then with index
The form of parameter shows in real time, to inform test operation personnel.Test sending node will also perform comparison operation, to test storage
Whether the function of area's read-write loop is correct.
Step 11 (α)：Arranged according to user and decide whether to terminate test.If terminating test, step is jumped to
14；Otherwise continue executing with next step.
Test process can be according to the quantity of test large period or the time-consuming setting of test, also can be in any of test process
Moment is terminated by user.
Step 12 (α β)：Test pointer points to next address region.If test indicator index scope has exceeded An,
Then test pointer is repositioned onto into A1。
Step 13 (α)：Test sending node time delay certain hour, then branches to step 6.This time delay is used as test
The persistent period in cycle, generally tens to hundreds of ms, representative value 80ms.
Step 14 (α β)：Test terminates, and provides the test report of textual form.This report is mainly believed including test object
Breath, tests time, cycle, the data volume of experience, the error message of appearance, and bit error rate etc..
A kind of reflective memory network node card shared memory data of the present invention map test method for bit error rate, its advantage and
Effect is：According to the basic functional principle of reflective memory network, the above-mentioned method of testing initiated by test sending node, can have
Effect ground carries out the local storage read-write ring in shared memory data mapping process to all node cards in reflective memory network
Section, the processing links of underlying network protocols firmware, physical layer transceiver link carry out integration test.
And adopt traditional based on PRBS27- 1 coding can only carry out certain journey to node card own physical layer transceiver channel
The test of degree, is not tested for other key links of reflective memory network node card.Meanwhile, compared to PRBS27-1
Coding, the test that this method of testing is adopted data variation more horn of plenty, randomness is higher, can more preferable simulated reflections internal memory
Network real work situation, with higher credibility.Test is initiated by a test sending node card, can be simultaneously to whole
All node cards in individual network are tested, and spreadability is good, and the efficiency of test is greatly improved, and effectively reduce test institute
The time of consumption.
Description of the drawings
Fig. 1 show error rate test program interface
Fig. 2 show error rate test report interface figure.
Fig. 3 is FB(flow block) of the present invention.
Symbol and label declaration in figure is as follows：
Fig. 1 gives the program interface of error rate test.Interface mainly include test object information, test experience when
Between, data volume, the error message of appearance, and in real time bit error rate etc..
Fig. 2 illustrates the content of error rate test report.Report mainly includes test object information, test experience when
Between, the cycle, data volume, the error message of appearance, and the bit error rate etc..
Fig. 3 illustrates the use flow process of the inventive method.It is main to include that selecting test sends node and test check-node；
The operating process of two kinds of nodes in test period；Terminate the content such as the condition of test and the generation of test result.Each step is all
Correspond with the correlation step in the content of the invention or specific embodiment.
Specific embodiment
A kind of reflective memory network node card shared memory data of the present invention map the concrete reality of test method for bit error rate
Mode is applied for test program.Test program is write and is compiled using C# programming languages and Visual Studio2005 developing instruments
Into executable file.
The test effect of institute's extracting method in order to check present patent application, is made from certain model reflective memory network node card
For objective for implementation.The host operating system of each node card is Windows XP, and development platform is .NET
Framework2.0.The hardware resource of reflective memory network includes 32MByte shared memories, and user-defined interruption
Event.The node card additionally provides reflective memory network node card function package class RfmCard, and apoplexy due to endogenous wind member is as shown in the table.
Table 1
| Function | RfmCard class members's titles |
| Open board | void Open(); |
| Close board | void Close(); |
| Reset board | void Reset(); |
| Set up connection | void Connect(); |
| Read internal memory | T[]Read<T>(UInt64offset,UInt64amount); |
| Write internal memory | void Write<T>(UInt64offset,T[]data); |
| Send and interrupt | void SendEvent(UInt32eventType,UInt32targetNodeID); |
| Receive and interrupt | event RfmEventHandler RfmEvent0; |
The detailed process of the present invention is as shown in figure 3, its specific implementation step is as follows：(for embodiment directly perceived, indicate α to survey
Examination sends node needs the step of performing, and indicate β needs the step of performing to test check-node)
Step one (α β)：Select test sending node and test forward node.
A node in reflective memory network is arbitrarily chosen as test sending node, remaining node card conduct in network
Test forward node.
Step 2 (α β)：Divide shared memory address realm region.
In present embodiment, shared memory size is 32MByte, can be divided into 2048 and wait address realm region, often
Block address scope is 16Kbyte, can be with 32bit arrays testData=newInt32 [4096] that length is 4096;Represent.
Step 3 (α β)：Test pointer points to the first block address range areas.
When test program is implemented, realize testing the function of pointer using first address pointer.In the present embodiment, instead
It is 0 to penetrate internal memory network shared memory first address, then the first block address range areas A1First address be 0, therefore can use as follows
Sentence：
Step 4 (α β)：State and reset statistics and counting variable.
Implementing this step has various methods, and a newly-built assisted class DataTestCollector class is come in present embodiment
Record test result.The member variable that such is used to record test result is as shown in the table：
Table 2
| Record entry | DataTestCollector class members's name variables |
| Subcycle number | int testCount; |
| Wrong period number | int errCount; |
| Error bit number | int errBitCount; |
| This cycle error bit number | int thisErrBitCount; |
Step 5 (β)：Test forward node registration interrupt event.
Encapsulation class RfmCard of the reflective memory network node card that present embodiment is adopted contains event member
RfmEvent0, when being added to event-handling method, encapsulation class can automatically enable interruption and receive and registered events processing method.
The method that for example add an entitled OnRfmEvent (), example is as follows：
Step 6 (β)：Test forward node waits interrupt event to arrive, and when receiving the interruption that sending node sends is tested
Afterwards, step 9 is jumped to.
Step 7 (α)：Test sending node is produced and writes random data to AjAddress area.
In order that other each test forward node can get the primary standard data of every group of random number for comparing,
Employ the mode that random number generation seed sends together with the random data for being generated.In 32 bit arrays that length is 4096
In testData, testData [0] storage random number seed, testData [1] to testData [4095] storage be exactly with
4095 randoms number that testData [0] is generated by seed.
Test sends the random number of node and sends out seed bearing and originate be divided into following two situations：
1. when being that test sends a cycle of node, occur to plant as random number using the millisecond number of current time
Son；
2. when being that test sends the non-period 1 of node, occur to plant using the new random number of last cycle pre-generated
Son, the seed number is to produce additionally to be produced again obtained from a random number after test data.
I.e. in the random number generating algorithm of each test subcycle, except producing 16K × 8-32 positions（Namely 4095
32）Random number as test data outside, also it is extra produce 32 randoms number, and preserve to next test week
Phase, there is seed as the random number of next test subcycle.
Step 8 (α)：Test sending node sends to other test forward node and interrupts.
In the present embodiment, encapsulate class and realize this function there is provided special function, therefore following sentence can be used：
Step 9 (β)：Test forward node extracts random number and seed occurs, and then seed life occurs according to this random number
Into one group of primary standard random number for comparison.
The process embodiment is similar to step 7.
Step 10 (α β)：Comparison standard random number and address area AjData, and statistical test periodicity, error bit
Number, so as to calculate the bit error rate.It is that DataTestCollector classes add member function to implement corresponding work(in present embodiment
Energy：
Step 11 (α)：Arranged according to test period number and user and decide whether to terminate test.
The testing process of subcycle has been completed.After 2048 are tested subcycle, whole reflective memory network is shared
The address realm of memory block just can be tested one time, that is, travel through once, so as to form a test large period.Test then
Cheng Zhong, constantly repeats this test large period.
The time-continuing process of three kinds of method control tests can be designed.One is the sum for testing sending node by test large period
The time-continuing process of the whole test of amount setting, two is the lasting total time of the whole test of setting, then continues total time folding by test
The time-continuing process of the test large period number control test for calculating, three is any time in test process manually to operate termination
The test process that test sending node is initiated.
If terminating test, step 14 is jumped to；Otherwise continue executing with next step.
Step 12 (α β)：Test pointer points to next address region.
From above-mentioned code, often through once testing subcycle, the value of memoffset increases dataamount.
So when test subcycle is to address area AjDuring test, the value of memoffset be (j-1) ×
dataamount。
Step 13 (α)：Test sending node time delay certain hour, then branches to step 6.
This time delay as test period persistent period, generally tens to hundreds of ms, representative value 80ms.It is with 80ms
Example, in present embodiment, each period measuring regional address scope is 16kByte, and whole reflective memory network is shared deposits
Storage area address realm is 32MByte, then the time of a large period is (80ms/16kByte) × 32MByte=163s.
Step 14 (α β)：Test terminates, and provides the test report of textual form.
Time, cycle, data volume that this report mainly experiences including test object information, test, the error message of appearance,
And the bit error rate etc..Concrete form refer to accompanying drawing 2.Fig. 1 show error rate test program interface.
Claims (1)
1. a kind of reflective memory network node card shared memory data map test method for bit error rate, it is characterised in that：The party
Method is comprised the following steps that：
Step one：Select test sending node and test forward node；The node arbitrarily chosen in reflective memory network is made
To test sending node, remaining node is used as test forward node in network；
Step 2：Divide shared memory address realm region；By the address realm of whole reflective memory network shared memory
Be divided into it is multiple wait address realm regions, what these were marked off the wait sum in address realm region is n, these regions for marking off
It is labeled as A1、A2、……、An；
Test is implemented according to periodic formation, is divided into test large period and test subcycle；When completing certain address range areas AjSurvey
During examination, that is, have passed through a test subcycle；After n is tested subcycle, all address realm region A1、A2、……、An
Just test one time, that is, travel through once, so as to form a test large period, in test process then, constantly repeats this survey
Examination large period；
Step 3：Test pointer points to the first block address range areas；Test pointer is used to indicating currently to test subcycle institute right
The address realm region A for answeringj, when a test is begun, test pointer should point to A1；
Step 4：State and reset statistics and counting variable；In order to calculate the bit error rate, associated count variable need to be set up, need dimension
Shield and the variable for updating have：Test subcycle number, wrong period number, error bit number, this cycle error bit number；Pass through
Above variable has by calculating the variable for obtaining indirectly：Large period number, total bit number, the bit error rate；
Step 5：Test forward node registration interrupt event；This step is divided into two sub-steps, and one is that interrupt event is processed into journey
Sequence is registered to the invocation list of interrupt event, and two is to enable the reception interrupted；In most reflective memory card, enable and interrupt
Receive, just can make hardware monitoring and process from other nodes interruption；Registration interrupt event processing program, could be in receiving
The operation specified is performed when disconnected；
Step 6：Test forward node waits interrupt event to arrive, and has no progeny when receiving during test sending node sends, and jumps to
Step 9；
Step 7：Test sending node is produced and writes random data to AjAddress realm region；
In order that other each test forward node get the primary standard data of every group of random number for comparing, employ with
The mode that machine number generation seed and the random data for being generated send together, i.e., in certain address range areas AjFour starting points
Location section writes a 32bit random number and seed occurs, and subsequent address field write is by produced by this random number occurs seed
Random data；
It is above-mentioned that subtraction generating random number of the method using Donald E.Knuth that seed produces random data occurs by random number
Algorithm, the random number sequence cycle that the method is generated is up to 230×(255-1)；In a short period of time, all test forwarding sections
Point all can map updating receive test sending node to certain shared drive address realm region AjThe data write；
Step 8：Test sending node sends to other test forward node and interrupts, to notify other test forward node addresses
Range areas AjMap updating；
Step 9：Test forward node extracts random number and seed occurs, and then seed occurs according to this random number and generates one group
For the primary standard random number of comparison；According to step 7, there is seed and be stored in address model in the random number of 32bit
Enclose AjFour origin address fields, when the random number used by test forward node occur seed and random number generating algorithm with survey
When examination sending node is identical, what the standard random number for comparison that test forward node is produced just was produced with test sending node
Original random number is identical；
Step 10：Comparison standard original random number and address realm region AjRandom number, and the data volume to each subcycle presses
Bit accumulated counts；When the random data indifference that standard random number and mapping are received, it is believed that test forward node work(
Can be correct；If there is difference, the number of bits of mistake is added up, so as to calculate the bit error rate, and then in the form of index parameter
Show in real time, to inform test operation personnel, test sending node will also perform comparison operation, to test memory block read-write loop
Function it is whether correct；
Step 11：Arranged according to user and decide whether to terminate test, if terminating test, jump to step 14；It is no
Then continue executing with next step；Quantity or test time-consuming setting of the test process according to test large period, also can be in test process
Any time by user terminate；
Step 12：Test pointer points to next address range areas；If test indicator index scope has exceeded An, then will
Test pointer is repositioned onto A1；
Step 13：Test sending node time delay certain hour, then branches to step 6；This time delay is held as test period
The continuous time, is tens to hundreds of ms；
Step 14：Test terminates, and provides the test report of textual form；This report includes test object information, test experience
Time, the cycle, data volume, occur error message and the bit error rate.
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| CN111245919B (en) * | 2020-01-07 | 2022-09-20 | 上海航天计算机技术研究所 | Reflective memory network organization management method based on OpenDDS |
| CN111739577B (en) * | 2020-07-20 | 2020-11-20 | 成都智明达电子股份有限公司 | DSP-based efficient DDR test method |
| CN113300893B (en) * | 2021-05-25 | 2022-03-08 | 西北工业大学 | Reflective memory network system based on hardware |
| CN116627973B (en) * | 2023-05-25 | 2024-02-09 | 成都融见软件科技有限公司 | Data positioning system |
| CN116846863B (en) * | 2023-08-30 | 2023-11-10 | 东方空间技术(山东)有限公司 | Memory mapping method and device for optical fiber reflection memory network and computing equipment |
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| CN101493784A (en) * | 2009-02-24 | 2009-07-29 | 中国运载火箭技术研究院 | Reflecting internal memory net dynamic internal memory management method based on distribution simulation |
| CN103678001A (en) * | 2013-11-18 | 2014-03-26 | 中国空间技术研究院 | Multi-node automatic memory allocation method based on reflective memory network |
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| US20070038432A1 (en) * | 2005-08-15 | 2007-02-15 | Maurice De Grandmont | Data acquisition and simulation architecture |
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| CN101493784A (en) * | 2009-02-24 | 2009-07-29 | 中国运载火箭技术研究院 | Reflecting internal memory net dynamic internal memory management method based on distribution simulation |
| CN103678001A (en) * | 2013-11-18 | 2014-03-26 | 中国空间技术研究院 | Multi-node automatic memory allocation method based on reflective memory network |
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