CN103917936A - Master-slave low-noise charge pump circuit and method - Google Patents
Master-slave low-noise charge pump circuit and method Download PDFInfo
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- CN103917936A CN103917936A CN201280053905.4A CN201280053905A CN103917936A CN 103917936 A CN103917936 A CN 103917936A CN 201280053905 A CN201280053905 A CN 201280053905A CN 103917936 A CN103917936 A CN 103917936A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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Abstract
Charge pump circuitry (1) includes a master charge pump (2) including a voltage multiplier (5) and charge pump (30) which operate to produce a boosted, unregulated voltage (Vunreg), and also includes a slave charge pump (3) including a voltage multiplier (36) and charge pump (50) which operate to produce a boosted control voltage (Vctl) which then is filtered. The boosted, unregulated voltage (Vunreg) is regulated in response to the filtered, boosted control voltage (Vctl) to produce a boosted, regulated, low-noise voltage (Vreg). The boosted control voltage (Vctl), relative to a reference voltage (Vref_ SH), is controlled by feedback circuitry (61,62,65) in response to the boosted, regulated, low-noise voltage (Vreg).
Description
Technical field
The present invention generally relates to charge pump circuit, and more particularly relates to low noise, high multiplication constant charge pump circuit.
Background technology
For example, in many power sensitives and cost sensitivity application (comprising the big or small constrained system of large-sized external assembly (inductor in various voltage boosters) for high cost), need " high multiplication constant " bias voltage in integrated circuit to produce.Bias-voltage generating circuit for communication system must be through design to meet the generation to the RF noise level of looking genuine and to look genuine the strict restriction of RF noise level to the coupling of the RF assembly of system.And, high voltage multiplication or the multiplier circuit need in standard RF (radio frequency) communication band with the extremely low noise contents of looking genuine produce bias voltage and the driving voltage for various application, for instance, to drive MEMS (MEMS (micro electro mechanical system)) actuator in RF-MEMS varactor array product.Below be generally crucial: this high voltage multiple circuit meet to look genuine and/or load-sensitive noise produces and standard RF communication band in the extremely strictly restriction of generation of level of noise energy.
Known high voltage multiplication charge pump circuit depends on single high voltage pump conventionally, is wherein from being derived by the voltage of described single high voltage charge pump generation to the adjusting of the output voltage that is provided to load.If be to derive from the same charge pump of driving variable load to the control of voltage-regulation, can exist so than the interdependent noise contents of much bigger load and the noise contents of looking genuine that are suitable for many RF application.(as further filtering and for exporting the aborning major effect that the output ripple voltage of adjusting is the noise that looks genuine that produced by charge pump.And low power consumption is for the significant consideration in the design of the integrated circuit of the application in so-called " mobile product market ".)
Therefore, there are the unsatisfied needs to low noise, high voltage multiplication charge pump circuit and method.
Also exist unsatisfied to the needs of the fine adjustment of the output voltage to being fed to load and the low noise of the extremely low RF of the looking genuine noise level of generation and noise energy, high voltage multiplication charge pump circuit and method are provided.
Also exist unsatisfied to the needs of the fine adjustment of the output voltage to being fed to load and the low noise of the interdependent noise level of the extremely low load of generation, high voltage multiplication charge pump circuit and method are provided.
Also exist unsatisfiedly to the fine adjustment of the output voltage to being fed to load being provided and producing the needs of low noise, high voltage multiplication charge pump circuit and the method for the extremely low RF of looking genuine noise level and energy, it does not rely on from the feedback of the output circuit of described charge pump circuit the fine adjustment to described output voltage is provided.
Also exist unsatisfied to the needs of the fine adjustment of the output voltage to being fed to load, the low noise that produces the relatively little power of the extremely low RF of looking genuine noise level and noise energy and consumption, high voltage multiplication charge pump circuit and method are provided.
Summary of the invention
Target of the present invention is to provide a kind of low noise, high voltage multiplication charge pump circuit and method.
Another target of the present invention is to provide a kind of low noise that provides the fine adjustment of the output voltage to being fed to load and produce the extremely low RF of looking genuine noise level and noise energy, high voltage multiplication charge pump circuit and method.
Another target of the present invention is to provide a kind of low noise that provides the fine adjustment of the output voltage to being fed to load and produce the interdependent noise level of extremely low load, high voltage multiplication charge pump circuit and method.
Another target of the present invention is to provide a kind of low noise that provides the fine adjustment of the output voltage to being fed to load and produce the extremely low RF of looking genuine noise level and energy, high voltage multiplication charge pump circuit and method, and it does not rely on from the feedback of the output circuit of described charge pump circuit the fine adjustment to described output voltage is provided.
A kind of fine adjustment of the output voltage to being fed to load, low noise, high voltage multiplication charge pump circuit and method that produces the extremely low RF of looking genuine noise level and noise energy and consume relatively little power of providing is provided another target of the present invention.
Describe simply and according to an embodiment, the invention provides charge pump circuit 1, charge pump circuit 1: comprise main charge pump 2, it comprises operation to produce voltage multiplier 5 and the charge pump 30 of the unregulated voltage Vunreg through boosting; And also comprise from charge pump 3, it comprises operation to produce voltage multiplier 36 and the charge pump 50 through boosting rectifier control voltage Vctl, described then filtered through boosting rectifier control voltage Vctl.In response to described through filtering regulate through boosting rectifier control voltage Vctl the described unregulated voltage Vunreg through boosting with produce through boost through regulating low noise voltage Vreg.Control described value through boosting rectifier control voltage Vctl through regulating low noise voltage Vreg with respect to reference voltage Vref _ SH through what boost in response to described by feedback circuit 61,62,65.
In one embodiment, the invention provides charge pump circuit 1, it comprises main charge pump circuit 2, and it comprises: for generation of the principal voltage multiplier circuit 5 of the first unregulated voltage Mt3x and for regulating described the first unregulated voltage Mt3x to produce the first first regulating circuit 10,12,14 that is associated through regulation voltage Mt3x_reg; And main pump excitation circuit 30, it is for boosting to produce the unregulated voltage Vunreg through boosting to described first through regulation voltage Mt3x_reg.Described main charge pump circuit 2 also comprises from charge pump circuit 3, and it comprises: for generation of the second unregulated voltage St3x from voltage multiplier circuit 36 and for regulating described the second unregulated voltage St3x to produce the second second regulating circuit 40,38,46 that is associated through regulation voltage St3x_reg; And from pumping circuit 50, it is for boosting to produce through boosting rectifier control voltage Vctl through regulation voltage St3x_reg to described second.The 3rd regulating circuit 58,56 through coupling with in response to described regulate through boosting rectifier control voltage Vctl the described unregulated voltage Vunreg through boosting with produce through boost through regulating low noise voltage Vreg.Feedback circuit 61,62,65 be coupled in described through boost through regulating between low noise voltage Vreg and described the second regulating circuit 40,38,46 to control the described adjusting through boosting rectifier control voltage Vctl according to preset reference voltage Vref _ SH.
In one embodiment, described principal voltage multiplier circuit 5 comprises voltage tripler and described main pump excitation circuit 30 comprises multistage Dixon charge pump, and describedly comprises voltage tripler and describedly comprise multistage Dixon charge pump from pumping circuit 50 from voltage multiplier circuit 36.
In one embodiment, described the 3rd regulating circuit 58,56 comprises N channel source follower transistor 58 and is coupled to the first low-pass filter 56 of the grid of described source follower transistor 58, the drain electrode of described source follower transistor 58 through coupling to receive the first unregulated voltage Vunreg through boosting, and the source electrode of described source follower transistor 58 through coupling with provide described through boost through regulating low noise voltage Vreg.In one embodiment, described charge pump circuit comprise through coupling with receive described through boost through regulate low noise voltage Vreg and to its carry out filtering with produce through boost through regulating low noise bias voltage V
bIASthe second low-pass filter 72.
In one embodiment, described through boost through regulating low noise bias voltage V
bIASbe coupled to variable load 75.In one embodiment, capacitor Cdec receives described unregulated voltage Vunreg through boosting and the ripple voltage component from the described unregulated voltage Vunreg through boosting and transient voltage component is carried out to filtering.
In one embodiment, described the first regulating circuit 10,12,14 comprises the first source follower transistor 14, the first amplifier 10 and the first trsanscondutance amplifier 12.The drain coupled of described the first source follower transistor 14 is to described the first unregulated voltage Mt3x.The source electrode of described the first source follower transistor 14 produces described first through regulation voltage Mt3x_reg and the input of being also coupled to described the first amplifier 10.The input of described the first trsanscondutance amplifier 12 is coupled in the output of described the first amplifier 10, and the grid of described the first source follower transistor 14 is coupled in the output of described the first trsanscondutance amplifier 12.Described the first trsanscondutance amplifier 12 is through being coupled so that described the first unregulated voltage Mt3x is carried out to filtering.In one embodiment, described the second regulating circuit 40,38,46 comprises the second source follower transistor 46, the second amplifier 40 and the second trsanscondutance amplifier 38.The drain coupled of described the second source follower transistor 46 is to described the second unregulated voltage St3x.The source electrode of described the second source follower transistor 46 produces described second through regulation voltage St3x_reg.The grid of described the second source follower transistor 46 is coupled in the output of described the second trsanscondutance amplifier 38.The input of described the second trsanscondutance amplifier 38 is coupled in the output of described the second amplifier 40.The output Vfback of described feedback circuit 61,62,65 is coupled in the first input of described the second amplifier 40 to receive the second input of described preset reference voltage Vref _ SH and described the second amplifier 40 through coupling.Described the second trsanscondutance amplifier 38 is configured to described the second unregulated voltage St3x to carry out filtering.In one embodiment, described the second amplifier 40 is configured to integrating amplifier.In one embodiment, described main charge pump circuit 2 comprises for generation of clock signal as the input of the described multistage Dixon charge pump to described main pump excitation circuit 30 to cause the amplitude of described clock signal to follow the tracks of the clock level shift circuit 33 of the described first value through regulation voltage Mt3x_reg.Describedly also comprise for generation of clock signal as the input to the described described multistage Dixon charge pump from pumping circuit 50 to cause the amplitude of described clock signal to follow the tracks of the clock level shift circuit 49 of the described second value through regulation voltage St3x_reg from charge pump circuit 3.
In one embodiment, described feedback circuit 61,62,65 comprise be coupled in described through boost through regulating between low noise voltage Vreg and the input of feedback amplifier 65 to cause the described preset reference voltage Vref _ SH of reference to amplify in proportion the described bleeder circuit 61,62 through boosting rectifier control voltage Vctl.Described feedback amplifier 65 can be configured to unity gain buffer.
In one embodiment, the invention provides a kind of for generation of low noise reference voltage Vreg, v through boosting
bIASmethod, it comprises: produce the first unregulated voltage Mt3x and regulate described the first unregulated voltage Mt3x to produce first through regulation voltage Mt3x_reg by means of principal voltage multiplier circuit 5; Boost produce unregulated voltage Vunreg through boost to described first through regulation voltage Mt3x_reg by means of main pump excitation circuit 30; By means of producing the second unregulated voltage St3x from voltage multiplier circuit 36 and regulating described the second unregulated voltage St3x to produce second through regulation voltage St3x_reg; By means of boosting to produce through boosting rectifier control voltage Vctl through regulation voltage St3x_reg from pumping circuit 50 to described second; In response to described regulate through boosting rectifier control voltage Vctl the described unregulated voltage Vunreg through boosting with produce through boost through regulating low noise voltage Vreg; And described through controlling the described adjusting through boosting rectifier control voltage Vctl according to preset reference voltage Vref _ SH through regulating the feedback circuit 61,62,65 between low noise voltage Vreg and the second regulating circuit 40,38,46 of boosting by means of being coupled in.
In one embodiment, described method comprises by means of low-pass filter 56 carries out filtering and is applied to the grid of N channel source follower transistor 58 through filtering through boosting rectifier control voltage Vectl_filt by described through boosting rectifier control voltage Vctl described, the drain electrode of wherein said source follower transistor 58 through coupling to receive the first unregulated voltage Vunreg through boosting, and the source electrode of described source follower transistor 58 through coupling with provide described through boost through regulating low noise voltage Vreg.
In one embodiment, described method comprises by means of principal voltage tripler circuit 5 and main Dixon charge pump excitation circuit 30 and produces described unregulated voltage Vunreg through boosting and by means of producing described through boosting rectifier control voltage Vctl from voltage tripler circuit 36 and main Dixon charge pump excitation circuit 30.
In one embodiment, described method comprise to described through boost through regulate low noise voltage Vreg carry out filtering with produce through boost through regulating low noise bias voltage V
bIAS.
In one embodiment, described method comprise by means of be coupled in described through boost through regulating the bleeder circuit 61,62 between low noise voltage vreg and the input of feedback amplifier 65 to amplify in proportion described through boosting rectifier control voltage Vctl with respect to preset reference voltage Vref _ SH.
In one embodiment, the invention provides a kind of for generation of low noise reference voltage Vreg, v through boosting
bIASsystem 1, it comprises: for producing the first unregulated voltage Mt3x by means of principal voltage multiplier circuit and regulating described the first unregulated voltage Mt3x to produce the first member 5 through regulation voltage Mt3x_reg; For boosting produce the member 30 of unregulated voltage Vunreg through boost to described first through regulation voltage Mt3x_reg by means of main pump excitation circuit; Be used for by means of producing the second unregulated voltage St3x from voltage multiplier circuit 36 and regulating described the second unregulated voltage St3x to produce the second member 36 through regulation voltage St3x_reg; Be used for by means of boosting to produce the member 50 through boosting rectifier control voltage Vctl from pumping circuit 50 to described second through regulation voltage St3x_reg; Regulate the described unregulated voltage Vunreg through boosting to produce the member 58 through adjusting low noise voltage Vreg through boosting through boosting rectifier control voltage Vctl in response to described; And describedly control member 61,62,65 to described adjusting through boosting rectifier control voltage Vctl through regulating the feedback circuit between low noise voltage Vreg and the second regulating circuit 40,38,46 according to preset reference voltage Vref _ SH through what boost by means of being coupled in.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the master/slave charge pump of one embodiment of the present of invention.
Fig. 2 is the schematic diagram of the voltage tripler circuit that uses in the piece 5 and 36 in Fig. 1.
Fig. 3 is the schematic diagram of the Dixon charge pump circuit that uses in the piece 30 and 50 in Fig. 1.
Embodiment
The master/slave charge pump 1 of Fig. 1 graphic extension high voltage, its comprise drive the main pump 2 of outside variable load and drive fixing internal load with regulate main pump 3 output from pump 3.The not regulation output voltage Vunreg producing on the output conductor 34 of main pump 2 is connected to the drain electrode of N channel source follower transistor 58.The source electrode of source follower transistor 58 is connected to the input of second-order low-pass filter (LPF) 72 by conductor 60, output 74 conduction of second-order low-pass filter (LPF) 72 are applied to the low noise bias voltage v of variable load 75
bIAS.Vunreg can stand than disturbance and/or noise due to the large load of the output voltage V ctl by producing from level 3, because have substantially fixing load but not variable load from level 3.The grid of source follower transistor 58 is coupled to the output of second order LPF56 by conductor 57, the input of second order LPF56 is connected to the output 54 from pump 3.The source electrode 60 of source follower transistor 58 is also coupled to feedback amplifier 65, and the output 66 of feedback amplifier 65 provides the feedback signal Vfback controlling from the reference voltage input of pump 3.
More particularly, main pump 2 comprises principal voltage tripler circuit 5, and its details is showed in Fig. 2.Clock generator circuit 4 comprises conventional relaxation oscillator 8, and it provides clock signal OSC as the input that produces circuit 26 to ordinary clock on conductor 7.Clock generation circuit 26 produces signal SAMPLE and on conductor 28, produces signal OSC_DIV16 on conductor 27.Clock signal OSC_DIV16 has 1/16th frequency of the frequency that can be OSC.The clock input of main tripler 5 is through connecting to receive the OSC on conductor 7.
Main tripler 5 is by V
dDpower supply and with reference to ground connection.Main tripler 5 produces the not regulation output signal Mt3x of three times on conductor 6.Conductor 6 is connected to the drain electrode of N channel source follower transistor 14 and is connected to the high side supply voltage terminal of the trsanscondutance amplifier 12 of execution " GmC1 " filter function.The downside supply voltage terminal of trsanscondutance amplifier 12 is connected to ground connection.The source electrode of source follower transistor 14 produces through regulation voltage Mt3x_reg on conductor 16, and conductor 16 is connected to the first terminal of the feedback resistor divider network that comprises resistor 19 and 17, and the second connecting terminals of wherein said network is received ground connection.The intermediate node 18 between resistor 19 and 17 of described resistor divider network is coupled to (-) input of the operational amplifier 10 with gain A 1.Therefore, the feedback circuit being associated with the not regulation output voltage Mt3x on main tripler 5 comprises high-gain amplifier, the follow-up GmC1 wave filter then embodying in trsanscondutance amplifier 12.GmC1 filtering circuit is for generation of having the fixed gain that differs the voltage margin that is no more than hundreds of millivolt with Mt3x.GmC1 filtering is with reference to ground connection and make the output ripple voltage component decay in unregulated voltage Mt3x.
The output of amplifier 10 is connected to the input of trsanscondutance amplifier 12.The high side feed end sub-connection of amplifier 10 is to V
dDand its downside feed end sub-connection is to ground connection.(+) input of amplifier 10 receives the reference signal Vref_SH on conductor 24.Select the value of fixing Mt3x_reg voltage according to the load of main Dixon charge pump 2 and reliability requirement.Comprise amplifier 10, trsanscondutance amplifier 12, source follower transistor 14 and be coupled in the source electrode of source follower transistor 14 and (-) of amplifier 10 input between the feedback control loop of resistive voltage divider 19,17 the unregulated voltage Mt3x being produced on conductor 6 by main tripler 5 is operated so that generation is through regulation voltage Mt3x_reg on conductor 16.
Vref_SH produces by comprising conventional bandgap voltage circuits 20 through enabling and the circuit of sampling/holding circuit 22.Bandgap voltage circuits 20 produces band gap voltage Vbg on conductor 21, and conductor 21 is connected to the reference voltage input of sampling/holding circuit 22.The output of sampling/holding circuit 22 is connected to conductor 24, and described output is applied to (+) input of amplifier 10.Can zoom in or out in proportion output voltage V bg with respect to the intrinsic band gap voltage of circuit 20.Sampling input signal SAMPLE controls sampling/holding circuit 22 and when band gap voltage Vbg is sampled to produce Vref_SH.Bandgap voltage circuits 20 is enabled by enabling signal EN.
Main pump 2 also contains M level (wherein M is integer) Dixon charge pump circuit 30, its receive on conductor 16 through regulation output voltage Mt3x_reg and also receive the mentioned clock signal OSC_DIV16 above that produced by level shifter 33 through level shift version.The level that OSC_DIV16 is displaced on conductor 32 is controlled by St3x_reg.The details of main Dixon charge pump circuit 30 is showed in Fig. 3.The level that OSC_DIV16 is displaced to by level shifter 33 is controlled by Mt3x_reg.The output of main Dixon charge pump 30 is connected to main pump output conductor 34, produces not regulation output voltage Vunreg on main pump output conductor 34.
Main pump output conductor 34 is connected to a terminal of capacitor Cdec, and the another terminal of capacitor Cdec is connected to ground connection.Capacitor Cdec makes the decay of output ripple voltage component in Vunreg and also serves as for receiving electric charge and also for electric charge being provided to the high voltage decoupling zero holding capacitor of memory storage of the drain electrode of source follower transistor 58 via conductor 34 from main Dixon charge pump 30 during the transient affair at main Dixon charge pump 30.The drain electrode that the unregulated voltage Vunreg being produced on conductor 34 by main Dixon charge pump 30 is coupled to source follower transistor 58.The source electrode of source follower transistor 58 on conductor 60, produce main pump 2 through regulation output voltage Vreg, conductor 60 is also connected to the input of second order LPF72 and the terminal of resistive voltage divider 61,62.Source follower transistor 58 be applied to source follower transistor 58 drain electrode not conditioning signal Vunreg and on its source electrode, produce between conditioning signal Vreg, provide roughly 40dB to the ripple voltage amplitude fading of 60dB.
Comprising from tripler circuit 36 from pump 3 of master/slave high voltage charge pump 1, its details is substantially the same with main tripler circuit 5 demonstrated in Figure 2.Input through connecting to receive the clock signal OSC conductor 7 from the clock of tripler 36.From pump 3 by V
dDpower supply and with reference to ground connection.Produce not regulation output signal St3x from tripler 36 at conductor 37, conductor 37 is connected to the drain electrode of N channel source follower transistor 46 and is connected to the high side supply voltage terminal of trsanscondutance amplifier 38.The downside supply voltage terminal of trsanscondutance amplifier 38 is connected to ground connection (or V
ss).The source electrode of source follower transistor 46 produces through regulation voltage St3x_reg on conductor 47.Conductor 47 is connected to N level (wherein N is integer), and, from the input of Dixon charge pump circuit 50, the details of Dixon charge pump circuit 50 is showed in Fig. 3.
The input of trsanscondutance amplifier 38 connects to receive by integrator amplifier 40 and output voltage V intg that below described switched-capacitor circuits 68,69,70 produces by conductor 41.The high side feed end sub-connection of amplifier 40 arrives ground connection to VDD and its downside feed end sub-connection.(+) input of integrator amplifier 40 receives the mentioned reference signal Vref_SH above on conductor 24.(-) input of integrator amplifier 40 is coupled to conductor 41 by integrating condenser 42 and is also connected to a terminal of switch 70, and the another terminal of switch 70 is connected to terminal of switch 68 and a terminal of capacitor 69.The another terminal of switch 68 is through connecting to receive the feedback signal Vfback on conductor 66.The another terminal of capacitor 69 is connected to ground connection.
Receive from the clock input of Dixon charge pump 50 OSC_DIV16 that produced by conventional level shift unit 33 through level shift version.The level that OSC_DIV16 is displaced on conductor 51 is controlled by Mt3x_reg.Be connected to from pump output conductor 54 from the output of Dixon level 50.Be through boosting rectifier control voltage Vctl by the output voltage producing at conductor 54 from pump 3, through boosting rectifier control voltage Vctl can by second order LPF (low-pass filter) 56 filtering with on conductor 57, produce through boost through the almost signal Vctl_filt of ripple-free of filtering.Through the grid of filtering voltage Vctl_filt driving N channel source follower transistor 58, the drain electrode of N channel source follower transistor 58 is through connecting the not regulation output voltage Vunreg being produced by main pump 2 to receive.The source electrode of source follower transistor 58 is connected to conductor 60, on conductor 60, produces through regulation output voltage Vreg.
Feedback amplifier 65 can be used as unity gain buffer operation.Its high side supply voltage terminal is connected to V
dD, and its downside supply voltage terminal is connected to ground connection.(-) input of feedback amplifier 65 is connected to a terminal of voltage divider resistors 62 by conductor 63, the another terminal of voltage divider resistors 62 is connected to ground connection.Conductor 63 is also connected to a terminal of another voltage divider resistors 61, the another terminal of voltage divider resistors 61 receive produce at conductor 60 by source follower transistor 58, from the operation of pump 3 and second order LPF56 through regulation voltage signal Vreg.The output of amplifier 65 produces feedback signal Vfback on feedback conductor 66, and (+) that feedback conductor 66 is connected to amplifier 65 inputs and be also connected to the input of the mentioned integrator above that comprises integrator amplifier 40 and switched-capacitor circuits 68,69,70.
The unregulated voltage Vunreg being produced by main pump 2 is for providing the voltage V through highly boosting through regulating by source follower transistor 58
bIAS, for driving relatively large and variable load 75 (, user's application).From charge pump 3 for generation of the ripple-free control voltage Vctl through highly boosting, minimum, the constant load of the PN junction leakage current that is associated of the input capacitance that its driving comprises second order LPF56, the grid capacitance of source follower transistor 58 and small quantity.Owing to only needing to drive little capacity load from tripler 36 and leaking from the reverse PN junction of low level being coupled to as show in Figure 2 from the high voltage transistor of the electric charge pumping section of tripler 36, therefore can minimize from tripler 36 and combined size from Dixon charge pump 50, and can significantly alleviate it in the transient state output dropping characteristic between metering pump event.
The utmost point low noise amplitude through filtering voltage Vctl_filt that the grid that is applied to source follower transistor 58 is provided is very important for realizing the low total ripple voltage amplitude through regulation voltage Vreg on the source electrode of source follower transistor 58, because any Ripple Noise component of Vctl_filt is directly coupled to Vreg.Facilitate in fact the extremely low v of realization from the utmost point underload referred to above of charge pump 3
bIASoutput ripple voltage amplitude, this alleviates the inter-modulation distortion item that the hybrid frequency that produces between output ripple frequency component and the RF signal frequency of charge pump is associated.Second order LPF56 and second order LPF72 provide v
bIASin the further decay of the RF noise component that looks genuine, therefore reduce the level of mixing with RF signal.
Significantly be less than the size of main pump 2 from the large I of physics of pump 3 because from the purposes of pump 3 be only drive the grid capacitance that comprises source follower transistor 58 little load in case control driven by main pump 2 through regulation output voltage Vreg.That is to say, main pump 2 drives V
bIASthe much bigger variable load 75 being applied to or user's application, and only drive the relatively little capacity load of the grid of source follower transistor 58 to leak together with the PN junction of the little level existing from the high voltage transistor of pump 2 from pump 3.
Therefore, in the master/slave charge pump 1 of high voltage, only there is the load of extremely low and fixing horizontal from charge pump 3, and be the source of the adjusting of principal and subordinate's charge pump 2 many and variable to load recuperation.By design, the adjusting by the reference voltage producing from charge pump 3 is had to utmost point low ripple voltage, and therefore also there is utmost point low ripple voltage content by what regulate that the not regulation output voltage Vunreg that produced by main charge pump 2 produces through regulation voltage Vreg.In addition, for the frequency content in standard RF frequency band, especially true.By contrast, prior art had only not only driven large and variable output load with a charge pump but also the self-control of himself was provided, and therefore can not in regulation output voltage, have this utmost point low ripple voltage content what be fed to large and variable output load.
In one embodiment, V
dDcan be 3 volts, and not regulation output Mt3x on conductor 6 can be 3 × VDD × (efficiency of voltage tripler 5), that is, can close to but be less than 9 volts." GmC1 filtering " function of trsanscondutance amplifier 12 is controlled the grid voltage of source follower transistor 14 with regulation output voltage Mt3x not.The output of amplifier 10 and trsanscondutance amplifier 12 operates to drive the grid of source follower transistor 14 together.The Voltage-output of amplifier 10 is converted into electric current and then in the output of trsanscondutance amplifier 12, is again converted back to 4 times of input voltage in the input stage of trsanscondutance amplifier 12.The unregulated voltage Mt3x filtering most noise of the GmC1 filter function of trsanscondutance amplifier 12 from being produced by main tripler 5.Gained voltage Mt3x_reg on conductor 16 is adjusted to the fixed voltage of the maximum operating efficiency design in its limit of reliability for main Dixon pump 30.The unregulated voltage Vunreg being produced by main Dixon charge pump 30 need to suitably higher than on conductor 60 in the particular range of regulation voltage Vreg so that applicable voltage margin to be provided.And Vreg should not exceed by the maximum of the various integrated circuit packages that are associated and allows the maximum operation level that operating voltage is forced.
Be not adjusted to fixed voltage from the output voltage V ctl of pump 3, but according to control the previous mentioned feedback control loop of source follower transistor 58 regulate in case produce through filtering through regulating the almost output voltage V reg of ripple-free, because Vreg closely follows the voltage Vctl_fil of the grid that is applied to source follower transistor 58.Gained on conductor 60 divides that by resistive voltage divider 61,62 Vreg is provided to (-) input of buffer amplifier 65 through scaled duplicate through regulation voltage Vreg.Cross over (for instance) complete specified V of 2.3 volts to 3.6 volts
dDthe extent of supply, Vreg can be roughly 30 volts.In described situation, feedback voltage Vfb ack on conductor 66 can be 30Vref=volt as produced by resistor divider network 61 and 62 and cushion by unity gain buffer 65 through scaled expression, and will be in close proximity to from the reference voltage Vref _ SH of the integrator amplifier 40 of pump 3.Feedback voltage Vfb ack on conductor 66 provides utmost point low bandwidth feedback and needs few current/power consumption together with switched-capacitor circuits 68,69,70.The output Vintg of integrator 40 advances to the input of the trsanscondutance amplifier 38 (, be similar to trsanscondutance amplifier 12 and operate) that serves as GmC2 wave filter.The output of trsanscondutance amplifier 38 is connected to the grid of source follower transistor 46 by conductor 44.The source electrode of the source follower transistor 46 from pump 3 is connected to the first order input from Dixon charge pump 50.
Prior art Fig. 2 shows the main tripler 5 that can be used for implementing in Fig. 1 and from both voltage triplers 5 of tripler 36.Voltage tripler 5 is the slight modifications to the well-known basic structure for multilevel voltage booster circuit (comprising voltage tripler).Available supply voltage V on conductor 79
dDfor the input to the first voltage-boosting stage that comprises N channel transistor MN1 and MN0, p channel transistor MP0 and MP2 and capacitor C6 and C7.Via conductor 84 and 85, not overlapping clock signal clk and logic complement nCLK thereof are applied to respectively to the lower terminal of capacitor C6 and C7.The upper terminal of capacitor C6 is connected to source electrode, the grid of transistor MP0 and the drain electrode of transistor MP2 of transistor MN1 by conductor 81.The upper terminal of capacitor C7 is connected to source electrode, the grid of transistor MP2 and the drain electrode of transistor MP0 of transistor MN0 by conductor 80.The drain electrode of transistor MN1 and MN0 is connected to V
dDinput conductor 79, and the source electrode of transistor MP0 and MP2 is connected to conductor 78, the voltage 2 × V of generation through boosting on conductor 78
dD.Holding capacitor C1 is stored in and on conductor 78, maintains the voltage 2 × V through boosting
dDthe necessary electric charge through periodic replenishment.Latch cicuit 90, NOR door 88 and 89 and impact damper 86 and 87 operate the basic clock signal OSC producing with the clock signal circuit 4 in response to by Fig. 1 and produce not overlapping clock signal clk and nCLK.Even if voltage tripler 5 is for making system clock OSC continue also can turn-off master/slave charge pump 1 through enable circuit.
Similarly, voltage 2 × V of " through boosting once " on conductor 79
dDfor the input of the second voltage-boosting stage to voltage tripler 5.Described the second voltage-boosting stage comprises N channel transistor MN3 and MN4, p channel transistor MP5 and MP4 and capacitor C3 and C4.Via conductor 84 and 85, not overlapping clock signal clk and nCLK are applied to respectively to the lower terminal of capacitor C3 and C4.The upper terminal of capacitor C3 is connected to source electrode, the grid of transistor MP5 and the drain electrode of transistor MP4 of transistor MN3 by conductor 82.The upper terminal of capacitor C4 is connected to source electrode, the grid of transistor MP4 and the drain electrode of transistor MP5 of transistor MN4 by conductor 83.The drain electrode of transistor MN3 and MN4 is connected to 2 × V
dDconductor 78, and the source electrode of transistor MP5 and MP4 is connected to " through boosting twice " voltage tripler output conductor 6, the voltage 3 × V of generation through boosting on output conductor 6
dD.Holding capacitor C2 is stored in and on voltage tripler output conductor 6, maintains the voltage 3 × V through boosting
dDthe necessary electric charge through periodic replenishment.(note, if needed, can add so extra similar voltage-boosting stage to provide additionally " V to voltage tripler output voltage
dDlever boosting ".)
Source electrode, grid and the body electrode of diode connection p channel transistor MP3 is connected to the output conductor 6 of voltage tripler 5.The drain electrode of diode connection transistor MP3 is connected to the input conductor 79 of voltage tripler 5.In the time that voltage tripler 5 is energized, diode connects transistor MP3 and operates to provide and to equal lower than V on output conductor 6
dDthe initial voltage of a diode drop, this can contribute to the voltage on output conductor 6 to boost towards 3 × VDD.
As the example of the operation of voltage tripler 5, because the voltage on conductor 81 suppose that for high transistor MN1 turn-offs and transistor MN0 connects, and also suppose nCLK for low CLK be height.And transistor MP0 will turn-off.Because transistor MN0 connects, therefore capacitor C7 will be charged that the boost in voltage of conductor 80 is arrived to V
dD.Then, when nCLK uprises and when CLK step-down, the voltage on conductor 80 will be boosted to 2 × V
dDand transistor MP0 will turn-off.This will cause the electric charge on capacitor C7 to be " pushed " through transistor MP0 to supplement 2 × V on conductor 78
dD.When the voltage due on conductor 80 turn-offs and when transistor MN1 connects, is operating as similarly for height transistor MN0.When CLK is low and when nCLK is high, transistor MP1 will turn-off and transistor MN1 will connect, therefore capacitor C6 by through charging with by the boost in voltage of conductor 81 to V
dD.Then,, in the time that CLK becomes high level and nCK and becomes low level, the voltage of conductor 81 will be boosted to 2 × V
dDand MP1 will connect.This will cause the electric charge on capacitor C6 to be " pushed " through transistor MP1 to supplement 2 × V on conductor 78
dD.
The operation of mentioned the second voltage-boosting stage above that comprises N channel transistor MN3 and MN4, p channel transistor MP5 and MP4 and capacitor C3 and C4 is quite analogous to the aforementioned operation of the first voltage-boosting stage, only to the 2 × V that is input as of the second voltage-boosting stage
dDbut not V
dDand it is output as 3 × V
dDbut not 2 × V
dD.
Fig. 3 shows the main Dixon charge pump 30 that can be used for implementing in Fig. 1 and the Dixon charge pump 30 from Dixon charge pump 50.With reference to figure 3, the Dixon charge pump input voltage V on conductor 16
iNcan be Mt3x_reg or St3x_reg in Fig. 1.Conductor 16 is connected to the anode of diode D0, drain electrode, the anode of diode D1 and the drain electrode of N channel transistor MM5 of N channel transistor MN0.The source electrode of transistor MN0 is connected to the negative electrode of diode D0, a terminal of pump capacitor C0, source electrode, the grid of transistor MN5 and the grid of p channel transistor MP10 of p channel transistor MP0 by conductor 94.The source electrode of transistor MN5 is connected to the negative electrode of diode D1, a terminal of pump capacitor C1, source electrode, the grid of transistor MN0 and the grid of transistor MP0 of transistor MP10 by conductor 95.The drain electrode of transistor MP0 and MP10 is connected to conductor 34, can produce Vunreg or Vctl in Fig. 1 on conductor 34.The another terminal that the another terminal of pump capacitor C0 is connected to nCLK and pump capacitor C1 is connected to CLK, and CLK and nCLK out-phase 180 are spent.As previously mentioned, be applied to the clock signal clk of two Dixon charge pumps 30 and 50 and the frequency of nCLK be drive two voltage triplers 5 and 36 clock signal frequency 1/16th.The reason of large difference on the frequency is owing to the following fact: in Dixon charge pump, exist than voltage much higher in voltage tripler and increase, and this causes by making described voltage tripler with than the high frequencies operations of Dixon charge pump and lasting heavy current loading on voltage tripler.Can cascade be applicable to a number Dixon charge pump to produce compared with high output voltage Vunreg or Vctl.
As the example of the operation of Dixon charge pump 30, suppose that nCLK becomes low voltage level and CLK becomes high-voltage level.The low level of nCLK causes transistor MP10 to connect and also causes transistor MN5 to turn-off.CLK causes the flow of charge that is stored on capacitor C1 through transistor MP10 to the transformation of high level, whereby the voltage on conductor 34 is charged or " pumping " to drive the variable load 75 (Fig. 1) that is coupled to conductor 34.The high level of CLK is connected transistor MN0 and is turn-offed transistor MP0.Therefore, the input voltage on conductor 16 causes current flowing to pass transistor MN0 to charge to capacitor C0.Similarly, in the time that CLK becomes low voltage level and nCLK and becomes high voltage, the low level of CLK causes transistor MP0 to connect and also causes transistor MN0 to turn-off.NCLK to the transformation of high level cause the flow of charge that is stored on capacitor C0 through transistor MP0 and whereby the voltage on conductor 34 is charged or pumping to drive the load that is connected to it.The high level of nCLK is connected transistor MN5 and is turn-offed transistor MP10.Therefore, the input voltage on conductor 16 causes current flowing to pass transistor MN5 so that capacitor C1 is charged.
Produce unregulated voltage St3x from tripler, unregulated voltage St3x is then through regulating using generation St3x_reg as in check through regulation voltage.Control St3x_reg voltage level by the feedback control loop of value of controlling Vreg in response to Vfback and reference voltage Vref _ SH.Vreg through resistively scaled and buffering with produce Vfback.In (-) input of switched capacitor type integrator amplifier 40, Vfback is sampled, switched capacitor type integrator amplifier 40 operates to control from Dixon charge pump 3 to Vfback is mated with Vref_SH.This causes the low bandwidth of integrator output voltage Vintg.Then make Vintg operation through the GmC2 filter function of trsanscondutance amplifier 38 with fixed gain to drive the grid of source follower transistor 46, in check through regulation voltage St3x_reg voltage to produce whereby, described voltage is coupled to 2 inputs from the input of Dixon charge pump 50 and clock level shifter 49.
MS master-slave charge pump topology demonstrated in Figure 1 by the output of main pump 2 with from the much lower noise output decoupling of pump 3, be then used in the input of the noise-sensitive grid that controls to source follower transistor 58 from pump 3.This causes utmost point low ripple noise amplitude in RF communication band and the low noise contents and also cause Vreg and v of looking genuine
bIASto the minimum susceptibility of the large variation in variable load 75.
The master/slave charge pump 1 of Fig. 1 is had the extremely low RF of looking genuine noise level and is provided the high multiplication constant bias voltage that be suitable for low-power, low noise applications to produce through fine adjustment through the high voltage source that boosts through the interdependent variation of extremely low load of booster voltage by generation.
Technical staff that the invention relates to the field will understand, in advocated scope of invention, can to described exemplary embodiment make revise and in addition many other embodiment be possible.
Claims (20)
1. a charge pump circuit, it comprises:
(a) main charge pump circuit, it comprises
1) for generation of the principal voltage multiplier circuit of the first unregulated voltage and for regulating described the first unregulated voltage to produce the first first regulating circuit that is associated through regulation voltage, and
2) main pump excitation circuit, it is for boosting to produce the unregulated voltage through boosting to described first through regulation voltage;
(b), from charge pump circuit, it comprises
1) for generation of the second unregulated voltage from voltage multiplier circuit and for regulating described the second unregulated voltage to produce the second second regulating circuit that is associated through regulation voltage, and
2), from pumping circuit, it is for boosting to produce through boosting rectifier control voltage through regulation voltage to described second;
(c) the 3rd regulating circuit, its through coupling with in response to described regulate through boosting rectifier control voltage the described unregulated voltage through boosting with produce through boost through regulate low noise voltage; And
(d) feedback circuit, its be coupled in described through boost through regulate between low noise voltage and described the second regulating circuit with according to preset reference voltage control to the described adjusting through boosting rectifier control voltage.
2. charge pump circuit according to claim 1, wherein said principal voltage multiplier circuit comprises voltage tripler and described main pump excitation circuit comprises multistage Dixon charge pump.
3. charge pump circuit according to claim 1, wherein saidly comprises voltage tripler and describedly comprises multistage Dixon charge pump from pumping circuit from voltage multiplier circuit.
4. charge pump circuit according to claim 1, wherein said the 3rd regulating circuit comprises N channel source follower transistor and is coupled to the first low-pass filter of the grid of described source follower transistor, the drain electrode of described source follower transistor through coupling to receive the first unregulated voltage through boosting, and the source electrode of described source follower transistor through coupling with provide described through boost through regulating low noise voltage.
5. charge pump circuit according to claim 4, its comprise through coupling with receive described through boost through regulate low noise voltage and to its carry out filtering with produce through boost through regulating the second low-pass filter of low noise bias voltage.
6. charge pump circuit according to claim 5, wherein said through boost through regulating low noise bias voltage to be coupled to variable load.
7. charge pump circuit according to claim 1, it comprises the capacitor that receives described unregulated voltage through boosting and the ripple voltage component from the described unregulated voltage through boosting and transient voltage component are carried out to filtering.
8. charge pump circuit according to claim 1, wherein said the first regulating circuit comprises the first source follower transistor, the first amplifier and the first trsanscondutance amplifier, the drain coupled of described the first source follower transistor is to described the first unregulated voltage, the source electrode of described the first source follower transistor produces described first through regulation voltage, the described source electrode of described the first source follower transistor is also coupled to the input of described the first amplifier, the input of described the first trsanscondutance amplifier is coupled in the output of described the first amplifier, and the grid of described the first source follower transistor is coupled in the output of described the first trsanscondutance amplifier, described the first trsanscondutance amplifier is configured to described the first unregulated voltage to carry out filtering.
9. charge pump circuit according to claim 1, wherein said the second regulating circuit comprises the second source follower transistor, the second amplifier and the second trsanscondutance amplifier, the drain coupled of described the second source follower transistor is to described the second unregulated voltage, the source electrode of described the second source follower transistor produces described second through regulation voltage, the grid of described the second source follower transistor is coupled in the output of described the second trsanscondutance amplifier, the input of described the second trsanscondutance amplifier is coupled in the output of described the second amplifier, the first input of described the second amplifier is through being coupled to receive described preset reference voltage, second of described the second amplifier is inputted the output of being coupled to described feedback circuit, described the second trsanscondutance amplifier is configured to described the second unregulated voltage to carry out filtering.
10. charge pump circuit according to claim 9, wherein said the second amplifier is configured to integrating amplifier.
11. charge pump circuits according to claim 2, wherein said main charge pump circuit comprises clock level shift circuit, input for clocking as the described multistage Dixon charge pump to described main pump excitation circuit, to cause the amplitude of described clock signal to follow the tracks of the described first value through regulation voltage.
12. charge pump circuits according to claim 3, wherein saidly comprise clock level shift circuit from charge pump circuit, for clocking as to the input of the described described multistage Dixon charge pump from pumping circuit, to cause the amplitude of described clock signal to follow the tracks of the described second value through regulation voltage.
13. charge pump circuits according to claim 1, wherein said feedback circuit comprises bleeder circuit, described bleeder circuit be coupled in described through boost through regulating between low noise voltage and the input of feedback amplifier, to cause the described preset reference voltage of reference to amplify in proportion described through boosting rectifier control voltage.
14. charge pump circuits according to claim 13, wherein said feedback amplifier is configured to unity gain buffer.
15. 1 kinds of methods for generation of the low noise reference voltage through boosting, described method comprises:
(a) produce the first unregulated voltage by means of principal voltage multiplier circuit, and regulate described the first unregulated voltage to produce first through regulation voltage;
(b) boost produce unregulated voltage through boost to described first through regulation voltage by means of main pump excitation circuit;
(c) by means of produce the second unregulated voltage from voltage multiplier circuit, and regulate described the second unregulated voltage to produce second through regulation voltage;
(d) by means of boosting to produce through boosting rectifier control voltage through regulation voltage from pumping circuit to described second;
(e) in response to described regulate through boosting rectifier control voltage the described unregulated voltage through boosting with produce through boost through regulate low noise voltage; And
(f) by means of be coupled in described through boost through regulating feedback circuit between low noise voltage and the second regulating circuit according to preset reference voltage control to the described adjusting through boosting rectifier control voltage.
16. methods according to claim 15, it comprises by means of low-pass filter and carries out filtering to described through boosting rectifier control voltage, and be applied to the grid of N channel source follower transistor through filtering through boosting rectifier control voltage by described, the drain electrode of described source follower transistor through coupling to receive the first unregulated voltage through boosting, and the source electrode of described source follower transistor through coupling with provide described through boost through regulating low noise voltage.
17. methods according to claim 15, it comprises by means of principal voltage tripler circuit and the described unregulated voltage through boosting of main Dixon charge pump excitation circuit generation, and by means of producing described through boosting rectifier control voltage from voltage tripler circuit and main Dixon charge pump excitation circuit.
18. methods according to claim 16, its comprise to described through boost through regulate low noise voltage carry out filtering with produce through boost through regulating low noise bias voltage.
19. methods according to claim 15, its comprise by means of be coupled in described through boost through regulating the bleeder circuit between low noise voltage and the input of feedback amplifier to amplify in proportion described through boosting rectifier control voltage with respect to preset reference voltage.
20. 1 kinds of systems for generation of the low noise reference voltage through boosting, it comprises:
(a) for producing the first unregulated voltage by means of principal voltage multiplier circuit and regulating described the first unregulated voltage to produce the first member through regulation voltage;
(b) for boosting produce the member of unregulated voltage through boost to described first through regulation voltage by means of main pump excitation circuit;
(c) for by means of producing the second unregulated voltage from voltage multiplier circuit and regulating described the second unregulated voltage to produce the second member through regulation voltage;
(d) for by means of boosting to produce the member through boosting rectifier control voltage from pumping circuit to described second through regulation voltage;
(e) regulate the described unregulated voltage through boosting to produce the member through adjusting low noise voltage through boosting through boosting rectifier control voltage in response to described; And
(f) by means of be coupled in described through boost through regulating feedback circuit between low noise voltage and the second regulating circuit according to preset reference voltage control the member to the described adjusting through boosting rectifier control voltage.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/373,117 US8482340B2 (en) | 2011-11-04 | 2011-11-04 | Master-slave low-noise charge pump circuit and method |
| US13/373,117 | 2011-11-04 | ||
| PCT/US2012/063496 WO2013067474A1 (en) | 2011-11-04 | 2012-11-05 | Master-slave low-noise charge pump circuit and method |
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| Publication Number | Publication Date |
|---|---|
| CN103917936A true CN103917936A (en) | 2014-07-09 |
| CN103917936B CN103917936B (en) | 2015-07-15 |
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| CN201280053905.4A Active CN103917936B (en) | 2011-11-04 | 2012-11-05 | Master-slave low-noise charge pump circuit and method |
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| Country | Link |
|---|---|
| US (1) | US8482340B2 (en) |
| JP (1) | JP6118809B2 (en) |
| CN (1) | CN103917936B (en) |
| WO (1) | WO2013067474A1 (en) |
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| CN110022058A (en) * | 2017-12-20 | 2019-07-16 | 美光科技公司 | Electronic device and double booster type charge pump |
| CN110661416A (en) * | 2018-06-28 | 2020-01-07 | 罗伯特·博世有限公司 | Regulated high voltage reference |
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Also Published As
| Publication number | Publication date |
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| JP6118809B2 (en) | 2017-04-19 |
| CN103917936B (en) | 2015-07-15 |
| WO2013067474A1 (en) | 2013-05-10 |
| JP2014533090A (en) | 2014-12-08 |
| US8482340B2 (en) | 2013-07-09 |
| US20130113546A1 (en) | 2013-05-09 |
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