CN103903365A - Embedded network invoice issuing system - Google Patents
Embedded network invoice issuing system Download PDFInfo
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- CN103903365A CN103903365A CN201210580326.7A CN201210580326A CN103903365A CN 103903365 A CN103903365 A CN 103903365A CN 201210580326 A CN201210580326 A CN 201210580326A CN 103903365 A CN103903365 A CN 103903365A
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Abstract
The invention discloses an embedded network invoice issuing system. The embedded network invoice issuing system comprises multiple embedded microprocessors, a safety processor and a switching control unit. The multiple embedded microprocessors are respectively connected with the safety processor and send self-check signals to the safety processor; the safety processor receives the self-check signals and performs detection; when it is found that there are errors in the received self-check signals or the self-check signals are not received within prescribed time, the safety processor emits reset signals to embedded microprocessors corresponding to the self-check signals to reset the embedded microprocessors; at the same time, the safety processor sends switching signals to the switching control unit for switching a currently working embedded microprocessor; and the switching control unit is connected with the multiple embedded microprocessors for performing switching control on the multiple embedded microprocessors. The embedded network invoice issuing system has the advantages of simple structure, low cost, substantially enhanced system stability and improved work efficiency.
Description
Technical field
The present invention relates to Embedded network system technology, particularly a kind of built-in network billing system reliable and stable, with low cost.
Background technology
Need to walk abreast and open the problem of VAT invoice in multiple point of sales in order to solve large-scale chain, need design companies billing server system, realize at net environment the function that multiple spot is made out an invoice to help enterprise to realize.
Enterprise's billing server system is taking enterprise-level billing server specialized equipment that novel tax-card is installed as core, tax-supervise system safety technique and network technology are combined, (respectively make out an invoice a little without the specialized equipments such as independent tax-card are installed as medium connects all kinds of terminals of making out an invoice taking intranet or VPN VLAN, only need to install client software and correct safety certificate), make enterprise can realize the multiple spot function of making out an invoice at net environment.Existing enterprise's billing server system is made up of make out an invoice terminal and server admin control desk three parts of enterprise-level billing server, enterprise.
Existing enterprise billing server comprises the special PC server of high-performance, novel high-capacity server-specific tax-controlling card and associated server application system, in order to receive the types of functionality request that responds make out an invoice client and server management system, and complete phase tax-controlling card funcall, to realize functions such as the information encryption and decryption of making out an invoice, the data of making out an invoice storages, and result is returned to make out an invoice terminal and supervisor console.Billing server also needs to realize the operation that administers and maintains to the server system of making out an invoice except completing the function of normally making out an invoice, comprise user management, managing bill, system send a duplicate to tax, during carry down, the function such as data backup.Billing server pipe with USB declare dutiable goods dish mode realize billing server system enterprise's booking, send a duplicate to tax etc. and tax interoffice interactive service function.
Because existing enterprise billing server adopts power PC server, there is very high hardware configuration, so just cause server to there is the speciality such as with high costs, bulky, power consumption is high.This makes billing server business be subject to very large restriction in the promotion and application that to some sites and the amount of making out an invoice are not too many enterprise.General PC server is more easily subject to virus invasion and network attack simultaneously, and security and robustness to whole system cause harmful effect.
Summary of the invention
To the object of the invention is the shortcoming that existing network billing machine cost is high in order solving, volume large, security performance is not high, a kind of with low cost, simple in structure, safe and reliable built-in network billing system to be provided.
For reaching above-mentioned purpose, the invention provides a kind of built-in network billing system, comprise multiple embedded microprocessors, a safe processor and a switch control unit; Described multiple embedded microprocessor is connected with described safe processor respectively, to described safe processor timed sending self-test signal, described safe processor receives described self-test signal and detects, in the time finding that the self-test signal received is wrong or do not receive self-test signal at the appointed time, described safe processor sends its reset of reset enable signal to the embedded microprocessor corresponding with described self-test signal; Simultaneously described safe processor sends switching signal to described switch control unit, in order to switch the embedded microprocessor of work at present; Described switch control unit is all connected with described multiple embedded microprocessors, and described multiple embedded microprocessors are carried out to switching controls.
A kind of built-in network billing system provided by the invention, wherein, is directly connected by data bus between described multiple embedded microprocessors, described safe processor and described switch control unit.
A kind of built-in network billing system provided by the invention, wherein, the signal of communication between described multiple embedded microprocessors and described switch control unit comprises write control signal, reads control signal, write state signal and read state signal.
A kind of built-in network billing system provided by the invention, wherein, the signal of communication between described safe processor and described switch control unit comprises switching signal, write control signal, reads control signal, write state signal and read state signal.
Compared with prior art, the present invention has following beneficial effect:
1, the present invention uses lower cost and energy consumption to complete the function of power PC server
2, between main embedded microprocessor of the present invention and special tax control encryption and decryption safe processor, be directly connected by high-speed bus, the raising of the conversion layer by layer system effectiveness of bus and agreement in general scheme before avoiding.
3, in the present invention, the use of embedded system and Redundancy Design makes system more healthy and stronger and reliable.
Brief description of the drawings
Fig. 1 is structural representation of the present invention;
Fig. 2 is the sequential chart in data writing stage of the present invention;
Fig. 3 is the sequential chart of read data phase of the present invention.
Description of reference numerals: 01-the first embedded microprocessor; 02-the second embedded microprocessor; 03-safe processor; 04-switch control unit.
Embodiment
Below in conjunction with accompanying drawing, just above-mentioned technical characterictic and the advantage with other of the present invention is described further.
Fig. 1 is the structural representation of a specific embodiment of the present invention.In this embodiment, the present invention includes the first embedded microprocessor 01, the second embedded microprocessor 02, safe processor 03 and switch control unit 04.
Wherein the first embedded microprocessor 01 and the high-performance embedded SOC microprocessor of the second embedded microprocessor 02 for containing ethernet controller and USB2.0HighSpeedHost interface, kernel operation linux system.Safe processor 03 is special tax-controlling card, realizes in order to the safety of the function that ensures normally to make out an invoice.04 of switch control unit is for realizing Redundancy Design of the present invention, for switching different embedded microprocessors.In the present embodiment, regulation the first embedded microprocessor 01 is main embedded microprocessor, and the second embedded microprocessor 02 is from embedded microprocessor.
When enforcement, the first embedded microprocessor 01 and the second embedded microprocessor 02 are chosen as ARM9 processor LPC3130.LPC3130 processor has USB 2.0 Host interfaces and a network interface of high speed, possesses multiple GPIO interfaces that can be multiplexing simultaneously.The GPIO interface of being correlated with is defined as respectively: write control signal port, is made as output; Write state signal port, is made as input; Read control signal port, be made as output; Read state signal port, is made as input; And self-inspection status signal port.
Specific works process is as follows:
The first embedded microprocessor 01 receives the information of making out an invoice that network interface sends over, and sends it to tax control Special safety processor 03.Whether first the first embedded microprocessor 01 detects write state signal is high level, if low, continues to wait for, until detect and just start to transmit data when write state signal is high level.The first embedded microprocessor 01 after data are placed on data bus sets low write control signal, and tax control Special safety processor detects after write control signal that reading out data from data bus sets low write state signal afterwards.The first embedded microprocessor 01 detects after write state signal step-down, write control signal is reverted to high level state.After reading, after tax control Special safety processor 03 detects that write control signal uprises, write state signal is set high.Thereby complete data writing process.Its sequential as shown in Figure 2.
The first embedded microprocessor 01 sends after all information, judge that whether read state signal is high, if low, continues to wait for, until detect that read state signal is after high level, read signal to be set low, wait for the result of reading in tax control Special safety processor 03.Tax control Special safety processor 03 is by after data processing, start to detect read signal, in the time reading control signal step-down, tax control safe processor 03 is placed in the data of handling on data bus, wait for that the first embedded microprocessor 01 reads, and sets low read state signal afterwards.The first embedded microprocessor 01 detects when read state signal is low level, reads corresponding data from data bus.After reading, the first embedded microprocessor 01 will read control signal and set high.After tax control Special safety processor 03 detects that reading control signal uprises, corresponding read state signal is set high, thereby complete data read process.Afterwards, the first embedded microprocessor 01 by the data after treatment that read from tax control safe processor 03, returns to by Ethernet the end of making out an invoice again.Its sequential as shown in Figure 3.
Under normal circumstances, on the first embedded microprocessor 01, the linux system of operation is set to main system, respectively makes out an invoice to hold between it and carries out communication.Simultaneously the first embedded microprocessor 01 and the second embedded microprocessor 02 timing carried out self-inspection to system and external interface, after self-inspection, self-detection result sent to tax control Special safety processor 03 by self-inspection status signal independently.As, it is normal to safe processor 03 reporting system that the every 100ms of each embedded microprocessor sends the low pulse that a length is 5ms, and the inner variable 3130_status that uses of safe processor 03 stores each status information.When detecting wrong or the first embedded microprocessor 01 of the self-inspection information of the first embedded microprocessor 01, tax control Special safety processor 03 in official hour, do not return to self-detection result, tax control safe processor 03 thinks that the first embedded microprocessor 01 breaks down, and is 0 by the relevant position of 3130_status variable.Safe processor 03 sends reset enable signal the first embedded microprocessor 01 and resets, and switching signal is set high simultaneously, and order switch control unit 04 gating the second embedded microprocessor 02 works on.If can normally work after the first embedded microprocessor 01 resets, send correct status signal.Safe processor 03 is 1 by the relevant position of 3130_status variable, and in the time that the second embedded microprocessor 02 is abnormal, the first embedded microprocessor 01 is switched back in operation equally again.If the first embedded microprocessor 01 cannot normally be worked and send correct status signal after being resetted, this position is always 0, until the second embedded microprocessor 02 when abnormal, and due to the equal mistake of two embedded systems, system buzzing warning.
More than explanation is just illustrative for the purpose of the present invention, and nonrestrictive, those of ordinary skill in the art understand; in the case of not departing from the spirit and scope that following claims limit, can make many amendments, change; or equivalence, but all will fall within the scope of protection of the present invention.
Claims (4)
1. a built-in network billing system, is characterized in that, comprises multiple embedded microprocessors, a safe processor and a switch control unit; Described multiple embedded microprocessor is connected with described safe processor respectively, to described safe processor timed sending self-test signal, described safe processor receives described self-test signal and detects, in the time finding that the self-test signal received is wrong or do not receive self-test signal at the appointed time, described safe processor sends its reset of reset enable signal to the embedded microprocessor corresponding with described self-test signal; Simultaneously described safe processor sends switching signal to described switch control unit, in order to switch the embedded microprocessor of work at present; Described switch control unit is all connected with described multiple embedded microprocessors, and described multiple embedded microprocessors are carried out to switching controls.
2. a kind of built-in network billing system according to claim 1, is characterized in that, between described multiple embedded microprocessors, described safe processor and described switch control unit, is directly connected by data bus.
3. a kind of built-in network billing system according to claim 1, it is characterized in that, the signal of communication between described multiple embedded microprocessors and described switch control unit comprises write control signal, reads control signal, write state signal and read state signal.
4. a kind of built-in network billing system according to claim 1, it is characterized in that, the signal of communication between described safe processor and described switch control unit comprises switching signal, write control signal, reads control signal, write state signal and read state signal.
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| CN201210580326.7A CN103903365A (en) | 2012-12-27 | 2012-12-27 | Embedded network invoice issuing system |
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| CN201210580326.7A CN103903365A (en) | 2012-12-27 | 2012-12-27 | Embedded network invoice issuing system |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200993804Y (en) * | 2006-12-20 | 2007-12-19 | 航天信息股份有限公司 | Financial tax-controlling cash register |
| CN101149859A (en) * | 2007-11-05 | 2008-03-26 | 浪潮齐鲁软件产业有限公司 | Tax controlled cashier serial time division multiplexing extension method |
| CN201111281Y (en) * | 2007-09-28 | 2008-09-03 | 航天信息股份有限公司 | False proof tax control counting machine |
| CN101281483A (en) * | 2008-05-12 | 2008-10-08 | 北京邮电大学 | Double-machine redundant tolerant system and redundant switching method thereof |
| CN101458647A (en) * | 2007-12-12 | 2009-06-17 | 鸿富锦精密工业（深圳）有限公司 | Double-BIOS circuit |
| CN101556722A (en) * | 2009-05-15 | 2009-10-14 | 浪潮齐鲁软件产业有限公司 | Method for constructing high-efficiency fiscal cash register under cooperation of multi-CPU |
| CN101634959A (en) * | 2009-08-21 | 2010-01-27 | 北京航空航天大学 | Dual redundant fault-tolerant system based on embedded type CPU, |
| CN202049564U (en) * | 2010-07-14 | 2011-11-23 | 广东亿业科技有限公司 | Electronic bill processing device |
-
2012
- 2012-12-27 CN CN201210580326.7A patent/CN103903365A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200993804Y (en) * | 2006-12-20 | 2007-12-19 | 航天信息股份有限公司 | Financial tax-controlling cash register |
| CN201111281Y (en) * | 2007-09-28 | 2008-09-03 | 航天信息股份有限公司 | False proof tax control counting machine |
| CN101149859A (en) * | 2007-11-05 | 2008-03-26 | 浪潮齐鲁软件产业有限公司 | Tax controlled cashier serial time division multiplexing extension method |
| CN101458647A (en) * | 2007-12-12 | 2009-06-17 | 鸿富锦精密工业（深圳）有限公司 | Double-BIOS circuit |
| CN101281483A (en) * | 2008-05-12 | 2008-10-08 | 北京邮电大学 | Double-machine redundant tolerant system and redundant switching method thereof |
| CN101556722A (en) * | 2009-05-15 | 2009-10-14 | 浪潮齐鲁软件产业有限公司 | Method for constructing high-efficiency fiscal cash register under cooperation of multi-CPU |
| CN101634959A (en) * | 2009-08-21 | 2010-01-27 | 北京航空航天大学 | Dual redundant fault-tolerant system based on embedded type CPU, |
| CN202049564U (en) * | 2010-07-14 | 2011-11-23 | 广东亿业科技有限公司 | Electronic bill processing device |
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Application publication date: 20140702 |