CN103902741A - Flash file storing system - Google Patents
Flash file storing system Download PDFInfo
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- CN103902741A CN103902741A CN201410163186.2A CN201410163186A CN103902741A CN 103902741 A CN103902741 A CN 103902741A CN 201410163186 A CN201410163186 A CN 201410163186A CN 103902741 A CN103902741 A CN 103902741A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/10—File systems; File servers
- G06F16/13—File access structures, e.g. distributed indices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- Databases & Information Systems (AREA)
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- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
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Abstract
The invention discloses a Flash file storing system. The system comprises a Flash file storing block managing module, a file information managing module, a file operating and managing module and a specific operating and managing module for a signal system. According to the Flash file storing system, the actual storing space is managed by effectively arranging block addresses of a Flash chip array, the block addresses of the file system meet the using requirement of the high-speed Flash file storing system, a set of flexible file managing APIs are provided, and meanwhile a specific operation interface is provided for a signal recording system.
Description
Technical field
The present invention relates to field of computer technology, relate in particular to a kind of Flash memory file system.
Background technology
High-speed data acquisition is widely used in that radar, signal are processed at present and communication etc. need to be carried out the field of signal record, more and more higher to the demand of high-speed high capacity storage thus, and use dirigibility and the stability of storage system are had higher requirement.Therefore be of great immediate significance for exploitation and the research of the file system of high speed Flash storage aspect.
But in prior art, due to the problem of production technology, may there is certain bad piece in Flash storer in the time dispatching from the factory.These intrinsic bad pieces can not be used for storing data.In addition, in use procedure, due to read-write increased frequency, good piece also can become unstable or lose efficacy, and becomes bad piece (even if damaging piece).Be intrinsic bad piece or make to damage piece it all can have impact to Flash memory file system, therefore the how management of the storage block (comprise bad piece, available block and used piece) of rationalization's Flash File System, with the Flash chip of the greater number that at utmost walks abreast, thereby reaching the object of high-speed data storage, is those skilled in the art's technical matters urgently to be resolved hurrily.
Summary of the invention
The object of this invention is to provide a kind of high speed Flash memory file system, realized the space management to Flash memory device, make the storage speed of Flash memory device obtain effectively significantly promoting by this file system.
In order to achieve the above object, technical scheme of the present invention is achieved in that
A kind of high speed Flash memory file system, comprises multiple Flash chip arrays, also comprises: storage block administration module, wherein:
Described storage block administration module, for organizing the space piece of Flash chip array, according to the attribute information of file, and utilizes the space piece of required size to organize, maximized parallel used Flash chip.
Compared with prior art, the advantage of the embodiment of the present invention is:
A kind of Flash memory file system provided by the invention, as seen from the above technical solution provided by the invention, the high speed Flash memory file system that the embodiment of the present invention provides has complete storage space management function and file management facilities, excellent performance, module are succinct, can realize the effective document management to Flash memory device.
Accompanying drawing explanation
The Flash File System software configuration principle schematic that Fig. 1 provides for the embodiment of the present invention;
The piece arrangement mode schematic diagram of the Flash File System that Fig. 2 provides for the embodiment of the present invention;
The file of the Flash File System that Fig. 3 provides for the embodiment of the present invention is deleted schematic flow sheet.
The bad block table data layout schematic diagram relating in the Flash File System that Fig. 4 provides for the embodiment of the present invention;
The single available block information data format relating in the Flash File System that Fig. 5 provides for the embodiment of the present invention;
The bad piece of displaying relating in the Flash File System that Fig. 6 provides for the embodiment of the present invention is to the generation relation of available block table.
Embodiment
Also by reference to the accompanying drawings the present invention is described in further detail below by specific embodiment.
Referring to Fig. 1, the embodiment of the present invention provides a kind of Flash memory file system, comprises multiple Flash chip arrays, also comprises: storage block administration module, wherein:
Described storage block administration module, for organizing the space piece of Flash chip array, according to the attribute information of file, and utilizes the space piece of required size to organize, maximized parallel used Flash chip.
It should be noted that, this storage block administration module can utilize the space piece of required size to carry out the tissue of ad hoc fashion, and maximized parallel use Flash hardware, so that high speed storing is used.
Attribute information to file and above-mentioned storage block administration module are how according to the attribute information of file below, utilize space piece to carry out tissue manipulation and do and specifically introduce:
The attribute information of file comprises: file name, storage class, grab type, creation-time, service time, file size, file be block end address, the use amount skew of last piece, User Defined 128 byte information at storage card in the piece start address of storage card, file.Just can find the data position of file by the starting block address in as above information and end block address.File is sequential storage mode.
The concrete theory structure of the Flash the memory file system below embodiment of the present invention being provided is described further:
Preferably, described storage block administration module comprises bad block management unit, available block administrative unit and used piece administrative unit, wherein:
Described bad block management unit, for the treatment of the bad piece in Flash memory file system;
It should be noted that, bad block data is one 4, and (sheet selects ROW, each ROW is 8 col, can navigate to the concrete FLASH chip under this fpga control chip by ROW and col) data of x8192 (electing 8192 piece block as for each) x8 (control chip fpga).Wherein each bit of each byte represents the quality of a piece.As shown in Figure 4, in table, each represents the state of a piece, and 1 is labeled as bad piece, and 0 is labeled as available block, as: row0->block1->col1 is 1, represents that it is bad piece that sheet selects 0 the 1st block1 that is listed as Flash.Note, in order to improve the efficiency of dish control algorithm, bad block table is adopted to the mode of row alignment, to above table processing, certain piece of any row is bad piece, and other 7 row all marks are bad piece.If row0->block1->col1 is bad piece, row0->block1->col0, row0->block1->col2, row0->block1->col3, row0->block1->col4, row0->block1->col5, row0->block1->col6, row0->block1->col7 all mark is bad piece, last like this result is that above table only exists two value: 0xff or 0.Dish control software can generate free list with this form.What accompanying drawing 4 represented is the Flash bad block table organizational form that 1 FPGA controls, and the organizational form of FPGA1, FPGA2 and FPGA3 is the same with upper figure, is not listing.
Described available block administrative unit, for the treatment of the available space piece of the residue in Flash memory file system; In the time that Flash memory file system does initialization operation, the data that bad block management unit is sent are processed, and calculate available storage space according to parallel high-speed algorithm; Then according to the available storage space calculating, the block address of Flash chip array is arranged to tissue;
Available block administrative unit is arranged to tissue according to the available storage space calculating to the block address of Flash chip array below and does brief description:
The mode that generates available block table is: generate available block table according to bad block table.What in available block table, preserve is the available block address of Flash, and FPGA can carry out direct control to Flash after these block address.As shown in Figure 5, each block address represents by 4 bytes the organizational form of address, and high 8bit represents row address (sheet choosing), bit[23:16] represent column address, bit[15:0] represent block address, can navigate to thus the block address of any one piece.What in table, represent is a perfect condition, without the situation of bad piece, bit[15:0 so] scope be 0x0000～0x1fff, be total up to 8192 pieces.If certain piece is wherein bad piece, corresponding block address is rejected.As the 1st of: row 0x00, row 0x00 be bad piece, reject bit[15:0] 0x0001 item.4 FPGA corresponding such a form respectively.In order to reach the read-write of high-speed parallel flowing water, address above mentioned need to be arranged according to certain way, so that Flash group control chip is read and write, high-speed read-write algorithm please see below.
Above-mentioned available block administrative unit is calculated to available storage space high speed parallel algorithm according to parallel high-speed algorithm below and does brief description:
In order to reach high speed writing speed, in conjunction with the feature of FLASH programming mode, adopt the parallel mode that adds flowing water; Both operated multiple row FLASH, and a collection of FLASH is after starting to write, and starts immediately writing of next group FLASH, this available block table organization becomes 4 grades and writes pipeline mode simultaneously.In native system, be that 8 FLASH control chips are worked simultaneously, 2 groups of simultaneously each control chip controls totally 16 FLASH, each FLASH chip has 2 sheets choosings, when every task, select 0,1 according to sheet, 2,3 modes are carried out flowing water read-write, write or read flowing water therefore be 4 grades.Flowing water read-write is and in the time that certain one-level flowing water starts operation but do not operated, just starts next stage water operation, so 0->1->2->3-Gre atT.GreaT.GT0->1->2 .... mode is read and write.In order more clearly to show the generation relation of bad piece to available block table, ask for an interview Fig. 6.
The described piece administrative unit of having used, the space piece having used for the treatment of Flash.It should be noted that, the block address of data writing is stored in this unit, in the time having new file to produce, be that a certain amount of available block address date has just been moved to and has used piece memory block, in the time that file is deleted, the corresponding available block of file can be moved to again available block memory block, and the available block of having returned to available block memory block can be re-used.
It should be noted that, storage block administration module for organize Flash reality space piece, bad block management, available/with piece management etc.Wherein piece management algorithm mode is as following manner.
In the management of Flash block space, in order to reach high speed object, adopt as the arrangement mode of Fig. 2.
As shown in Figure 2, walk abreast and classify 0～7, Row scope 0～3 as, parallel Flash is 0～7, block address scope 0～8192.The composition that each pair comprises 4 Row.While read-write, according to walk abreast as the mode of Fig. 2 every a slice Flash chip is operated, thereby reach object at a high speed.
Preferably, above-mentioned Flash memory file system also comprises file information management module, file operation administration module, signal processing operations administration module and hardware driving Adapter, below above-mentioned software module is illustrated:
Described file information management module, for the request processing of fileinfo aspect operation, also for organizing the information data of All Files, stores, deletion and query manipulation.
In addition, described file information management module is also for the storage mode of defined file head and file information data; For the treatment of file information data, and fileinfo is concentrated and is stored in a fritter storage area; For the information of each file, use a file structure body to preserve; This structure include file size, storage space block address information, fileinfo verification, wherein also comprise one for Custom Space for preserving the characteristic information of signal.
It should be noted that, file header represents some data of fileinfo; Document storage mode is single storage hardware storage or many storage hardwares stored in association; Document management module is responsible for resolution file information data or is created file information data, and each fileinfo stores with a fileinfo structure;
Preferably, described file operation administration module, for the treatment of the various file operation requests of last layer interface; Document creation be provided, delete, search, data importing/derivation, format manipulation, in the time of each deleted file, carry out Flash piece erase operation; After each deleted file, block address can be released to the ending of block address, creates file next time and can adopt recycle design preferentially to use other block address.
File operation administration module is realized the concrete operations of file, and provides API for other application call, the establishment of operation include file, deletion, inquiry, derivation, importing and file update operation.This module has been called file information management module, piece administration module and device A dapter module.In order to improve the speed of each establishment file and collection, while adopting file to delete in native system, carry out Flash piece erase operation.In order to improve system serviceable life and to reduce Flash module, native system storage block adopts recycle design to use simultaneously.After each deleted file, block address can be released to the ending of block address.Creating file next time can the preferential block address that uses other.Deletion action as shown in Figure 3.
Preferably, described signal processing operations administration module, for providing start-of-record/stop, hardware playback start/stop, software playback start/stop and Data Analysis operation.
Signal processing operations administration module has been realized signal record and signal playback operation.In the time of Flash memory device and signal collecting device docking, this module has realized following interface.
(1) StartRec ()/StopRec (): start record/stop record;
(2) HardRepStart ()/HardRepStop (): hardware playback/stop playback;
(3) SoftRepStart ()/SoftRepStop (): software playback/stop playback;
(4) ExportSigDat ()/ImportSigDat (): signal data derivation/signal is provided importing.
Preferably, also comprise hardware driving Adapter, wherein:
Described hardware driving Adapter, for being adapted to hardware driving interface the interface that described Flash memory file system can use.
Hardware driving interface Adapter, this adapter provides an interface definition, and in realization, this module drives for different Flash memory devices, and the interface by it according to Adapter encapsulates, and calls for file operation administration module.
In sum, high speed Flash memory file system provided by the invention is a complete file system, the documentary various basic operations of this file system tool, the effective document management of the high speed Flash memory device that can realize.The application of high speed Flash memory file system provided by the invention comprises: universal signal recording unit and general Flash memory device.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (7)
1. a high speed Flash memory file system, comprises multiple Flash chip arrays, it is characterized in that, also comprises: storage block administration module, wherein:
Described storage block administration module, for organizing the space piece of Flash chip array, according to the attribute information of file, and utilizes the space piece of required size to organize, maximized parallel used Flash chip.
2. high speed Flash memory file system as claimed in claim 1, is characterized in that,
Described storage block administration module comprises bad block management unit, available block administrative unit and used piece administrative unit, wherein:
Described bad block management unit, for the treatment of the bad piece in Flash memory file system;
Described available block administrative unit, for the treatment of the available space piece of the residue in Flash memory file system; In the time that Flash memory file system does initialization operation, the data that bad block management unit is sent are processed, and calculate available storage space according to parallel high-speed algorithm; Then according to the available storage space calculating, the block address of Flash chip array is arranged to tissue;
The described piece administrative unit of having used, the space piece having used for the treatment of Flash.
3. high speed Flash memory file system as claimed in claim 1, is characterized in that,
Also comprise file information management module, wherein:
Described file information management module, for the request processing of fileinfo aspect operation, also for organizing the information data of All Files, stores, deletion and query manipulation.
4. high speed Flash memory file system as claimed in claim 1, is characterized in that,
Described file information management module is also for the storage mode of defined file head and file information data; For the treatment of file information data, and fileinfo is concentrated and is stored in a fritter storage area; For the information of each file, use a file structure body to preserve; This structure include file size, storage space block address information, fileinfo verification, wherein also comprise one for Custom Space for preserving the characteristic information of signal.
5. high speed Flash memory file system as claimed in claim 3, is characterized in that,
Also comprise file operation administration module, wherein:
Described file operation administration module, for the treatment of the various file operation requests of last layer interface; Document creation be provided, delete, search, data importing/derivation, format manipulation, in the time of each deleted file, carry out Flash piece erase operation; After each deleted file, block address can be released to the ending of block address, creates file next time and can adopt recycle design preferentially to use other block address.
6. high speed Flash memory file system as claimed in claim 5, is characterized in that,
Also comprise signal processing operations administration module, wherein:
Described signal processing operations administration module, for providing start-of-record/stop, hardware playback start/stop, software playback start/stop and Data Analysis operation.
7. high speed Flash memory file system as claimed in claim 6, is characterized in that,
Also comprise hardware driving Adapter, wherein:
Described hardware driving Adapter, for being adapted to hardware driving interface the interface that described Flash memory file system can use.
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| CN201410163186.2A CN103902741B (en) | 2014-04-22 | 2014-04-22 | A kind of Flash storage files system |
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| CN201410163186.2A CN103902741B (en) | 2014-04-22 | 2014-04-22 | A kind of Flash storage files system |
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| CN103902741B CN103902741B (en) | 2018-04-27 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104376099A (en) * | 2014-11-25 | 2015-02-25 | 贵州电力试验研究院 | Flash-memory-based file system implementation method and device |
| CN104639981A (en) * | 2015-02-05 | 2015-05-20 | 深圳创维－Rgb电子有限公司 | Television system starting method and television |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20100088827A (en) * | 2009-02-02 | 2010-08-11 | 삼성전자주식회사 | Semiconductor memory device and memory system including the same |
| CN103577574A (en) * | 2013-11-05 | 2014-02-12 | 中船重工（武汉）凌久电子有限责任公司 | High-reliability linear file system based on nand flash |
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2014
- 2014-04-22 CN CN201410163186.2A patent/CN103902741B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20100088827A (en) * | 2009-02-02 | 2010-08-11 | 삼성전자주식회사 | Semiconductor memory device and memory system including the same |
| CN103577574A (en) * | 2013-11-05 | 2014-02-12 | 中船重工（武汉）凌久电子有限责任公司 | High-reliability linear file system based on nand flash |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104376099A (en) * | 2014-11-25 | 2015-02-25 | 贵州电力试验研究院 | Flash-memory-based file system implementation method and device |
| CN104639981A (en) * | 2015-02-05 | 2015-05-20 | 深圳创维－Rgb电子有限公司 | Television system starting method and television |
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| CN103902741B (en) | 2018-04-27 |
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