CN103887389A - Epitaxial wafer structure and epitaxial wafer surface roughening method - Google Patents

Epitaxial wafer structure and epitaxial wafer surface roughening method Download PDF

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CN103887389A
CN103887389A CN201210554132.XA CN201210554132A CN103887389A CN 103887389 A CN103887389 A CN 103887389A CN 201210554132 A CN201210554132 A CN 201210554132A CN 103887389 A CN103887389 A CN 103887389A
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nitride layer
layer
epitaxial wafer
substrate
type
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CN103887389B (en
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谢春林
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BYD Semiconductor Co Ltd
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BYD Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention provides an epitaxial wafer structure comprising a substrate, a buffer layer, a first type nitride layer, a luminescent layer and a second type nitride layer. The buffer layer, the first type nitride layer, the luminescent layer and the second type nitride layer are successively formed on the substrate. The second type nitride layer includes a first nitride layer and a second nitride layer, wherein the first nitride layer and the second nitride layer are successively formed on the luminescent layer; the second nitride layer is a heavy-doping nitride layer; and pits are distributed on the surface of the second nitride layer. According to the invention, the heavy-doping nitride layer is added on the epitaxial wafer and chemical corrosion is carried out on the surface of the heavy-doping nitride layer. Because the doped impurity concentration of the heavy-doping nitride layer is high and defects are easily formed and thus the corrosion speed at the defected places is fast, thereby forming pits at the surface of the epitaxial wafer and achieving an objective of epitaxial wafer surface roughening. Therefore, the luminous efficiency of the epitaxial wafer can be effectively improved.

Description

A kind of method of epitaxial slice structure and surface coarsening thereof
Technical field
The invention belongs to semiconductor applications, relate in particular to a kind of method of epitaxial wafer alligatoring.
Background technology
Light-emitting diode (LED) is a kind of junction type electroluminescence semiconductor device that can convert the electrical signal to light signal, because material and the outside air of making LED have larger refractive index difference, III-V family gallium nitride such as making blue light, green glow and the topmost material of white light LEDs at present, the refractive index of gallium nitride material is 2.5 left and right, and the refractive index of outside air is 1.So large refractive index difference, in the communication process of light from optically denser medium to optically thinner medium, a large amount of light are reflected back, finally disappear in LED chip with hot form, luminous without any contribution to LED, cause on the contrary LED chip internal temperature to raise, affect life-span and the luminous efficiency of LED.
Now, have by LED chip is carried out to surface coarsening and improve bright dipping, it is mainly that the contact-making surface of optically denser medium and optically thinner medium is carried out to alligatoring, improve the light extraction efficiency of LED chip to change the mode of incident angle, conventionally adopt the mode of ICP LED surface to be bombarded to reach the object of alligatoring, this needs more expensive ICP etching machines, and cost of manufacture is higher.
Summary of the invention
The present invention is the luminous efficiency of improving LED chip, and a kind of method of epitaxial slice structure and surface coarsening thereof is provided, and can effectively improve the luminous efficiency of LED chip, and technique is simple, and workable, cost is lower.
The invention provides a kind of epitaxial slice structure, comprise substrate, and the resilient coating, first kind nitride layer, luminescent layer and the Second Type nitride layer that on substrate, form successively, described Second Type nitride layer comprises the first nitride layer and the second nitride layer that are formed on successively on luminescent layer, described the second nitride layer doped nitride layer of attaching most importance to, is distributed with pit on described the second nitride layer surface.
The present invention also provides a kind of method of epitaxial wafer surface coarsening, comprising:
Substrate is provided;
On substrate, form resilient coating;
On resilient coating, form first kind nitride layer;
On first kind nitride layer, form luminescent layer;
On luminescent layer, form Second Type nitride layer, described Second Type nitride layer comprises the first nitride layer and the second nitride layer that are formed on successively on luminescent layer, described the second nitride layer doped nitride layer of attaching most importance to;
Form pit on described the second nitride layer surface.
The present invention increases heavy doping nitride layer on epitaxial wafer, and carry out chemical corrosion on its surface, because the concentration of heavy doping nitride layer impurity is high, more easily form defect, the speed of defective local corrosion, thereby on epitaxial wafer surface, form pit, reach the object to epitaxial wafer surface coarsening, effectively raise the light extraction efficiency of epitaxial wafer.
It is simple that the present invention also has technique, workable, lower-cost advantage.
Brief description of the drawings
Fig. 1 is the structural representation of embodiment of the present invention LED chip;
Fig. 2 is the structural representation of another embodiment of the present invention LED chip.
Embodiment
In order to make technical problem solved by the invention, technical scheme and beneficial effect clearer, below in conjunction with embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
As shown in Figures 1 and 2, the invention provides a kind of epitaxial slice structure, comprise substrate 1, and the resilient coating 2, first kind nitride layer 4, luminescent layer 5 and the Second Type nitride layer 8 that on substrate 1, form successively, described Second Type nitride layer 8 comprises the first nitride layer 81 and the second nitride layer 82 that are formed on successively on luminescent layer, described the second nitride layer 82 doped nitride layer of attaching most importance to, is distributed with pit on described the second nitride layer 82 surfaces.
The present invention increases heavy doping nitride layer on epitaxial wafer, and carry out chemical corrosion on its surface, because the concentration of heavy doping nitride layer impurity is high, more easily form defect, the speed of defective local corrosion, thereby on epitaxial wafer surface, form pit, reach the object to epitaxial wafer surface coarsening, effectively raise the light extraction efficiency of epitaxial wafer.
In an embodiment of the present invention, described substrate 1 is plane or patterned substrate, preferably patterned substrate, and patterned substrate can reduce the epitaxial wafer defect of growth, improves epitaxial wafer crystal mass; The shape of described patterned substrate comprises strip, column, cone-shaped or spherical crown shape.
The material of substrate 1 can be selected sapphire, SiC or Si, preferably adopts Sapphire Substrate.
In another embodiment of the present invention, described substrate 1 is patterned substrate, and described resilient coating 2 comprises: the first intrinsic gallium nitride layer 21 and be formed on the second intrinsic gallium nitride layer 22 on the first intrinsic gallium nitride layer 21.So, can obtain the good gallium nitride material of crystal mass, for the growth of follow-up N-shaped nitride layer provides good basis, reduce the generation of crystal defect.
Described the first intrinsic gallium nitride layer 21 is the intrinsic gallium nitride layer of growth at 500~600 DEG C, and its thickness is 20 ~ 30nm; Described the second intrinsic gallium nitride layer 22 is the intrinsic gallium nitride layer of growth at 1000~1100 DEG C, and its thickness is 2 ~ 4 μ m.
In an embodiment of the present invention, described nitride is GaN.Particularly, described first kind nitride layer 4 is N-shaped GaN layer, and its thickness is 1 ~ 3 μ m; Described Second Type nitride layer 8 is p-type GaN layer, and described the first nitride layer 81 is magnesium doped p type gallium nitride, described the second nitride layer 82 doped p type gallium nitride of attaching most importance to, and the impurity of doping is Mg, the doping content of Mg is 10 20/ cm 3~10 22/ cm 3.Because the Mg doping of the second nitride layer 82 is larger, in growth course, will produce a large amount of defects, be conducive to the formation of epitaxial wafer surface coarsening structure below, the pit forming on the second nitride layer 82 surfaces, its degree of depth is 50 ~ 200nm, and width is 50 ~ 150nm.
The thickness of described the first nitride layer 81 is 50 ~ 200nm, the thickness of described the second nitride layer 82 is 100 ~ 200nm, described the second nitride layer 82 adopts such thickness both can meet the requirement of surface coarsening to thickness, also can performance such as voltage, brightness to LED etc. not impact because thickness is too thick.
Certainly, in other embodiments of the invention, can growing p-type GaN layer be also first kind nitride layer 4, growing n-type GaN layer is Second Type nitride layer 8.
In another embodiment of the present invention, described epitaxial wafer also comprises the AlGaN barrier layer 6 being formed between luminescent layer 5 and Second Type nitride layer 8, overflow from active area on AlGaN barrier layer 6 effectively block electrons, thereby increase the quantity of active area electronics, improve the charge carrier combined efficiency of multiple quantum well layer, promote LED chip luminous efficiency.
A kind of method that the invention provides epitaxial wafer surface coarsening, comprises the following steps:
S1, provide substrate 1;
S2, on substrate 1, form resilient coating 2;
S3, on resilient coating 2, form first kind nitride layer 4;
S4, on first kind nitride layer 4, form luminescent layer 5;
S5, on luminescent layer 5, form Second Type nitride layer, described Second Type nitride layer comprises the first nitride layer 7 and the second nitride layer 8 that are formed on successively on luminescent layer, described the second nitride layer 8 doped nitride layer of attaching most importance to;
S6, form pits on described the second nitride layer 8 surface.
Elaborate the method for epitaxial wafer surface coarsening of the present invention below in conjunction with accompanying drawing, also can in preparation method, elaborate to epitaxial wafer in the present invention and beneficial effect thereof, in specific implementation process, the growth of LED epitaxial loayer of the present invention adopts MOCVD(metallo-organic compound chemical vapour deposition technique) method.
Step S1, provides substrate 1.
In an embodiment of the present invention, described substrate 1 is plane or patterned substrate, preferably patterned substrate, and patterned substrate can reduce the epitaxial wafer defect of growth, improves epitaxial wafer crystal mass; The shape of described patterned substrate comprises strip, column, cone-shaped or spherical crown shape.
The material of substrate 1 can be selected sapphire, SiC or Si, preferably adopts Sapphire Substrate.
S2, on substrate 1, form resilient coating 2.
In another embodiment of the present invention, described resilient coating 2 comprises the first intrinsic gallium nitride layer 21 and the second intrinsic gallium nitride layer 22, specifically comprises the following steps:
S201, on substrate 1, form the first intrinsic gallium nitride layer 21;
S202, on the first intrinsic gallium nitride layer 21, form the second intrinsic gallium nitride layer 22.
Particularly, in step S201, can adopt MOCVD(metallo-organic compound chemical vapour deposition technique) the method first intrinsic gallium nitride layer 21 of growing on substrate 1, growth temperature is 500 ~ 600 DEG C, the thickness of described the first intrinsic gallium nitride layer 21 is 20 ~ 30nm, and the mode that the rear employing of having grown heats up is annealed.
Particularly, in step S201, the second intrinsic gallium nitride layer 22 of growing on the first intrinsic gallium nitride layer 21, growth temperature is 1000 ~ 1100 DEG C; In growth course, by the control of the technological parameters such as temperature, pressure, III/V compounds of group ratio being realized to the good growth of gallium nitride, the thickness of described the second intrinsic gallium nitride layer 22 is 2 ~ 4 μ m.
S3, on resilient coating 2, form first kind nitride layer 4.
Particularly, the first kind of growing on resilient coating 2 nitride layer, in one embodiment of the invention, described first kind nitride layer is N-shaped GaN layer, its thickness is 1 ~ 3 μ m.
S4, on first kind nitride layer 4, form luminescent layer 5.
Particularly, described luminescent layer 5 is multiple quantum well layer, and the structure of quantum well is In xga 1-xn/GaN(0 < x < 1), can be also In xga 1-xn/Al yga 1-yn(0 < x < 1,0 < y < 1), Al xga yin 1-x-yn/GaN(0 < x < 1,0 < y < 1, x+y < 1) or Al xga yin 1-x-yn/Al zga 1-zn (quantum well structure such as (0 < x < 1,0 < y < 1, x+y < 1, z < 1).The trap layer thickness of quantum well is 2 ~ 4nm, and barrier layer thickness is 8 ~ 15nm, and the cycle of quantum well is 1 ~ 20 cycle, and the growth temperature of multiple quantum well layer is 700 ~ 850 DEG C.
S5, on luminescent layer 5, form Second Type nitride layer, described Second Type nitride layer comprise be formed on successively luminescent layer 5 on the first nitride layer 81 and the second nitride layer 82, described the second nitride layer 82 doped nitride layer of attaching most importance to;
Particularly, described Second Type nitride layer 8 is p-type gallium nitride layer, in embodiments of the present invention, described the first nitride layer 81 is magnesium doped p type gallium nitride, described the second nitride layer 82 doped p type gallium nitride of attaching most importance to, the impurity of doping is Mg, the doping content of Mg is 10 20/ cm 3~10 22/ cm 3.Because the Mg doping of the second nitride layer 82 is larger, in growth course, will produce a large amount of defects, be conducive to the formation of epitaxial wafer surface coarsening structure below.
The thickness of described the first nitride layer 81 is 50 ~ 200nm, the thickness of described the second nitride layer 82 is 100 ~ 200nm, described the second nitride layer 82 adopts such thickness both can meet the requirement of surface coarsening to thickness, also can performance such as voltage, brightness to LED etc. not impact because thickness is too thick.
In concrete enforcement, the p-type gallium nitride of grow and heavy doping p-type gallium nitride are activated, the mode of activation is to be to carry out rapid thermal annealing under the vacuum of 500 ~ 800 DEG C or nitrogen environment in temperature, also can adopt ion beam to bombard.
Certainly, in other embodiments of the invention, can growing p-type GaN layer be also first kind nitride layer 4, growing n-type GaN layer is Second Type nitride layer 8.
S6, form pits on described the second nitride layer 82 surface.
Particularly, adopt chemical solution to carry out chemical corrosion to form pit to the second nitride layer 82 surfaces, the present invention adopts the KOH of melting and NaOH mixing material to corrode the second nitride layer 82 surfaces, because the second nitride layer 82 is very fast in defective local corrosion, thereby form pit on the second nitride layer 82 surfaces, the out-of-shape of the pit forming, the vertical cross-section of most pits is " V " type.In specific implementation process, can control the degree of depth and the size that form pit by the parameter such as control time, temperature, to obtain good alligatoring effect, improve the bright dipping of epitaxial wafer.In the present invention, the degree of depth of described pit is 50 ~ 200nm, and width is 50 ~ 150nm.
In another embodiment of the present invention, grow after luminescent layer 4, continued growth AlGaN barrier layer 6, overflow from active area on AlGaN barrier layer 6 effectively block electrons, thereby increase the quantity of active area electronics, improve the charge carrier combined efficiency of multiple quantum well layer, promote LED chip luminous efficiency.
Complete after the growth on AlGaN barrier layer 6 continued growth Second Type nitride layer 8 on AlGaN barrier layer 6.
In the present invention, complete after the alligatoring of the second nitride layer 82, can continue to form conductive layer 9 on epitaxial loayer, then carrying out step etching, making the steps such as electrode, to complete the preparation of whole LED chip.
Particularly, on the second nitride layer 82, the method with evaporation forms conductive layer 9.The thickness of described conductive layer 9 is 1 ~ 1000nm, and transparency conducting layer is ITO layer, or CTO (Cd 2snO 4), one in ZnO:Al, Ni/Au, the alloy such as Ni/Pd/Au, Pt/Au.
In the present invention, form after conductive layer 9, carry out step etching, make p electrode 10 and n electrode 11.Described p electrode 10 is Ti/Au alloy, can be also the alloy of any two or more metals in Ni, Au, Al, Ti, Pd, Pt, Sn, Cr, and the thickness of p electrode 10 is 0.2 ~ 1 micron.Described n electrode 11 is Ti/Al alloy, can be also the alloy of two or more metals in Ti, Al, Au, Pt, Sn, and the thickness of n electrode 11 is 0.2 ~ 1 micron.
The vertical electrode structure gallium nitride based light emitting diode that the present invention is also applicable to adopt lift-off technology to peel off and prepares after substrate.
In sum, the present invention increases heavy doping nitride layer on epitaxial wafer, and carry out chemical corrosion on its surface, because the concentration of heavy doping nitride layer impurity is high, more easily form defect, the speed of defective local corrosion, thus on epitaxial wafer surface, form pit, reach the object to epitaxial wafer surface coarsening, effectively raise the light extraction efficiency of epitaxial wafer.
It is simple that the present invention also has technique, workable, lower-cost advantage.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (12)

1. an epitaxial slice structure, it is characterized in that, comprise substrate, and the resilient coating, first kind nitride layer, luminescent layer and the Second Type nitride layer that on substrate, form successively, described Second Type nitride layer comprises the first nitride layer and the second nitride layer that are formed on successively on luminescent layer, described the second nitride layer doped nitride layer of attaching most importance to, is distributed with pit on described the second nitride layer surface.
2. epitaxial slice structure as claimed in claim 1, is characterized in that, described nitride is GaN.
3. epitaxial slice structure as claimed in claim 2, is characterized in that, described the second nitride layer doped with Mg, and the doping content of Mg is 10 20/ cm 3~10 22/ cm 3.
4. epitaxial slice structure as claimed in claim 3, is characterized in that, the thickness of described the second nitride layer is 100~200nm.
5. epitaxial slice structure as claimed in claim 1, is characterized in that, the degree of depth of described pit is 50~200nm.
6. epitaxial slice structure as claimed in claim 5, is characterized in that, the width of described pit is 50~150nm.
7. epitaxial slice structure as claimed in claim 1, is characterized in that, described resilient coating, comprising:
Be formed on the first intrinsic gallium nitride layer on substrate;
Be formed on the second intrinsic gallium nitride layer on the first intrinsic gallium nitride layer.
8. epitaxial slice structure as claimed in claim 1, is characterized in that, also comprises: be formed on the AlGaN barrier layer between luminescent layer and Second Type nitride layer.
9. a method for epitaxial wafer surface coarsening, is characterized in that, comprises the following steps:
S1, provide substrate;
S2, on substrate, form resilient coating;
S3, on resilient coating, form first kind nitride layer;
S4, on first kind nitride layer, form luminescent layer;
S5, on luminescent layer, form Second Type nitride layer, described Second Type nitride layer comprises the first nitride layer and the second nitride layer that are formed on successively on luminescent layer, described the second nitride layer doped nitride layer of attaching most importance to;
S6, form pit on described the second nitride layer surface.
10. the method for a kind of epitaxial wafer surface coarsening as claimed in claim 9, is characterized in that, adopts KOH and NaOH mixed solution to carry out chemical corrosion to form pit to described the second nitride layer surface.
The method of 11. epitaxial wafer surface coarsenings as claimed in claim 9, is characterized in that, described nitride is GaN.
The method of 12. epitaxial wafer surface coarsenings as claimed in claim 11, is characterized in that, described the second nitride layer doped with Mg, and the doping content of Mg is 10 20/ cm 3~10 22/ cm 3.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001237438A (en) * 2000-02-25 2001-08-31 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
CN101645476A (en) * 2008-08-06 2010-02-10 先进开发光电股份有限公司 Surface coarsening gallium nitride light-emitting component and manufacturing method thereof
CN102074627A (en) * 2009-11-19 2011-05-25 乐金显示有限公司 Semiconductor light-emitting device and a method for manufacturing the same
US20120007152A1 (en) * 2010-07-09 2012-01-12 Tzu-Hsiung Chen Low gate charging rectifier having mos structure and p-n junction, and manufacturing method of the same
CN203013782U (en) * 2012-09-17 2013-06-19 惠州比亚迪实业有限公司 LED chip
CN103682010A (en) * 2012-09-17 2014-03-26 比亚迪股份有限公司 LED chip and preparation method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001237438A (en) * 2000-02-25 2001-08-31 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
CN101645476A (en) * 2008-08-06 2010-02-10 先进开发光电股份有限公司 Surface coarsening gallium nitride light-emitting component and manufacturing method thereof
CN102074627A (en) * 2009-11-19 2011-05-25 乐金显示有限公司 Semiconductor light-emitting device and a method for manufacturing the same
US20120007152A1 (en) * 2010-07-09 2012-01-12 Tzu-Hsiung Chen Low gate charging rectifier having mos structure and p-n junction, and manufacturing method of the same
CN203013782U (en) * 2012-09-17 2013-06-19 惠州比亚迪实业有限公司 LED chip
CN103682010A (en) * 2012-09-17 2014-03-26 比亚迪股份有限公司 LED chip and preparation method

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